From nobody Thu Nov 28 08:32:03 2024 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A98D1D0E0F; Wed, 2 Oct 2024 14:14:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727878492; cv=none; b=h7C5lrf+mIYf/Eax/ZeFP3/I7bmw+da2J6LlfiD34eJxL6EIJuYkDkPrfK/nJuzgw7t7XiepFWI/uSwwnt8dFg/FTCTF8dBOdDf4g2V0IcJfDMchhnz7lA5Xn/awhjhHonIFaVGu1tQy2q0gih5YDSqU7igotzKElq8jOBnYM0A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727878492; c=relaxed/simple; bh=7aqkOngVxygtLPGqFsKk6bcTWHSzYy6NtyfV+U0JNQM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OeHEj7ygogL6vRZdw7FYNkLdD4mxquanrafp6eIgiu5MqY8N+WGxbekgBzBszl4wrRpbhD41blmM9eFeC6DrkNGYro5Mvp4eHaNveIEDji2bKUV0Yt3kofl7YNCugvB1dj2Gm9uxSJc5Ls/ITnkG7XKGpVlNqXY7h63fgH4j6AU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=finest.io; spf=pass smtp.mailfrom=finest.io; dkim=pass (2048-bit key) header.d=finest.io header.i=parker@finest.io header.b=IC6kOMeR; arc=none smtp.client-ip=74.208.4.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=finest.io Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=finest.io Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=finest.io header.i=parker@finest.io header.b="IC6kOMeR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=finest.io; s=s1-ionos; t=1727878478; x=1728483278; i=parker@finest.io; bh=GnYdg01IZ/X2ESoP4ioG/q3q4BjmdQgQIgLEKpnw3wI=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:Message-ID:In-Reply-To: References:MIME-Version:Content-Transfer-Encoding:cc: content-transfer-encoding:content-type:date:from:message-id: mime-version:reply-to:subject:to; b=IC6kOMeRPm3FkLSmWIG8N7ULS8+etVA1tfOkhmalpbecUvY3NZhNMdrN6Fx2Lw3k SiOHhpQ3SEwAmNt0rwt8PQWDYbUUWkoRaR6Euy4EfPJcsJ/f4zhQEIjHaKjbnjtOH 4qmYr2hwO17wTCfq5jABXWxD2VOIeoukROJmSvVUwjzDyNTCkXX6jwUE1bzS5O8XJ hVJnd1VxmAUupd5TP9FufLwQrSVqu8jnhCtnmmLUKLh646HZ1aUzjpf26eKi04Ojz Sigv0hH5nfLo/T8O4uvyVUUilbw1m+4LyrgMV0cG5yVVGK2DbGx8ReukHMdGoIBaV vzPTuR0J0xPCIpyXqw== X-UI-Sender-Class: 55c96926-9e95-11ee-ae09-1f7a4046a0f6 Received: from finest.io ([98.159.241.229]) by mrelay.perfora.net (mreueus004 [74.208.5.2]) with ESMTPSA (Nemesis) id 1MDQFe-1smgSu0DKQ-0043Jw; Wed, 02 Oct 2024 16:14:38 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v3 1/5] misc: eeprom: eeprom_93cx6: Add quirk for extra read clock cycle Date: Wed, 2 Oct 2024 10:14:07 -0400 Message-ID: <62eca5d814da3734cfa984a78e0978efefbbc827.1727873292.git.pnewman@connecttech.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:+uja/jXQ+/VxW8cdMow0/x3evKiMWjJMbxpa4SFA1GTUNVfXGeW CsCqCTEBqDe7n9azc0GVZ1CWdzzdmYXjebuLkg3kDLf5+MTcOLnZ/jeGFssrWv4P8a9Ewvy AvHi5T5N96hqT5ctOVeOOa7YjH/EBlttLWabZlqyPm9uIyxjDH5a6qb4a0Zr1b4fIhEU3GO uDQh+xh+SntSHYAYfzdxw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:1pe8yxVaGKw=;dkRJEcmn23xxHJNHzPwjoZ7LAlg iaZoHFJw+hZzareu68nEJqnqu8f+IpiPM2ZgIflrMrIocGwWcZlySH5nPPdEieiUdIjf0kL3t 53jIvIep20h+zjY8IBoAaEfThqjPsvKYzX0pTwS/iZyLVipY9hlJlwnz2ze6nQqj7jnZjtKEH u91/Cv3BTm1tIyKngEgqRya6dwz9oGIDoXhEg78J/Snfi4f3hLKfYynacK2Q6vZcY6gT3sbqR fT/b02Y8CFcrL7OIImsLdt7pLmo+S/X8bP6Hr5NUExCX+0OpkX0lgSXbzCCS3/BHRDladuGzB UpmQskpaPDOod6SCxt94UPEdtKgdLLYFrCLTpqozrNHMhEXOv2wh32abbBClWZE8Hv9aFrkRL TZmnm0e6fXhYMl/fmpRUSkoJqwTppYKwpmVhOoiQPV0leJ6t9NgyuKtlOobG2uDn0iPsmvTMr 0YwU5amt6Mp3xit08bov02jF5vos4aIh5mPk0nlPbzAfEFf92Wyoo+hKWoZFszBE2KVK07Uqz QdHDLQJkO2+rnScQ+xPR81gAoTgw6NS1mb/QzHP5/TvORfPlNRPePTDrQfAxFU44kEq6ZbMcg Xj5j3w+NNwtVilIsLOuMitZZ9SPBD6PYIwI+TEgODRUBX98vG/7y3d0qNAcaiw9AbpCt532mE 50CuOWpnYZwh79tcebOP8KhjGUgrnEFCKJipY2vj0kDiTqyyMBDtq21kcfuW8LM75u+AO5sIw 1J+rXqFPlUGHMfzXNPb8gUZF0gmUhFH0g== Content-Type: text/plain; charset="utf-8" From: Parker Newman Add a quirk similar to eeprom_93xx46 to add an extra clock cycle before reading data from the EEPROM. The 93Cx6 family of EEPROMs output a "dummy 0 bit" between the writing of the op-code/address from the host to the EEPROM and the reading of the actual data from the EEPROM. More info can be found on page 6 of the AT93C46 datasheet (linked below). Similar notes are found in other 93xx6 datasheets. In summary the read operation for a 93Cx6 EEPROM is: Write to EEPROM: 110[A5-A0] (9 bits) Read from EEPROM: 0[D15-D0] (17 bits) Where: 110 is the start bit and READ OpCode [A5-A0] is the address to read from 0 is a "dummy bit" preceding the actual data [D15-D0] is the actual data. Looking at the READ timing diagrams in the 93Cx6 datasheets the dummy bit should be clocked out on the last address bit clock cycle meaning it should be discarded naturally. However, depending on the hardware configuration sometimes this dummy bit is not discarded. This is the case with Exar PCI UARTs which require an extra clock cycle between sending the address and reading the data. Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-5193-SEEP= ROM-AT93C46D-Datasheet.pdf Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v2: - Moved quirk define into struct eeprom_93cx6. - Moved has_quirk_extra_read_cycle() from eeprom_93cx6.c into eeprom_93cx6.= h. - Fixed commit message formatting. Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. drivers/misc/eeprom/eeprom_93cx6.c | 10 ++++++++++ include/linux/eeprom_93cx6.h | 12 ++++++++++++ 2 files changed, 22 insertions(+) diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eepro= m_93cx6.c index 9627294fe3e9..4c9827fe9217 100644 --- a/drivers/misc/eeprom/eeprom_93cx6.c +++ b/drivers/misc/eeprom/eeprom_93cx6.c @@ -186,6 +186,11 @@ void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom, co= nst u8 word, eeprom_93cx6_write_bits(eeprom, command, PCI_EEPROM_WIDTH_OPCODE + eeprom->width); + if (has_quirk_extra_read_cycle(eeprom)) { + eeprom_93cx6_pulse_high(eeprom); + eeprom_93cx6_pulse_low(eeprom); + } + /* * Read the requested 16 bits. */ @@ -252,6 +257,11 @@ void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom, c= onst u8 byte, eeprom_93cx6_write_bits(eeprom, command, PCI_EEPROM_WIDTH_OPCODE + eeprom->width + 1); + if (has_quirk_extra_read_cycle(eeprom)) { + eeprom_93cx6_pulse_high(eeprom); + eeprom_93cx6_pulse_low(eeprom); + } + /* * Read the requested 8 bits. */ diff --git a/include/linux/eeprom_93cx6.h b/include/linux/eeprom_93cx6.h index c860c72a921d..4d141345f4d4 100644 --- a/include/linux/eeprom_93cx6.h +++ b/include/linux/eeprom_93cx6.h @@ -11,6 +11,8 @@ Supported chipsets: 93c46, 93c56 and 93c66. */ +#include + /* * EEPROM operation defines. */ @@ -34,6 +36,7 @@ * @register_write(struct eeprom_93cx6 *eeprom): handler to * write to the eeprom register by using all reg_* fields. * @width: eeprom width, should be one of the PCI_EEPROM_WIDTH_* defines + * @quirks: eeprom or controller quirks * @drive_data: Set if we're driving the data line. * @reg_data_in: register field to indicate data input * @reg_data_out: register field to indicate data output @@ -50,6 +53,9 @@ struct eeprom_93cx6 { void (*register_write)(struct eeprom_93cx6 *eeprom); int width; + unsigned int quirks; +/* Some EEPROMs require an extra clock cycle before reading */ +#define PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE BIT(0) char drive_data; char reg_data_in; @@ -71,3 +77,9 @@ extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom= , bool enable); extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom, u8 addr, u16 data); + +static inline bool has_quirk_extra_read_cycle(struct eeprom_93cx6 *eeprom) +{ + return eeprom->quirks & PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; +} + -- 2.46.0 From nobody Thu Nov 28 08:32:03 2024 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 075781D0E17; Wed, 2 Oct 2024 14:14:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727878492; cv=none; b=BuQ/WWCwM+QpEEI5TE+RguJZTe9CgrrMfhxVzklj8ZzxBuAfeYCtm9cRzPyMUxlJYuyVUIHnivJTF1EavJt+bxwmcwqpYb3eF9fC0bwrpJo1ILLU+vMgcH9weoFJexhCVrzdNjQdNYc7HlCGpbon+KU+w4pa+7klV0Qzrn9mIFQ= ARC-Message-Signature: i=1; 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charset="utf-8" From: Parker Newman Use the BIT() macro rather than (1 << (i - 1)). Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- drivers/misc/eeprom/eeprom_93cx6.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/misc/eeprom/eeprom_93cx6.c b/drivers/misc/eeprom/eepro= m_93cx6.c index 4c9827fe9217..e6f0e0fc1ca2 100644 --- a/drivers/misc/eeprom/eeprom_93cx6.c +++ b/drivers/misc/eeprom/eeprom_93cx6.c @@ -8,6 +8,7 @@ * Supported chipsets: 93c46 & 93c66. */ +#include #include #include #include @@ -102,7 +103,7 @@ static void eeprom_93cx6_write_bits(struct eeprom_93cx6= *eeprom, /* * Check if this bit needs to be set. */ - eeprom->reg_data_in =3D !!(data & (1 << (i - 1))); + eeprom->reg_data_in =3D !!(data & BIT(i - 1)); /* * Write the bit to the eeprom register. @@ -152,7 +153,7 @@ static void eeprom_93cx6_read_bits(struct eeprom_93cx6 = *eeprom, * Read if the bit has been set. */ if (eeprom->reg_data_out) - buf |=3D (1 << (i - 1)); + buf |=3D BIT(i - 1); eeprom_93cx6_pulse_low(eeprom); } -- 2.46.0 From nobody Thu Nov 28 08:32:03 2024 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F1B53232; 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Wed, 02 Oct 2024 16:14:39 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v3 3/5] serial: 8250_exar: Replace custom EEPROM read with eeprom_93cx6 Date: Wed, 2 Oct 2024 10:14:09 -0400 Message-ID: X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:r7YqCWMkxDJ4jLZCQamOfBQb0fZF1PWkmGt/q+L4oaIXH8xIYq9 dq1arXKKyzFAYzclTbQDYQht2bkYLdhbC2j2rynZhLs3TiB1/ccsm6W5LG6/Kwj02xG9zeN 1sT56jktbtPTuokSNleikBIOH0v2uw2w9cx0nC6S+WIL3GXquAPOwMdWCQoSQ4vZb4d04X2 eeevq68prAbvRLGIqqdSw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:q2grJUbo9zw=;l/9tiADrCSecCRnBaJZa1QbhiHc PqKY+CWsmjgGFb+1Ts6rUC0llY1L5PkrTBQcJ70+0qrcSbRg8cwmpxsvRtIyeO8+ZmLbt8H8o N+8pU7UuRwLLaAkdBf9nm81qI5UKycBZZGJTE2wPR9vJ2Vz+PdTR/KYfPgVJC+OE8zjnEsqnx tU5nQR2EI+k9qfqrmZWXBsJwpn9e3kzA5H5ftDIsOuJBrL7HuvaLSTNcobV7WOpkyVVB2OzSf kYsjtzrEpSLz+oTvdYecB29zAolvF+qTZx9WoMCbjwnk3Sagldgv6+eyncfBJICEbXSWWZuWa R34eyEqf5ai5e+9+Do4ocSexTJG+0b786fR81KVe+kSsqjrdsy+hueUjnyayBAPDU8Zm9LruK m9Zg4WYfz1CmEjg9ADiQ9flL0oXBqUMKF3FGBZ8h+sijwpX+xHYHPmFmcKRmgwiFYBav4Awnb mXxGmRsuVBg+iLLO4GsJqXbawXKsllSbzLt9sXiAspNzyNhXvQl6ftPlYMz+WawuyoAI3LVsk RKC1/GrSbozQmqkYUtREab5vJ8AD58AClzClKC4AIPc20+4S3XOgOd6pGu40vr1pLLOszsapV e5Q81MRlWuQ1K9afcBUgeN+n3gM772aYzJqo5HGcs/AL64XYfxM0QOjGcP1Lt4w2CI4wXlnDn jF0AbQnOUvJTan/Ps8dEzoWgukS/FX6Td3jTd8iPMuzSlXTJGh/ptpaS1Er16l1W27cZK+U7i tD1+KoQjyLN4q3eVcOYinMCfCbg/G+k0g== Content-Type: text/plain; charset="utf-8" From: Parker Newman Replace the custom 93cx6 EEPROM read functions with the eeprom_93cx6 driver. This removes duplicate code and improves code readability. Replace exar_ee_read() calls with eeprom_93cx6_read() or eeprom_93cx6_multiread(). Add "select EEPROM_93CX6" to config SERIAL_8250_EXAR to ensure eeprom_93cx6 driver is also compiled when 8250_exar driver is selected. Note: Old exar_ee_read() and associated functions are removed in next patch in this series. Link to mailing list discussion with Andy Shevchenko for reference. Link: https://lore.kernel.org/linux-serial/Ztr5u2wEt8VF1IdI@black.fi.intel.= com/ Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v2: - Refactored cti_read_osc_freq() based on feedback. - Moved Kconfig change into this patch. - Sorted headers. - Fixed comment. Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. drivers/tty/serial/8250/8250_exar.c | 55 +++++++++++++++++++++++------ drivers/tty/serial/8250/Kconfig | 1 + 2 files changed, 45 insertions(+), 11 deletions(-) diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/= 8250_exar.c index b7a75db15249..c40e86920110 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -252,6 +253,7 @@ struct exar8250 { unsigned int nr; unsigned int osc_freq; struct exar8250_board *board; + struct eeprom_93cx6 eeprom; void __iomem *virt; int line[]; }; @@ -355,6 +357,39 @@ static u16 exar_ee_read(struct exar8250 *priv, u8 ee_a= ddr) return data; } +static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom) +{ + struct exar8250 *priv =3D eeprom->data; + u8 regb =3D exar_read_reg(priv, UART_EXAR_REGB); + + /* EECK and EECS always read 0 from REGB so only set EEDO */ + eeprom->reg_data_out =3D regb & UART_EXAR_REGB_EEDO; +} + +static void exar_eeprom_93cx6_reg_write(struct eeprom_93cx6 *eeprom) +{ + struct exar8250 *priv =3D eeprom->data; + u8 regb =3D 0; + + if (eeprom->reg_data_in) + regb |=3D UART_EXAR_REGB_EEDI; + if (eeprom->reg_data_clock) + regb |=3D UART_EXAR_REGB_EECK; + if (eeprom->reg_chip_select) + regb |=3D UART_EXAR_REGB_EECS; + + exar_write_reg(priv, UART_EXAR_REGB, regb); +} + +static void exar_eeprom_init(struct exar8250 *priv) +{ + priv->eeprom.data =3D priv; + priv->eeprom.register_read =3D exar_eeprom_93cx6_reg_read; + priv->eeprom.register_write =3D exar_eeprom_93cx6_reg_write; + priv->eeprom.width =3D PCI_EEPROM_WIDTH_93C46; + priv->eeprom.quirks |=3D PCI_EEPROM_QUIRK_EXTRA_READ_CYCLE; +} + /** * exar_mpio_config_output() - Configure an Exar MPIO as an output * @priv: Device's private structure @@ -696,20 +731,16 @@ static int cti_plx_int_enable(struct exar8250 *priv) */ static int cti_read_osc_freq(struct exar8250 *priv, u8 eeprom_offset) { - u16 lower_word; - u16 upper_word; + __le16 ee_words[2]; + u32 osc_freq; - lower_word =3D exar_ee_read(priv, eeprom_offset); - // Check if EEPROM word was blank - if (lower_word =3D=3D 0xFFFF) - return -EIO; + eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE= (ee_words)); - upper_word =3D exar_ee_read(priv, (eeprom_offset + 1)); - if (upper_word =3D=3D 0xFFFF) + osc_freq =3D le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16); + if (osc_freq =3D=3D GENMASK(31, 0)) return -EIO; - return FIELD_PREP(CTI_EE_MASK_OSC_FREQ_LOWER, lower_word) | - FIELD_PREP(CTI_EE_MASK_OSC_FREQ_UPPER, upper_word); + return osc_freq; } /** @@ -833,7 +864,7 @@ static enum cti_port_type cti_get_port_type_xr17v35x(st= ruct exar8250 *priv, u8 offset; offset =3D CTI_EE_OFF_XR17V35X_PORT_FLAGS + port_num; - port_flags =3D exar_ee_read(priv, offset); + eeprom_93cx6_read(&priv->eeprom, offset, &port_flags); port_type =3D FIELD_GET(CTI_EE_MASK_PORT_FLAGS_TYPE, port_flags); if (CTI_PORT_TYPE_VALID(port_type)) @@ -1551,6 +1582,8 @@ exar_pci_probe(struct pci_dev *pcidev, const struct p= ci_device_id *ent) if (rc) return rc; + exar_eeprom_init(priv); + for (i =3D 0; i < nr_ports && i < maxnr; i++) { rc =3D board->setup(priv, pcidev, &uart, i); if (rc) { diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kcon= fig index 47ff50763c04..94910ced8238 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig @@ -150,6 +150,7 @@ config SERIAL_8250_EXAR tristate "8250/16550 Exar/Commtech PCI/PCIe device support" depends on SERIAL_8250 && PCI select SERIAL_8250_PCILIB + select EEPROM_93CX6 default SERIAL_8250 help This builds support for XR17C1xx, XR17V3xx and some Commtech -- 2.46.0 From nobody Thu Nov 28 08:32:03 2024 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0C771D1E81; Wed, 2 Oct 2024 14:14:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.194 ARC-Seal: i=1; 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Wed, 02 Oct 2024 16:14:39 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v3 4/5] serial: 8250_exar: Remove old exar_ee_read() and other unneeded code Date: Wed, 2 Oct 2024 10:14:10 -0400 Message-ID: <9d3b61f6bf003206aebe4db9f32366cc8e214201.1727873292.git.pnewman@connecttech.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:WRA6HwT7j+NPmxhTrtyCTO/7VQnn29zgH72FHEPcms4KVm7otv+ TYvT3vFosKCJBG9swwuhgYkxRZvtmopmY2Qh1DE31LYtLTE46hCMb4ZiEvzqoGNhJmWnZQh cWZb61u5wikbZ3UsOL95Ke4iimg6KmllHPV0ZCGaJJ4fGi7ftVSZJbGYo1NtUIIRwKUgocU wQBmbXl+7armIR++m0TWw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:vWw+SiNbtHQ=;gboFqfcyrgnVG+IIjeFEJnh5Yc/ T9nN1m5PRzw7t1zHmStnYfDRtROgp0qoixdhYatfoL7gViG25uJRmNHr73SwODR8+heAALDnx lW1+Ygrlx+Tfn3EKxq4j/uaYIzQV+C5tpdc+gmbwGT7bylaZWiHfMHF4+34yz9RIUmXIlJKZF FwjmcbMT2QEgWnha3bOB+VbMrZ3XZzuOJ60kpeNEe77Y7WfwRNLDPnHJpiauI92GAe3ZLSPYR cbwEDZmmQUWS0npDySTqENh9jm2sf9c/Twq6MjfuHQc4YJlsf3jIA24pvbvM83NmFmjDIy432 iyK0D1EZRUiEQXcIcnZ/tVkmgQJzZNjvPN6aAFSr1gHyd+fNsnBO/va4yNtb5VCWeC3BdxZ8A zt+FiO1jOzIKj9rNFi38wjavKtD0Od/TXvbuGRef+SsfnpIm7V3+qopvetEnDYhdd41l15W2N OPLESexNt1sXfvsP5FqLM/jXUtZBsj/Xo2jVMRL/9xeh93r3NOz4F9TuKUpeZReLkrFmFGlhq kf3oX4XdfPLJFbXqkyKdIbxGgALjfnRJPW+4DMSE6S1e2zHJ5jXW+qu4HTO3bt9vSpTYoypFh 42IycJJ3GPH7r9B9+xIrbRmtqYRHT4cssed3v06mDf4IM1DM1UD5TDH3saLUH9tz0hl/D2oJj DbEMQE7dNc1X06YUvHXom91a1OK8Szmn4jGsxcU9eFE2FD4wKjjLEvgW43FYoRLNdnTaXbyXH e0fEnsa/uVzDw9zRbhANqGx5VXT1SSYvw== Content-Type: text/plain; charset="utf-8" From: Parker Newman Remove the old exar_ee_read() and associated helper functions. Remove defines that are no longer needed after the switch to using the eeprom_93cx6 driver. Add CTI_EE_MASK_OSC_FREQ define. Reviewed-by: Andy Shevchenko Signed-off-by: Parker Newman --- Changes in v3: - Commit message wording. - Rebased to v6.12-rc1. - Remove CTI_EE_MASK_OSC_FREQ_LOWER and CTI_EE_MASK_OSC_FREQ_UPPER. - Add CTI_EE_MASK_OSC_FREQ define. drivers/tty/serial/8250/8250_exar.c | 95 +---------------------------- 1 file changed, 2 insertions(+), 93 deletions(-) diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/= 8250_exar.c index c40e86920110..470e8128c79a 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -136,8 +136,6 @@ #define UART_EXAR_REGB_EECS BIT(5) #define UART_EXAR_REGB_EEDI BIT(6) #define UART_EXAR_REGB_EEDO BIT(7) -#define UART_EXAR_REGB_EE_ADDR_SIZE 6 -#define UART_EXAR_REGB_EE_DATA_SIZE 16 #define UART_EXAR_XR17C15X_PORT_OFFSET 0x200 #define UART_EXAR_XR17V25X_PORT_OFFSET 0x200 @@ -190,8 +188,7 @@ #define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */ #define CTI_EE_MASK_PORT_FLAGS_TYPE GENMASK(7, 0) -#define CTI_EE_MASK_OSC_FREQ_LOWER GENMASK(15, 0) -#define CTI_EE_MASK_OSC_FREQ_UPPER GENMASK(31, 16) +#define CTI_EE_MASK_OSC_FREQ GENMASK(31, 0) #define CTI_FPGA_RS485_IO_REG 0x2008 #define CTI_FPGA_CFG_INT_EN_REG 0x48 @@ -269,94 +266,6 @@ static inline u8 exar_read_reg(struct exar8250 *priv, = unsigned int reg) return readb(priv->virt + reg); } -static inline void exar_ee_select(struct exar8250 *priv) -{ - // Set chip select pin high to enable EEPROM reads/writes - exar_write_reg(priv, UART_EXAR_REGB, UART_EXAR_REGB_EECS); - // Min ~500ns delay needed between CS assert and EEPROM access - udelay(1); -} - -static inline void exar_ee_deselect(struct exar8250 *priv) -{ - exar_write_reg(priv, UART_EXAR_REGB, 0x00); -} - -static inline void exar_ee_write_bit(struct exar8250 *priv, u8 bit) -{ - u8 value =3D UART_EXAR_REGB_EECS; - - if (bit) - value |=3D UART_EXAR_REGB_EEDI; - - // Clock out the bit on the EEPROM interface - exar_write_reg(priv, UART_EXAR_REGB, value); - // 2us delay =3D ~500khz clock speed - udelay(2); - - value |=3D UART_EXAR_REGB_EECK; - - exar_write_reg(priv, UART_EXAR_REGB, value); - udelay(2); -} - -static inline u8 exar_ee_read_bit(struct exar8250 *priv) -{ - u8 regb; - u8 value =3D UART_EXAR_REGB_EECS; - - // Clock in the bit on the EEPROM interface - exar_write_reg(priv, UART_EXAR_REGB, value); - // 2us delay =3D ~500khz clock speed - udelay(2); - - value |=3D UART_EXAR_REGB_EECK; - - exar_write_reg(priv, UART_EXAR_REGB, value); - udelay(2); - - regb =3D exar_read_reg(priv, UART_EXAR_REGB); - - return (regb & UART_EXAR_REGB_EEDO ? 1 : 0); -} - -/** - * exar_ee_read() - Read a word from the EEPROM - * @priv: Device's private structure - * @ee_addr: Offset of EEPROM to read word from - * - * Read a single 16bit word from an Exar UART's EEPROM. - * The type of the EEPROM is AT93C46D. - * - * Return: EEPROM word - */ -static u16 exar_ee_read(struct exar8250 *priv, u8 ee_addr) -{ - int i; - u16 data =3D 0; - - exar_ee_select(priv); - - // Send read command (opcode 110) - exar_ee_write_bit(priv, 1); - exar_ee_write_bit(priv, 1); - exar_ee_write_bit(priv, 0); - - // Send address to read from - for (i =3D UART_EXAR_REGB_EE_ADDR_SIZE - 1; i >=3D 0; i--) - exar_ee_write_bit(priv, ee_addr & BIT(i)); - - // Read data 1 bit at a time starting with a dummy bit - for (i =3D UART_EXAR_REGB_EE_DATA_SIZE; i >=3D 0; i--) { - if (exar_ee_read_bit(priv)) - data |=3D BIT(i); - } - - exar_ee_deselect(priv); - - return data; -} - static void exar_eeprom_93cx6_reg_read(struct eeprom_93cx6 *eeprom) { struct exar8250 *priv =3D eeprom->data; @@ -737,7 +646,7 @@ static int cti_read_osc_freq(struct exar8250 *priv, u8 = eeprom_offset) eeprom_93cx6_multiread(&priv->eeprom, eeprom_offset, ee_words, ARRAY_SIZE= (ee_words)); osc_freq =3D le16_to_cpu(ee_words[0]) | (le16_to_cpu(ee_words[1]) << 16); - if (osc_freq =3D=3D GENMASK(31, 0)) + if (osc_freq =3D=3D CTI_EE_MASK_OSC_FREQ) return -EIO; return osc_freq; -- 2.46.0 From nobody Thu Nov 28 08:32:03 2024 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4E2D1D223F; Wed, 2 Oct 2024 14:14:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.208.4.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Wed, 02 Oct 2024 16:14:40 +0200 From: Parker Newman To: Greg Kroah-Hartman , Jiri Slaby , Andy Shevchenko , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org Cc: Parker Newman Subject: [PATCH v3 5/5] serial: 8250_exar: Group CTI EEPROM offsets by device Date: Wed, 2 Oct 2024 10:14:11 -0400 Message-ID: <641122b5fa5c5fae58f45372574f3633ca505224.1727873292.git.pnewman@connecttech.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:OKRFvDjNCNrSpHu/58YvWUhPAiATePXnBEEeUqzrCMjrxi1yl0Y WphRcWqNbaVsjQ1s8GcdqSIAEUZznO5pmUusPxpNj4CYBl5eQX6NKVQEm8w1OSe2o8tZ368 C/E9cbNvaw3KzVdEJqYmARrRepdjoSH00SqWBLlDgWk4HzISq+BoFnDcnqeWjPueiis5SvZ oyZt9MgSGF1aYlb7Rxsnw== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:o/ngSX8peq4=;zaTET7vCHpunyoVYj3txBbnIE9v 6ZEkmlyBEJErEUE+nds1OSVUr1ACHwD0NDp+o8GdICtAx2HULRinsZoGOgtBu2ulrG89Jo6Ru SA6Jjm/sW/fhZDXV9QK8MD8UF9HXlM2OZrHw4t+cFlBZphWZaE3tee4w7nmFCYezjJ28coeRU v3MROXqc5qLX5FzBrGJ9/Qaud2IILmYVQISLmQ36xKRJJHGj1PJwmRrhNF2OVAk02swkILKnJ 2mZq3rGoFQlUvEREmgN1iohbalKitLB5JcUtDWLji19twZxmG6z85kVfjSBfsGrSG5zIR1Glb LTqaVHRaZPFtain8kL51i4DfHEkeJ+SzFjFG+c+a6fB89T0stcASV2yYPxvceXoNoqDhFf2ik HBCLMeaCq7CXcnkSTsFhRI9OwWuQ2L0oAgvQdaNMjNSCXel5lCS+k4QIv+Tp6ygGX1yePqu9l NV9BTrIiNr3FyhvbgPtsKQh6GdxIgyzlJJ3lQGdRm/CVLRkHjYA22EcfZ/7bo5bwsiP4MC+St H67wtusZxYhk0ZCLYWe/Ki9C8oAWT8tYPzumEnMGxtiS5qeNjc4PfcgfKdNeZpf9fkVrXsAzS 9797NBfhlSpYJ9YPSUqDg8JjUSfZ5U6b3/EqFS9jR9AH0vbln98biNlUbDAGJKivxiVPu3dax JbL68tu42VwL+9dTAX2wQ3yTbi0kUrtWye5PlR1pRLXGDCmbUKTipj8wmDzcZxDloA0JciDHm w7O5Ohup5fEenly3Mq5Ct/Jq5l4tEhMCQ== Content-Type: text/plain; charset="utf-8" From: Andy Shevchenko It's not obvious from the first glance that the list of the CTI EEPROM offsets covers three different models, let's group them accordingly for better readability. Signed-off-by: Andy Shevchenko Signed-off-by: Parker Newman --- drivers/tty/serial/8250/8250_exar.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/= 8250_exar.c index 470e8128c79a..e37c10b60a7e 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -178,11 +178,13 @@ /* CTI EEPROM offsets */ #define CTI_EE_OFF_XR17C15X_OSC_FREQ 0x04 /* 2 words */ -#define CTI_EE_OFF_XR17V25X_OSC_FREQ 0x08 /* 2 words */ #define CTI_EE_OFF_XR17C15X_PART_NUM 0x0A /* 4 words */ -#define CTI_EE_OFF_XR17V25X_PART_NUM 0x0E /* 4 words */ #define CTI_EE_OFF_XR17C15X_SERIAL_NUM 0x0E /* 1 word */ + +#define CTI_EE_OFF_XR17V25X_OSC_FREQ 0x08 /* 2 words */ +#define CTI_EE_OFF_XR17V25X_PART_NUM 0x0E /* 4 words */ #define CTI_EE_OFF_XR17V25X_SERIAL_NUM 0x12 /* 1 word */ + #define CTI_EE_OFF_XR17V35X_SERIAL_NUM 0x11 /* 2 word */ #define CTI_EE_OFF_XR17V35X_BRD_FLAGS 0x13 /* 1 word */ #define CTI_EE_OFF_XR17V35X_PORT_FLAGS 0x14 /* 1 word */ -- 2.46.0