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a=rsa-sha256; c=relaxed/relaxed; d=ew.tq-group.com; s=dkim; t=1726149885; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=E4oFCpTK0ecVloYHiAmz691jkFwVgXePEzrsMShB1CE=; b=tfCt+CbpNZwyewC+Ylx3/KSdNpHenvn2k2HlXHvpzae5agh0Mlcy3nCogqBBXs0WKSJC6y MLKZn/U5VVdkKfFmMAWqNxur6heuKlOHgVWy8F5MmuwwlK6txGFMjRgN9x8B6BzM0SmCf9 OoVqekX3CYwV3DiicwPhpzCc9TuRoutSM26moBdBKUoLO/AGEruM+p6pk+kpZTrV2lF6ai hdhaIQuOt6sH3zcqUo0VPGfap3QPO6dElxs3XO509Mxs3h924e/IoiSk1BgDDh35nt7OXJ KAjdLJV9bMS10nJnZ3XfdjT8f6/OZEeuRA+avv14F1KLY3Lc5tnJheNBM5e/AQ== From: Matthias Schiffer To: Lee Jones Cc: linux@ew.tq-group.com, linux-kernel@vger.kernel.org, Matthias Schiffer Subject: [PATCH v3 1/5] mfd: tqmx86: add board definitions for TQMx120UC, TQMx130UC and TQMxE41S Date: Thu, 12 Sep 2024 16:04:08 +0200 Message-ID: <132aff890ed206dd313aa53482383c766a63cc4c.1726148801.git.matthias.schiffer@ew.tq-group.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx1= 20uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx1= 30uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe= 41s/ Signed-off-by: Matthias Schiffer --- v2: no changes v3: no changes drivers/mfd/tqmx86.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index fac02875fe7d9..e15b9be98c2db 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -35,11 +35,14 @@ #define TQMX86_REG_BOARD_ID_E39C2 7 #define TQMX86_REG_BOARD_ID_70EB 8 #define TQMX86_REG_BOARD_ID_80UC 9 +#define TQMX86_REG_BOARD_ID_120UC 10 #define TQMX86_REG_BOARD_ID_110EB 11 #define TQMX86_REG_BOARD_ID_E40M 12 #define TQMX86_REG_BOARD_ID_E40S 13 #define TQMX86_REG_BOARD_ID_E40C1 14 #define TQMX86_REG_BOARD_ID_E40C2 15 +#define TQMX86_REG_BOARD_ID_130UC 16 +#define TQMX86_REG_BOARD_ID_E41S 19 #define TQMX86_REG_BOARD_REV 0x01 #define TQMX86_REG_IO_EXT_INT 0x06 #define TQMX86_REG_IO_EXT_INT_NONE 0 @@ -132,6 +135,8 @@ static const char *tqmx86_board_id_to_name(u8 board_id,= u8 sauc) return "TQMx70EB"; case TQMX86_REG_BOARD_ID_80UC: return "TQMx80UC"; + case TQMX86_REG_BOARD_ID_120UC: + return "TQMx120UC"; case TQMX86_REG_BOARD_ID_110EB: return "TQMx110EB"; case TQMX86_REG_BOARD_ID_E40M: @@ -142,6 +147,10 @@ static const char *tqmx86_board_id_to_name(u8 board_id= , u8 sauc) return "TQMxE40C1"; case TQMX86_REG_BOARD_ID_E40C2: return "TQMxE40C2"; + case TQMX86_REG_BOARD_ID_130UC: + return "TQMx130UC"; + case TQMX86_REG_BOARD_ID_E41S: + return "TQMxE41S"; default: return "Unknown"; } @@ -154,11 +163,14 @@ static int tqmx86_board_id_to_clk_rate(struct device = *dev, u8 board_id) case TQMX86_REG_BOARD_ID_60EB: case TQMX86_REG_BOARD_ID_70EB: case TQMX86_REG_BOARD_ID_80UC: + case TQMX86_REG_BOARD_ID_120UC: case TQMX86_REG_BOARD_ID_110EB: case TQMX86_REG_BOARD_ID_E40M: case TQMX86_REG_BOARD_ID_E40S: case TQMX86_REG_BOARD_ID_E40C1: case TQMX86_REG_BOARD_ID_E40C2: + case TQMX86_REG_BOARD_ID_130UC: + case TQMX86_REG_BOARD_ID_E41S: return 24000; case TQMX86_REG_BOARD_ID_E39MS: case TQMX86_REG_BOARD_ID_E39C1: --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 30 01:46:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 988841AD255 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Clarify that "7, 9, 12" refers to the valid arguments that can be passed as gpio_irq. Signed-off-by: Matthias Schiffer --- v2: new patch v3: no changes drivers/mfd/tqmx86.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index e15b9be98c2db..7b2f9490a9af5 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -58,7 +58,7 @@ =20 static uint gpio_irq; module_param(gpio_irq, uint, 0); -MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)"); +MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (valid parameters: 7, 9, 12)"); =20 static const struct resource tqmx_i2c_soft_resources[] =3D { DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 30 01:46:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 924431B12D4 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Move IRQ setup into a helper function. The string "GPIO" for error messages is replaced with a label argument to prepare for reusing the function for the I2C IRQ. No functional change intended. Co-developed-by: Gregor Herburger Signed-off-by: Gregor Herburger Signed-off-by: Matthias Schiffer --- v2: no changes (was patch 2/4) v3: no changes drivers/mfd/tqmx86.c | 72 +++++++++++++++++++++++++++----------------- 1 file changed, 45 insertions(+), 27 deletions(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 7b2f9490a9af5..5aa51ead00a28 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -186,32 +186,54 @@ static int tqmx86_board_id_to_clk_rate(struct device = *dev, u8 board_id) } } =20 -static int tqmx86_probe(struct platform_device *pdev) +static int tqmx86_irq_to_irq_cfg(struct device *dev, const char *label, u8= irq) { - u8 board_id, sauc, rev, i2c_det, io_ext_int_val; - struct device *dev =3D &pdev->dev; - u8 gpio_irq_cfg, readback; - const char *board_name; - void __iomem *io_base; - int err; - - switch (gpio_irq) { + switch (irq) { case 0: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_NONE; - break; + return TQMX86_REG_IO_EXT_INT_NONE; case 7: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_7; - break; + return TQMX86_REG_IO_EXT_INT_7; case 9: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_9; - break; + return TQMX86_REG_IO_EXT_INT_9; case 12: - gpio_irq_cfg =3D TQMX86_REG_IO_EXT_INT_12; - break; + return TQMX86_REG_IO_EXT_INT_12; default: - pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq); + dev_err(dev, "invalid %s IRQ (%d)\n", label, irq); return -EINVAL; } +} + +static int tqmx86_setup_irq(struct device *dev, const char *label, u8 irq, + void __iomem *io_base, u8 reg_shift) +{ + u8 val, readback; + int irq_cfg; + + irq_cfg =3D tqmx86_irq_to_irq_cfg(dev, label, irq); + if (irq_cfg < 0) + return irq_cfg; + + val =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); + val &=3D ~(TQMX86_REG_IO_EXT_INT_MASK << reg_shift); + val |=3D (irq_cfg & TQMX86_REG_IO_EXT_INT_MASK) << reg_shift; + + iowrite8(val, io_base + TQMX86_REG_IO_EXT_INT); + readback =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); + if (readback !=3D val) { + dev_warn(dev, "%s interrupts not supported\n", label); + return -EINVAL; + } + + return 0; +} + +static int tqmx86_probe(struct platform_device *pdev) +{ + u8 board_id, sauc, rev, i2c_det; + struct device *dev =3D &pdev->dev; + const char *board_name; + void __iomem *io_base; + int err; =20 io_base =3D devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE); if (!io_base) @@ -233,15 +255,11 @@ static int tqmx86_probe(struct platform_device *pdev) */ i2c_det =3D inb(TQMX86_REG_I2C_DETECT); =20 - if (gpio_irq_cfg) { - io_ext_int_val =3D - gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT; - iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT); - readback =3D ioread8(io_base + TQMX86_REG_IO_EXT_INT); - if (readback !=3D io_ext_int_val) { - dev_warn(dev, "GPIO interrupts not supported.\n"); - return -EINVAL; - } + if (gpio_irq) { + err =3D tqmx86_setup_irq(dev, "GPIO", gpio_irq, io_base, + TQMX86_REG_IO_EXT_INT_GPIO_SHIFT); + if (err) + return err; =20 /* Assumes the IRQ resource is first. */ tqmx_gpio_resources[0].start =3D gpio_irq; --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/ From nobody Sat Nov 30 01:46:27 2024 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47E261B5801 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 GPIO IRQ setup can fail either because an invalid IRQ was passed as a parameter, or because the GPIO controller does not support interrupts. Neither is severe enough to stop the whole probe; simply disable IRQ support in the GPIO resource when setup fails. Signed-off-by: Matthias Schiffer --- v2: no changes (was patch 3/4) v3: replace IRQ 0 resource with an empty placeholder to simplify error hand= ling drivers/mfd/tqmx86.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 5aa51ead00a28..979b6816adfa7 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -68,12 +68,12 @@ static const struct resource tqmx_watchdog_resources[] = =3D { DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG), }; =20 -/* - * The IRQ resource must be first, since it is updated with the - * configured IRQ in the probe function. - */ static struct resource tqmx_gpio_resources[] =3D { - DEFINE_RES_IRQ(0), + /* + * Placeholder for IRQ resource - must come first to be filled in by the + * probe function. + */ + {}, DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO), }; =20 @@ -258,13 +258,9 @@ static int tqmx86_probe(struct platform_device *pdev) if (gpio_irq) { err =3D tqmx86_setup_irq(dev, "GPIO", gpio_irq, io_base, TQMX86_REG_IO_EXT_INT_GPIO_SHIFT); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 From: Gregor Herburger The i2c-ocores controller can run in interrupt mode on tqmx86 modules. Add module parameter to allow configuring the IRQ number, similar to the handling of the GPIO IRQ. Signed-off-by: Gregor Herburger Signed-off-by: Matthias Schiffer --- v2: improve module parameter description (was patch 4/4) v3: replace IRQ 0 resource with an empty placeholder to simplify error hand= ling drivers/mfd/tqmx86.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 979b6816adfa7..1bb7179a8c0a6 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -50,6 +50,7 @@ #define TQMX86_REG_IO_EXT_INT_9 2 #define TQMX86_REG_IO_EXT_INT_12 3 #define TQMX86_REG_IO_EXT_INT_MASK 0x3 +#define TQMX86_REG_IO_EXT_INT_I2C_SHIFT 0 #define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT 4 #define TQMX86_REG_SAUC 0x17 =20 @@ -60,7 +61,16 @@ static uint gpio_irq; module_param(gpio_irq, uint, 0); MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (valid parameters: 7, 9, 12)"); =20 -static const struct resource tqmx_i2c_soft_resources[] =3D { +static uint i2c_irq; +module_param(i2c_irq, uint, 0); +MODULE_PARM_DESC(i2c_irq, "I2C IRQ number (valid parameters: 7, 9, 12)"); + +static struct resource tqmx_i2c_soft_resources[] =3D { + /* + * Placeholder for IRQ resource - must come first to be filled in by the + * probe function. + */ + {}, DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), }; =20 @@ -266,6 +276,14 @@ static int tqmx86_probe(struct platform_device *pdev) ocores_platform_data.clock_khz =3D tqmx86_board_id_to_clk_rate(dev, board= _id); =20 if (i2c_det =3D=3D TQMX86_REG_I2C_DETECT_SOFT) { + if (i2c_irq) { + err =3D tqmx86_setup_irq(dev, "I2C", i2c_irq, io_base, + TQMX86_REG_IO_EXT_INT_I2C_SHIFT); + if (!err) + /* Assumes the IRQ resource placeholder is first */ + tqmx_i2c_soft_resources[0] =3D DEFINE_RES_IRQ(i2c_irq); + } + err =3D devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, tqmx86_i2c_soft_dev, ARRAY_SIZE(tqmx86_i2c_soft_dev), --=20 TQ-Systems GmbH | M=C3=BChlstra=C3=9Fe 2, Gut Delling | 82229 Seefeld, Germ= any Amtsgericht M=C3=BCnchen, HRB 105018 Gesch=C3=A4ftsf=C3=BChrer: Detlef Schneider, R=C3=BCdiger Stahl, Stefan Sch= neider https://www.tq-group.com/