From nobody Sun Dec 14 06:15:44 2025 Received: from mta-64-228.siemens.flowmailer.net (mta-64-228.siemens.flowmailer.net [185.136.64.228]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D577C15530C for ; Wed, 28 Aug 2024 07:39:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.228 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724830751; cv=none; b=nP17Nwe89GNLztQdvcFIykJ6MC5qYS2ds91eUPDxcIatehgzMNo2VtLPna1VmBZPAxhdOBSrZRvuhqYXNL/pPFaTmbuRK+uEhaqednlEmZR7dDwygXsui2uOMpZk29hobT4YTdk/j6ebBffsKRDEtm8GDZ1ZO8bLyeKPd4yeuHA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724830751; c=relaxed/simple; bh=xtxuyIa/wDkl6gBOFbgR2DCEEZ442yZ5rhen22WtP5I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bb/8R9brlk3nf9FQ7HgmF62GBFa98aZRhlDtgRVVfFv00jeMiOCWlBpL6+0q6C2XiMmGko2Ld/Uo3oPhtFQTquAx8CQAfwbzwa42tHFjU/fwNHvfo64Fjz8T9CobMeDK2NQuE4TD+8MuVD1legN3RwRu9xp2qHtnpa4l5BCq5oY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b=GrpAFypI; arc=none smtp.client-ip=185.136.64.228 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b="GrpAFypI" Received: by mta-64-228.siemens.flowmailer.net with ESMTPSA id 20240828073902b7c793ec116ad522fb for ; Wed, 28 Aug 2024 09:39:02 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=jan.kiszka@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=x9pt7lsHs5ZT3pCqHVRpcN4kmYqFRl5kXmH0AVDwzNg=; b=GrpAFypIKYzPTizJ//qqJ1pEqdqb+0F3vP96Ug84YmnbQqgJzdssiONH3DZAdUkk43CyAE nFZzxgSpkn0YtykNosRM0wklPEgLRXKDmUL9Nl3ZoHnZAbsSVN5Gz1t+SQcZcKiPsZm0diTr SklPe64XFV6hAyONmjuf5EKffKPD5QxvFHgRgK3m5f22FiMuuoE29lnxY52MMWeGg5QOiTLr 9e3RWdCjxgeJOZH1OS0uPG6QQ4dc5EP8w2I/vkYz4Pmxt+UHwzDD2EinINVNrqwx+dgBSoG4 HZ+Jm+3ecmq7E0iRfCnzBCkQD8YL4SiiAHbnyEgf/847c1ZsWQd64xrA==; From: Jan Kiszka To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bao Cheng Su , Hua Qian Li Subject: [PATCH v2 1/2] arm64: dts: ti: iot2050: Disable lock-step for all iot2050 boards Date: Wed, 28 Aug 2024 09:39:00 +0200 Message-ID: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-294854:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Li Hua Qian The PG1 A variant of the iot2050 series has been identified which partially lacks support for lock-step mode. This implies that all iot2050 boards can't support this mode. As a result, lock-step mode has been disabled across all iot2050 boards for consistency and to avoid potential issues. Signed-off-by: Li Hua Qian Signed-off-by: Jan Kiszka --- arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi | 5 ----- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 5 +++++ arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts | 5 ----- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/= arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi index e2584a5efe34..b3c4c0eec3dc 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi @@ -9,11 +9,6 @@ * Common bits of the IOT2050 Basic and Advanced variants, PG2 */ =20 -&mcu_r5fss0 { - /* lock-step mode not supported on PG2 boards */ - ti,cluster-mode =3D <0>; -}; - &main_pmx0 { cp2102n_reset_pin_default: cp2102n-reset-default-pins { pinctrl-single,pins =3D < diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm6= 4/boot/dts/ti/k3-am65-iot2050-common.dtsi index ef34b851e178..e76828ccf21b 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -635,3 +635,8 @@ icssg0_eth1_phy: ethernet-phy@1 { ti,fifo-depth =3D ; }; }; + +&mcu_r5fss0 { + /* lock-step mode not supported on iot2050 boards */ + ti,cluster-mode =3D <0>; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts b/arch/arm6= 4/boot/dts/ti/k3-am6528-iot2050-basic.dts index 29a31891b3db..4968a47f31ea 100644 --- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts +++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts @@ -22,8 +22,3 @@ / { compatible =3D "siemens,iot2050-basic", "ti,am654"; model =3D "SIMATIC IOT2050 Basic"; }; - -&mcu_r5fss0 { - /* lock-step mode not supported on this board */ - ti,cluster-mode =3D <0>; -}; --=20 2.43.0 From nobody Sun Dec 14 06:15:44 2025 Received: from mta-64-227.siemens.flowmailer.net (mta-64-227.siemens.flowmailer.net [185.136.64.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DEA71158DC3 for ; Wed, 28 Aug 2024 07:39:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724830752; cv=none; b=AlZGgcuN2yoK5mYiBxVL8/EEY16gnSuo9JP42qa/kNmD+CkrYIiVY95m0TI5cQzBlax8j94ySW1/NI7t6WWwsGYGf4KQ5AmGdjrB9knniCyK6D8v6mvQ4vRHwLqamsd5BgxSxfcTbTkPOvHiZC/R5TdwO5aB+9NRq4Iv96d/Sh0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724830752; c=relaxed/simple; bh=D3i8I29dnjYpY2YEOnJRatT2I/uzWa0wJQgTFNjqHio=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pq3lVL+3kYWFDMsHCvZ7goykt2uJMWO9DtM9V5No8EnRM4soeJCpD0ySUrhfRDGW6MkhcQdxIIwlOreq3lTu9OKZw5sTRHg/sIu4LZTP6Tn1hUi56K+XKMMJ7eFOXIFZngj3008odj8HpYuluJKJwx/PrYzs1HeYxNVARG85YRY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b=bKlbx7Ro; arc=none smtp.client-ip=185.136.64.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b="bKlbx7Ro" Received: by mta-64-227.siemens.flowmailer.net with ESMTPSA id 202408280739039f607471c036ac5fb9 for ; Wed, 28 Aug 2024 09:39:03 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=jan.kiszka@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=pqZh8ugBUzS0KjKdpY21bkII61KbUFnlwl/MGSXTO4Q=; b=bKlbx7RoEJQSrMGJkWHFizfDg6uwmDrwowvoiDYQTWvjuqV9gazeQzdx5vFMWM4GNrQpCV PrpKxHTPacSopCR+AIU5boTK3r54SyR/baFmXdu+L1QBBawXzXJvW5x0Efq/9v7uN97qPbeT 8zk5uMnCC85isQItjq0+lvQJiyCHyxQRgApg3QQBHWc6MwTMINF38UbPzXV/0fbIfrmnzTKB AOLkS69KDffYpgv/I3ag2KdQffU7fr7JUoUpaahdIwhSujj+nAnyxFDH15q9FAlpcse45R4C kit/IfTlGijJNzv6F42WbCStNTF1g5ijSQHZX9VpaV3aT3bUpV6TSOkg==; From: Jan Kiszka To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Bao Cheng Su , Hua Qian Li Subject: [PATCH v2 2/2] arm64: dts: ti: iot2050: Add overlays for M.2 used by firmware Date: Wed, 28 Aug 2024 09:39:01 +0200 Message-ID: <91f8b825467651ebd51a4051f153ab136eeb1849.1724830741.git.jan.kiszka@siemens.com> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-294854:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Jan Kiszka To allow firmware to pick up all DTs from here, move the overlays that are normally applied during DT fixup to the kernel source as well. Hook then into the build nevertheless to ensure that regular checks are performed. Signed-off-by: Jan Kiszka --- arch/arm64/boot/dts/ti/Makefile | 6 +++ ...48-iot2050-advanced-m2-bkey-ekey-pcie.dtso | 27 +++++++++++ ...-am6548-iot2050-advanced-m2-bkey-usb3.dtso | 47 +++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bk= ey-ekey-pcie.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bk= ey-usb3.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makef= ile index e20b27ddf901..8dbe7b4979c7 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -73,10 +73,16 @@ k3-am654-gp-evm-dtbs :=3D k3-am654-base-board.dtb \ k3-am654-pcie-usb3.dtbo k3-am654-evm-dtbs :=3D k3-am654-base-board.dtb k3-am654-icssg2.dtbo k3-am654-idk-dtbs :=3D k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-us= b2.dtbo +k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-dtbs :=3D k3-am6548-iot2050-a= dvanced-m2.dtb \ + k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie.dtbo +k3-am6548-iot2050-advanced-m2-bkey-usb3-dtbs :=3D k3-am6548-iot2050-advanc= ed-m2.dtb \ + k3-am6548-iot2050-advanced-m2-bkey-usb3.dtbo dtb-$(CONFIG_ARCH_K3) +=3D k3-am6528-iot2050-basic.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced-m2.dtb +dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie.dtb +dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced-m2-bkey-usb3.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced-pg2.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am6548-iot2050-advanced-sm.dtb dtb-$(CONFIG_ARCH_K3) +=3D k3-am654-base-board.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-ekey= -pcie.dtso b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-ekey= -pcie.dtso new file mode 100644 index 000000000000..666237f6d79c --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie.d= tso @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * IOT2050 M.2 variant, overlay for B-key PCIE0_LANE0 + E-key PCIE1_LANE0 + * Copyright (c) Siemens AG, 2022-2024 + * + * Authors: + * Chao Zeng + * Jan Kiszka + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&pcie0_rc { + num-lanes =3D <1>; + phys =3D <&serdes0 PHY_TYPE_PCIE 1>; + phy-names =3D "pcie-phy0"; + reset-gpios =3D <&main_gpio1 15 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +&pcie1_rc { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-usb3= .dtso b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-usb3.dtso new file mode 100644 index 000000000000..0f86235c9771 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2-bkey-usb3.dtso @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * IOT2050 M.2 variant, overlay for B-key USB3.0 + E-key PCIE1_LANE0 + * Copyright (c) Siemens AG, 2022-2024 + * + * Authors: + * Chao Zeng + * Jan Kiszka + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&serdes0 { + assigned-clock-parents =3D <&k3_clks 153 7>, <&k3_clks 153 4>; +}; + +&pcie0_rc { + status =3D "disabled"; +}; + +&pcie1_rc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&minipcie_pins_default>; + + num-lanes =3D <1>; + phys =3D <&serdes1 PHY_TYPE_PCIE 0>; + phy-names =3D "pcie-phy0"; + reset-gpios =3D <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; + status =3D "okay"; +}; + +&dwc3_0 { + assigned-clock-parents =3D <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e= . PER0_PLL/48 */ + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ + phys =3D <&serdes0 PHY_TYPE_USB3 0>; + phy-names =3D "usb3-phy"; +}; + +&usb0 { + maximum-speed =3D "super-speed"; + snps,dis-u1-entry-quirk; + snps,dis-u2-entry-quirk; +}; --=20 2.43.0