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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:23:56.3535 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 827847d1-7644-4e01-01b8-08dc7bec61ee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9433 Content-Type: text/plain; charset="utf-8" Users can create as many monitor groups as RMIDs supported by the hardware. However, bandwidth monitoring feature on AMD system only guarantees that RMIDs currently assigned to a processor will be tracked by hardware. The counters of any other RMIDs which are no longer being tracked will be reset to zero. The MBM event counters return "Unavailable" for the RMIDs that are not tracked by hardware. So, there can be only limited number of groups that can give guaranteed monitoring numbers. With ever changing configurations there is no way to definitely know which of these groups are being tracked for certain point of time. Users do not have the option to monitor a group or set of groups for certain period of time without worrying about RMID being reset in between. The ABMC feature provides an option to the user to assign a hardware counter to an RMID and monitor the bandwidth as long as it is assigned. The assigned RMID will be tracked by the hardware until the user unassigns it manually. There is no need to worry about counters being reset during this period. Additionally, the user can specify a bitmask identifying the specific bandwidth types from the given source to track with the counter. Without ABMC enabled, monitoring will work in current mode without assignment option. Linux resctrl subsystem provides the interface to count maximum of two memory bandwidth events per group, from a combination of available total and local events. Keeping the current interface, users can enable a maximum of 2 ABMC counters per group. User will also have the option to enable only one counter to the group. If the system runs out of assignable ABMC counters, kernel will display an error. Users need to disable an already enabled counter to make space for new assignments. The feature can be detected via CPUID_Fn80000020_EBX_x00 bit 5. Bits Description 5 ABMC (Assignable Bandwidth Monitoring Counters) The feature details are documented in APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Note: Checkpatch checks/warnings are ignored to maintain coding style. Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 Signed-off-by: Babu Moger --- v4: Changes because of rebase. Feature word 21 has few more additions now. Changed the text to "tracked by hardware" instead of active. v3: Change because of rebase. Actual patch did not change. v2: Added dependency on X86_FEATURE_BMEC. --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/cpuid-deps.c | 3 +++ arch/x86/kernel/cpu/scattered.c | 1 + 3 files changed, 5 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpuf= eatures.h index 3c7434329661..fbe118fa7f88 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -470,6 +470,7 @@ #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* "" BHI_DIS_S HW control availa= ble */ #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* "" BHI_DIS_S HW control ena= bled */ #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch= history at vmexit using SW loop */ +#define X86_FEATURE_ABMC (21*32+ 5) /* "" Assignable Bandwidth Monitoring= Counters */ =20 /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-d= eps.c index b7d9f530ae16..5227a6232e9e 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -70,6 +70,9 @@ static const struct cpuid_dep cpuid_deps[] =3D { { X86_FEATURE_CQM_MBM_LOCAL, X86_FEATURE_CQM_LLC }, { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_TOTAL }, { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_LOCAL }, + { X86_FEATURE_ABMC, X86_FEATURE_CQM_MBM_TOTAL }, + { X86_FEATURE_ABMC, X86_FEATURE_CQM_MBM_LOCAL }, + { X86_FEATURE_ABMC, X86_FEATURE_BMEC }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index af5aa2c754c2..411b18c962bb 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -48,6 +48,7 @@ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, + { X86_FEATURE_ABMC, CPUID_EBX, 5, 0x80000020, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_PMC_FREEZE, CPUID_EAX, 2, 0x80000022, 0 }, --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2049.outbound.protection.outlook.com [40.107.94.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BA3B86267; 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Fri, 24 May 2024 07:24:02 -0500 From: Babu Moger To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 02/19] x86/resctrl: Add ABMC feature in the command line options Date: Fri, 24 May 2024 07:23:21 -0500 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044EF:EE_|MW4PR12MB7215:EE_ X-MS-Office365-Filtering-Correlation-Id: 174a0570-a889-426e-5a69-08dc7bec67f5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|376005|1800799015|7416005|36860700004|82310400017; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?dqYdIxMwv+yFPLKwV3xOFfqVHFVxHQxqM7bqYHzDhEj7J9QY9v9TZul5/C/n?= =?us-ascii?Q?dSXr3JUC3gChnSlcAT1TroxJ5YrsvN4iRemWzIAXAeofYfcQgSX8jxtj0kVN?= =?us-ascii?Q?BQZJRQuzYMSiTcxhvns/2zOM8D2oRTSA+2kRIAkJVHg0Xh6Wmk1nhShmVswb?= =?us-ascii?Q?rW99KKT7cWDKe+S7H6rKK74bQPQ+1twoPhhrVUohnucq9pg+MM33uJESZiyE?= =?us-ascii?Q?tLmuFGMKGRSgMr/YaXwXQ6M9M27ZqTrfC+/qU18lmDGhZ6pHvXS/ZNHwUVo+?= =?us-ascii?Q?HsNKrJc+Wuw2TENs8p4MGPFDvImEwumNFcB1Kvwn0dKW/uDXKW/dR4fgj2A9?= =?us-ascii?Q?82YfBk6VU9+Q4CgYhXX8+gQysCwHbGleFVrXMxnG4+m99wPSE6jmmPtobC7+?= =?us-ascii?Q?NHXg/FXTe1drWClMnRmQ9TD/6O9NWkdMPGhPVnYa5EeIw7MJ78NbRAZWpPbB?= =?us-ascii?Q?wK7cA+1zLwMDIJ2NAa2oPZjGTmBosqmBAiTPVKoQ+t0DEplLruU54FY5xquT?= =?us-ascii?Q?1EJ/z3JQhjyRNDJEIt2mDa+pvTqngf6luFEFsbXaLd9VreAT4gtWOQAtt3cw?= =?us-ascii?Q?UR72LaAUxjMtLKg6zVvDLfID60PBHhrHypDTR/L5YIBbSO76dLMZXvpP9tRA?= =?us-ascii?Q?AERJfA46J1u5DoJ0D+H0jGMh5KsKgBnp+eKlEGojzbfT7WulZu96WzLL0HTF?= =?us-ascii?Q?YXtYI5wY1uq4a5TmHA4ohRFLnf1HPfA0C+nnJRwWIxSPegskQVG/flkKy8Bi?= =?us-ascii?Q?5a6RlgsuBffqjMU8U4EO21/WCV0FO73qgijdmysh9t9sMXhaCgAKpbo6ONAe?= =?us-ascii?Q?+lBT4xVuXFGNeTde7Fk0t/QmSpbUdTbdtZnBujbntni6oCS+ZnDSRMcfNMiV?= =?us-ascii?Q?vbPY01axA0E7wE3X9q57E+es5944BQ7u5biYK6zQkMANuw0iT+xv8wkyAZ9M?= =?us-ascii?Q?LJp7m1vfz2AlJ4VxXJv2toeJE8CBTj2c1TewadmCK2IxfrXsug1Qd1m+KESS?= =?us-ascii?Q?ZysJWoaMTmB+jcbFTKyeOJRCByhTVY4leccw+N8BKwRrpJS0/53jidPyflLA?= =?us-ascii?Q?r3qlblCnSQ0RwOR6hcGtsDPH98mMhVcE2r4A3djOM38NnUdCFKX4FxAgXUWl?= =?us-ascii?Q?9rg32ALFvfic/y/RmxnwdS9SH2/BWUc4AoAp8YDGnpMYxEr1Jw6Q4HG1WukS?= =?us-ascii?Q?mFI6rlxMP1HoKqE0ddMGAphdAV/8uIGc+ua61WkrxED73LReP0tRCCnKLWDJ?= =?us-ascii?Q?UUlKcwnfVFLHfyI7GqLT8yIzZL2+4zGMFNMM8BHgWWDi515BruFC3MFMS9da?= =?us-ascii?Q?gF7BWAnG2e7ZJyY9ufPn/Rg2oSYA1i6W42o0KXgzJqdgDaluEULA0VrwXw7Y?= =?us-ascii?Q?nBU/yn1t2kChzdGy+0gS9iMvHGQQ?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(376005)(1800799015)(7416005)(36860700004)(82310400017);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:06.4680 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 174a0570-a889-426e-5a69-08dc7bec67f5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7215 Content-Type: text/plain; charset="utf-8" Add the command line option to enable or disable the new resctrl feature ABMC (Assignable Bandwidth Monitoring Counters). Signed-off-by: Babu Moger --- v4: No changes v3: No changes v2: No changes --- Documentation/admin-guide/kernel-parameters.txt | 2 +- Documentation/arch/x86/resctrl.rst | 1 + arch/x86/kernel/cpu/resctrl/core.c | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index 500cfa776225..66a1be9d0ea6 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -5602,7 +5602,7 @@ rdt=3D [HW,X86,RDT] Turn on/off individual RDT features. List is: cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, - mba, smba, bmec. + mba, smba, bmec, abmc. E.g. to turn on cmt and turn off mba use: rdt=3Dcmt,!mba =20 diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index 627e23869bca..02790efaabcc 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -26,6 +26,7 @@ MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_= mbm_local" MBA (Memory Bandwidth Allocation) "mba" SMBA (Slow Memory Bandwidth Allocation) "" BMEC (Bandwidth Monitoring Event Configuration) "" +ABMC (Assignable Bandwidth Monitoring Counters) "" =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D =20 Historically, new features were made visible by default in /proc/cpuinfo. = This diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index a113d9aba553..df1b43fd9f0e 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -651,6 +651,7 @@ enum { RDT_FLAG_MBA, RDT_FLAG_SMBA, RDT_FLAG_BMEC, + RDT_FLAG_ABMC, }; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:14.4209 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8e4f2fd-99fd-4f41-e222-08dc7bec6cb2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7334 Content-Type: text/plain; charset="utf-8" Consolidate all the data related to monitoring into separate structure for better readability. Suggested-by: Reinette Chatre Signed-off-by: Babu Moger --- v4: New patch. --- arch/x86/kernel/cpu/resctrl/core.c | 2 +- arch/x86/kernel/cpu/resctrl/monitor.c | 16 ++++++++-------- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 ++++---- include/linux/resctrl.h | 16 ++++++++++++---- 4 files changed, 25 insertions(+), 17 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index df1b43fd9f0e..6cf3c887c693 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -535,7 +535,7 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) return; } =20 - if (r->mon_capable && arch_domain_mbm_alloc(r->num_rmid, hw_dom)) { + if (r->mon_capable && arch_domain_mbm_alloc(r->mon.num_rmid, hw_dom)) { domain_free(hw_dom); return; } diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 2345e6836593..b35d04fc761b 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -254,11 +254,11 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource = *r, struct rdt_domain *d) =20 if (is_mbm_total_enabled()) memset(hw_dom->arch_mbm_total, 0, - sizeof(*hw_dom->arch_mbm_total) * r->num_rmid); + sizeof(*hw_dom->arch_mbm_total) * r->mon.num_rmid); =20 if (is_mbm_local_enabled()) memset(hw_dom->arch_mbm_local, 0, - sizeof(*hw_dom->arch_mbm_local) * r->num_rmid); + sizeof(*hw_dom->arch_mbm_local) * r->mon.num_rmid); } =20 static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int widt= h) @@ -1004,14 +1004,14 @@ static struct mon_evt mbm_local_event =3D { */ static void l3_mon_evt_init(struct rdt_resource *r) { - INIT_LIST_HEAD(&r->evt_list); + INIT_LIST_HEAD(&r->mon.evt_list); =20 if (is_llc_occupancy_enabled()) - list_add_tail(&llc_occupancy_event.list, &r->evt_list); + list_add_tail(&llc_occupancy_event.list, &r->mon.evt_list); if (is_mbm_total_enabled()) - list_add_tail(&mbm_total_event.list, &r->evt_list); + list_add_tail(&mbm_total_event.list, &r->mon.evt_list); if (is_mbm_local_enabled()) - list_add_tail(&mbm_local_event.list, &r->evt_list); + list_add_tail(&mbm_local_event.list, &r->mon.evt_list); } =20 int __init rdt_get_mon_l3_config(struct rdt_resource *r) @@ -1023,7 +1023,7 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) =20 resctrl_rmid_realloc_limit =3D boot_cpu_data.x86_cache_size * 1024; hw_res->mon_scale =3D boot_cpu_data.x86_cache_occ_scale; - r->num_rmid =3D boot_cpu_data.x86_cache_max_rmid + 1; + r->mon.num_rmid =3D boot_cpu_data.x86_cache_max_rmid + 1; hw_res->mbm_width =3D MBM_CNTR_WIDTH_BASE; =20 if (mbm_offset > 0 && mbm_offset <=3D MBM_CNTR_WIDTH_OFFSET_MAX) @@ -1038,7 +1038,7 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) * * For a 35MB LLC and 56 RMIDs, this is ~1.8% of the LLC. */ - threshold =3D resctrl_rmid_realloc_limit / r->num_rmid; + threshold =3D resctrl_rmid_realloc_limit / r->mon.num_rmid; =20 /* * Because num_rmid may not be a power of two, round the value diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 02f213f1c51c..7114d58ef1e3 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1098,7 +1098,7 @@ static int rdt_num_rmids_show(struct kernfs_open_file= *of, { struct rdt_resource *r =3D of->kn->parent->priv; =20 - seq_printf(seq, "%d\n", r->num_rmid); + seq_printf(seq, "%d\n", r->mon.num_rmid); =20 return 0; } @@ -1109,7 +1109,7 @@ static int rdt_mon_features_show(struct kernfs_open_f= ile *of, struct rdt_resource *r =3D of->kn->parent->priv; struct mon_evt *mevt; =20 - list_for_each_entry(mevt, &r->evt_list, list) { + list_for_each_entry(mevt, &r->mon.evt_list, list) { seq_printf(seq, "%s\n", mevt->name); if (mevt->configurable) seq_printf(seq, "%s_config\n", mevt->name); @@ -3042,14 +3042,14 @@ static int mkdir_mondata_subdir(struct kernfs_node = *parent_kn, if (ret) goto out_destroy; =20 - if (WARN_ON(list_empty(&r->evt_list))) { + if (WARN_ON(list_empty(&r->mon.evt_list))) { ret =3D -EPERM; goto out_destroy; } =20 priv.u.rid =3D r->rid; priv.u.domid =3D d->id; - list_for_each_entry(mevt, &r->evt_list, list) { + list_for_each_entry(mevt, &r->mon.evt_list, list) { priv.u.evtid =3D mevt->evtid; ret =3D mon_addfile(kn, mevt->name, priv.priv); if (ret) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index a365f67131ec..bf99eb9c6ce4 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -150,22 +150,31 @@ struct resctrl_membw { struct rdt_parse_data; struct resctrl_schema; =20 +/** + * struct resctrl_mon - Monitoring related data + * @num_rmid: Number of RMIDs available + * @evt_list: List of monitoring events + */ +struct resctrl_mon { + int num_rmid; + struct list_head evt_list; +}; + /** * struct rdt_resource - attributes of a resctrl resource * @rid: The index of the resource * @alloc_capable: Is allocation available on this machine * @mon_capable: Is monitor feature available on this machine - * @num_rmid: Number of RMIDs available * @cache_level: Which cache level defines scope of this resource * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. + * @mon: Monitoring related data. * @domains: RCU list of all domains for this resource * @name: Name to use in "schemata" file. * @data_width: Character width of data when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. * @format_str: Per resource format string to show domain value * @parse_ctrlval: Per resource function pointer to parse control values - * @evt_list: List of monitoring events * @fflags: flags to choose base and info files * @cdp_capable: Is the CDP feature available on this resource */ @@ -173,10 +182,10 @@ struct rdt_resource { int rid; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:22.0929 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a416490c-3fe5-4e60-86f3-08dc7bec7145 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6934 Content-Type: text/plain; charset="utf-8" ABMC feature details are reported via CPUID Fn8000_0020_EBX_x5. Bits Description 15:0 MAX_ABMC Maximum Supported Assignable Bandwidth Monitoring Counter ID + 1 The feature details are documented in APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 Signed-off-by: Babu Moger --- v4: Removed resctrl_arch_has_abmc(). Added all the code inline. We dont need to separate this as arch code. v3: Removed changes related to mon_features. Moved rdt_cpu_has to core.c and added new function resctrl_arch_has_abm= c. Also moved the fields mbm_assign_capable and mbm_assign_cntrs to rdt_resource. (James) v2: Changed the field name to mbm_assign_capable from abmc_capable. --- arch/x86/kernel/cpu/resctrl/monitor.c | 14 ++++++++++++++ include/linux/resctrl.h | 4 ++++ 2 files changed, 18 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index b35d04fc761b..1602b58ba23d 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1066,6 +1066,20 @@ int __init rdt_get_mon_l3_config(struct rdt_resource= *r) mbm_local_event.configurable =3D true; mbm_config_rftype_init("mbm_local_bytes_config"); } + + if (rdt_cpu_has(X86_FEATURE_ABMC)) { + r->abmc_capable =3D true; + /* + * Query CPUID_Fn80000020_EBX_x05 for number of + * ABMC counters + */ + cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx); + r->mon.num_cntrs =3D (ebx & 0xFFFF) + 1; + if (r->mon.num_cntrs > 64) { + WARN(1, "Cannot support more than 64 ABMC counters\n"); + r->mon.num_cntrs =3D 64; + } + } } =20 l3_mon_evt_init(r); diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index bf99eb9c6ce4..24087e6efbb6 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -153,10 +153,12 @@ struct resctrl_schema; /** * struct resctrl_mon - Monitoring related data * @num_rmid: Number of RMIDs available + * @num_cntrs: Maximum number of abmc counters * @evt_list: List of monitoring events */ struct resctrl_mon { int num_rmid; + int num_cntrs; struct list_head evt_list; }; =20 @@ -177,6 +179,7 @@ struct resctrl_mon { * @parse_ctrlval: Per resource function pointer to parse control values * @fflags: flags to choose base and info files * @cdp_capable: Is the CDP feature available on this resource + * @abmc_capable: Is system capable of supporting monitor assignment? */ struct rdt_resource { int rid; @@ -196,6 +199,7 @@ struct rdt_resource { struct rdt_domain *d); unsigned long fflags; bool cdp_capable; + bool abmc_capable; }; =20 /** --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2046.outbound.protection.outlook.com [40.107.93.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 06F6D8626A; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:29.7024 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 60c47496-2f84-443f-42e4-08dc7bec75cc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5850 Content-Type: text/plain; charset="utf-8" The functions thread_throttle_mode_init() and mbm_config_rftype_init() both initialize fflags for resctrl files. Adding the new files will involve adding another function to initialize the fflags. All of this can be simplified by adding a new function resctrl_file_fflags_init() and passing the file name and flags to be initialized. Consolidate multiple fflags initialization into resctrl_file_fflags_init() and remove thread_throttle_mode_init() and mbm_config_rftype_init(). Signed-off-by: Babu Moger --- v4: Commit message update. v3: New patch to display ABMC capability. --- arch/x86/kernel/cpu/resctrl/core.c | 4 +++- arch/x86/kernel/cpu/resctrl/internal.h | 4 ++-- arch/x86/kernel/cpu/resctrl/monitor.c | 6 ++++-- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 16 +++------------- 4 files changed, 12 insertions(+), 18 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 6cf3c887c693..ec93f6a50308 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -224,7 +224,9 @@ static bool __get_mem_config_intel(struct rdt_resource = *r) r->membw.throttle_mode =3D THREAD_THROTTLE_PER_THREAD; else r->membw.throttle_mode =3D THREAD_THROTTLE_MAX; - thread_throttle_mode_init(); + + resctrl_file_fflags_init("thread_throttle_mode", + RFTYPE_CTRL_INFO | RFTYPE_RES_MB); =20 r->alloc_capable =3D true; =20 diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index f1d926832ec8..d566251094b2 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -603,8 +603,8 @@ void cqm_handle_limbo(struct work_struct *work); bool has_busy_rmid(struct rdt_domain *d); void __check_limbo(struct rdt_domain *d, bool force_free); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); -void __init thread_throttle_mode_init(void); -void __init mbm_config_rftype_init(const char *config); +void __init resctrl_file_fflags_init(const char *config, + unsigned long fflags); void rdt_staged_configs_clear(void); bool closid_allocated(unsigned int closid); int resctrl_find_cleanest_closid(void); diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 1602b58ba23d..0db9f12debb9 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1060,11 +1060,13 @@ int __init rdt_get_mon_l3_config(struct rdt_resourc= e *r) =20 if (rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL)) { mbm_total_event.configurable =3D true; - mbm_config_rftype_init("mbm_total_bytes_config"); + resctrl_file_fflags_init("mbm_total_bytes_config", + RFTYPE_MON_INFO | RFTYPE_RES_CACHE); } if (rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL)) { mbm_local_event.configurable =3D true; - mbm_config_rftype_init("mbm_local_bytes_config"); + resctrl_file_fflags_init("mbm_local_bytes_config", + RFTYPE_MON_INFO | RFTYPE_RES_CACHE); } =20 if (rdt_cpu_has(X86_FEATURE_ABMC)) { diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 7114d58ef1e3..aa3eb6ea059a 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -2022,24 +2022,14 @@ static struct rftype *rdtgroup_get_rftype_by_name(c= onst char *name) return NULL; } =20 -void __init thread_throttle_mode_init(void) -{ - struct rftype *rft; - - rft =3D rdtgroup_get_rftype_by_name("thread_throttle_mode"); - if (!rft) - return; - - rft->fflags =3D RFTYPE_CTRL_INFO | RFTYPE_RES_MB; -} - -void __init mbm_config_rftype_init(const char *config) +void __init resctrl_file_fflags_init(const char *config, + unsigned long fflags) { struct rftype *rft; =20 rft =3D rdtgroup_get_rftype_by_name(config); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:37.4472 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9d6717a6-e873-4ed3-680a-08dc7bec7a6c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6209 Content-Type: text/plain; charset="utf-8" The ABMC feature provides an option to the user to assign a hardware counter to an RMID and monitor the bandwidth as long as the counter is assigned. Number of assignments depend on number of ABMC counters available. Provide the interface to display the number of ABMC counters supported. Signed-off-by: Babu Moger --- v4: Changed the counter name to num_cntrs. And few text changes. v3: Changed the field name to mbm_assign_cntrs. v2: Changed the field name to mbm_assignable_counters from abmc_counters. --- Documentation/arch/x86/resctrl.rst | 4 ++++ arch/x86/kernel/cpu/resctrl/monitor.c | 1 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 16 ++++++++++++++++ 3 files changed, 21 insertions(+) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index 02790efaabcc..7ab8172ef208 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -257,6 +257,10 @@ with the following files: # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config 0=3D0x30;1=3D0x30;3=3D0x15;4=3D0x15 =20 +"num_cntrs": + Available when ABMC feature is supported. The number of ABMC counters + available for configuration. + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 0db9f12debb9..e75a6146068b 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1081,6 +1081,7 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) WARN(1, "Cannot support more than 64 ABMC counters\n"); r->mon.num_cntrs =3D 64; } + resctrl_file_fflags_init("num_cntrs", RFTYPE_MON_INFO); } } =20 diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index aa3eb6ea059a..ca692712b393 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -846,6 +846,16 @@ static int rdtgroup_rmid_show(struct kernfs_open_file = *of, return ret; } =20 +static int rdtgroup_num_cntrs_show(struct kernfs_open_file *of, + struct seq_file *s, void *v) +{ + struct rdt_resource *r =3D of->kn->parent->priv; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:45.1868 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 060c938c-1303-46fd-60f7-08dc7bec7f09 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6453 Content-Type: text/plain; charset="utf-8" Add the functionality to enable/disable ABMC feature. ABMC feature is enabled by setting enabled bit(0) in MSR L3_QOS_EXT_CFG. When the state of ABMC is changed, the MSR needs to be updated on all the logical processors in the QOS Domain. Hardware counters will reset when ABMC state is changed. Kernel internal counters need to be reset to avoid overflow condition in the next update. The ABMC feature details are documented in APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 --- v4: Removed resctrl_arch_set_abmc_enabled and resctrl_arch_get_abmc_enabled. Directly calling resctrl_abmc_enable and resctrl_abmc_disable. Renamed couple of functions. resctrl_abmc_msrwrite() -> resctrl_abmc_set_one() resctrl_abmc_setup() -> resctrl_abmc_set_all() Added rdtgroup_mutex lockdep asserts. Updated commit log and code comments. v3: No changes. v2: Few text changes in commit message. --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/internal.h | 8 ++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 62 ++++++++++++++++++++++++++ 3 files changed, 71 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index e022e6eb766c..5f9a0139e98c 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1171,6 +1171,7 @@ #define MSR_IA32_MBA_BW_BASE 0xc0000200 #define MSR_IA32_SMBA_BW_BASE 0xc0000280 #define MSR_IA32_EVT_CFG_BASE 0xc0000400 +#define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff =20 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index d566251094b2..fabe40304798 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -97,6 +97,9 @@ cpumask_any_housekeeping(const struct cpumask *mask, int = exclude_cpu) return cpu; } =20 +/* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature */ +#define ABMC_ENABLE BIT(0) + struct rdt_fs_context { struct kernfs_fs_context kfc; bool enable_cdpl2; @@ -436,6 +439,7 @@ struct rdt_parse_data { * @mbm_cfg_mask: Bandwidth sources that can be tracked when Bandwidth * Monitoring Event Configuration (BMEC) is supported. * @cdp_enabled: CDP state of this resource + * @abmc_enabled: ABMC feature is enabled * * Members of this structure are either private to the architecture * e.g. mbm_width, or accessed via helpers that provide abstraction. e.g. @@ -450,6 +454,7 @@ struct rdt_hw_resource { unsigned int mbm_width; unsigned int mbm_cfg_mask; bool cdp_enabled; + bool abmc_enabled; }; =20 static inline struct rdt_hw_resource *resctrl_to_arch_res(struct rdt_resou= rce *r) @@ -493,6 +498,9 @@ static inline bool resctrl_arch_get_cdp_enabled(enum re= sctrl_res_level l) =20 int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable); =20 +int resctrl_abmc_enable(enum resctrl_res_level l); +void resctrl_abmc_disable(enum resctrl_res_level l); + /* * To return the common struct rdt_resource, which is contained in struct * rdt_hw_resource, walk the resctrl member of struct rdt_hw_resource. diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index ca692712b393..9148d1234ede 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -2416,6 +2416,68 @@ int resctrl_arch_set_cdp_enabled(enum resctrl_res_le= vel l, bool enable) return 0; } =20 +static void resctrl_abmc_set_one(void *arg) +{ + bool *enable =3D arg; + u64 msrval; + + rdmsrl(MSR_IA32_L3_QOS_EXT_CFG, msrval); + + if (*enable) + msrval |=3D ABMC_ENABLE; + else + msrval &=3D ~ABMC_ENABLE; + + wrmsrl(MSR_IA32_L3_QOS_EXT_CFG, msrval); +} + +static int resctrl_abmc_set_all(enum resctrl_res_level l, bool enable) +{ + struct rdt_resource *r =3D &rdt_resources_all[l].r_resctrl; + struct rdt_domain *d; + + /* + * Update QOS_CFG MSR on all the CPUs associated with the resource + * Hardware counters will reset after switching the monotor mode. + * Reset the internal counters so that it is not considered as + * an overflow in next update. + */ + list_for_each_entry(d, &r->domains, list) { + on_each_cpu_mask(&d->cpu_mask, resctrl_abmc_set_one, &enable, 1); + resctrl_arch_reset_rmid_all(r, d); + } + + return 0; +} + +int resctrl_abmc_enable(enum resctrl_res_level l) +{ + struct rdt_hw_resource *hw_res =3D &rdt_resources_all[l]; + int ret =3D 0; + + lockdep_assert_held(&rdtgroup_mutex); + + if (!hw_res->abmc_enabled) { + ret =3D resctrl_abmc_set_all(l, true); + if (!ret) + hw_res->abmc_enabled =3D true; + } + + return ret; +} + +void resctrl_abmc_disable(enum resctrl_res_level l) +{ + struct rdt_hw_resource *hw_res =3D &rdt_resources_all[l]; + + lockdep_assert_held(&rdtgroup_mutex); + + if (hw_res->abmc_enabled) { + resctrl_abmc_set_all(l, false); + hw_res->abmc_enabled =3D false; + } +} + /* * We don't allow rdtgroup directories to be created anywhere * except the root directory. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:24:55.7139 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 801b6850-356c-4117-b0de-08dc7bec854f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044EE.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5734 Content-Type: text/plain; charset="utf-8" The ABMC feature provides an option to the user to assign a hardware counter to an RMID and monitor the bandwidth as long as it is assigned. ABMC mode is enabled by default when supported. System can be one mode at a time (Legacy monitor mode or ABMC mode). Provide an interface to display the monitor mode on the system. $cat /sys/fs/resctrl/info/L3_MON/mbm_assign [abmc] legacy Signed-off-by: Babu Moger --- v4: Fixed the checks for legacy and abmc mode. Default it ABMC. v3: New patch to display ABMC capability. --- Documentation/arch/x86/resctrl.rst | 10 ++++++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 1 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 23 +++++++++++++++++++++++ 3 files changed, 34 insertions(+) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index 7ab8172ef208..ab3cde61a124 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -261,6 +261,16 @@ with the following files: Available when ABMC feature is supported. The number of ABMC counters available for configuration. =20 +"mbm_assign": + Available when ABMC feature is supported. Reports the list of assignable + monitoring features supported. The enclosed brackets indicate which + feature is enabled. + :: + + cat /sys/fs/resctrl/info/L3_MON/mbm_assign + [abmc] + mbm_legacy + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index e75a6146068b..b1d002e5e93d 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1071,6 +1071,7 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) =20 if (rdt_cpu_has(X86_FEATURE_ABMC)) { r->abmc_capable =3D true; + resctrl_file_fflags_init("mbm_assign", RFTYPE_MON_INFO); /* * Query CPUID_Fn80000020_EBX_x05 for number of * ABMC counters diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 9148d1234ede..3071bbb7a15e 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -856,6 +856,23 @@ static int rdtgroup_num_cntrs_show(struct kernfs_open_= file *of, return 0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:04.9993 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ea551f11-d361-47d0-8865-08dc7bec8ad8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044EF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8076 Content-Type: text/plain; charset="utf-8" Hardware provides a set of counters when the ABMC feature is supported. These counters are used for enabling the events in resctrl group when the feature is supported. Introduce num_cntrs_free_map bitmap to track available and free counters. Signed-off-by: Babu Moger --- v4: Changed the name to num_cntrs where applicable. Used bitmap apis. Added more comments for the globals. v3: Changed the bitmap name to assign_cntrs_free_map. Removed abmc from the name. v2: Changed the bitmap name to assignable_counter_free_map from abmc_counter_free_map. --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 3071bbb7a15e..400ae405e10e 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -186,6 +186,23 @@ bool closid_allocated(unsigned int closid) return !test_bit(closid, &closid_free_map); } =20 +/* + * ABMC Counter bitmap and length for tracking available counters. + * ABMC feature provides set of hardware counters for enabling events. + * Each event takes one hardware counter. Kernel needs to keep track + * of number of available counters. + */ +static unsigned long num_cntrs_free_map; +static u32 num_cntrs_free_map_len; + +static void num_cntrs_init(void) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + + bitmap_fill(&num_cntrs_free_map, r->mon.num_cntrs); + num_cntrs_free_map_len =3D r->mon.num_cntrs; +} + /** * rdtgroup_mode_by_closid - Return mode of resource group with closid * @closid: closid if the resource group @@ -2459,6 +2476,12 @@ static int resctrl_abmc_set_all(enum resctrl_res_lev= el l, bool enable) struct rdt_resource *r =3D &rdt_resources_all[l].r_resctrl; struct rdt_domain *d; =20 + /* + * The bitmap num_cntrs_free_map needs to be reset when switching + * the monitor mode. + */ + num_cntrs_init(); + /* * Update QOS_CFG MSR on all the CPUs associated with the resource * Hardware counters will reset after switching the monotor mode. --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2061.outbound.protection.outlook.com [40.107.93.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C48E1292C1; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:12.8406 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f9fffd3-5e72-457f-53a2-08dc7bec8f74 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000014A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5741 Content-Type: text/plain; charset="utf-8" The ABMC feature provides an option to the user to assign a hardware counter to an RMID and monitor the bandwidth as long as it is assigned. There are two events per resctrl group, mbm total and mbm local. User have the option to assign or unassign each event individually. Add a new field mon_state in mongroup data structure to represent the assignment state of the group. Reset the states when switching the monitor mode. Signed-off-by: Babu Moger --- v4: Changed ASSIGN_TOTAL and ASSIGN_LOCAL to use QOS_L3_MBM_TOTAL_EVENT_ID and QOS_L3_MBM_LOCAL_EVENT_ID. Few more commit text changes. v3: Changed the field name to mon_state. Also thie state is not visible to users directly as part of out global assign approach. v2: Added check to display "Unsupported" when user tries to access monitor state when ABMC is not enabled. --- arch/x86/kernel/cpu/resctrl/internal.h | 9 +++++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 8 ++++++++ 2 files changed, 17 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index fabe40304798..5e7e76cd512f 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -100,6 +100,13 @@ cpumask_any_housekeeping(const struct cpumask *mask, i= nt exclude_cpu) /* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature */ #define ABMC_ENABLE BIT(0) =20 +/* + * monitor group's state when ABMC is supported + */ +#define ASSIGN_NONE 0 +#define ASSIGN_TOTAL BIT(QOS_L3_MBM_TOTAL_EVENT_ID) +#define ASSIGN_LOCAL BIT(QOS_L3_MBM_LOCAL_EVENT_ID) + struct rdt_fs_context { struct kernfs_fs_context kfc; bool enable_cdpl2; @@ -203,12 +210,14 @@ enum rdtgrp_mode { * @parent: parent rdtgrp * @crdtgrp_list: child rdtgroup node list * @rmid: rmid for this rdtgroup + * @mon_state: Assignment state of the group */ struct mongroup { struct kernfs_node *mon_data_kn; struct rdtgroup *parent; struct list_head crdtgrp_list; u32 rmid; + u32 mon_state; }; =20 /** diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 400ae405e10e..c176bacf7ba1 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -2474,6 +2474,7 @@ static void resctrl_abmc_set_one(void *arg) static int resctrl_abmc_set_all(enum resctrl_res_level l, bool enable) { struct rdt_resource *r =3D &rdt_resources_all[l].r_resctrl; + struct rdtgroup *prgrp, *crgrp; struct rdt_domain *d; =20 /* @@ -2493,6 +2494,13 @@ static int resctrl_abmc_set_all(enum resctrl_res_lev= el l, bool enable) resctrl_arch_reset_rmid_all(r, d); } =20 + /* Reset assign state for all the monitor groups */ + list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) { + prgrp->mon.mon_state =3D ASSIGN_NONE; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:18.7440 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1f3f9ec1-2e2b-4199-565d-08dc7bec9313 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4085 Content-Type: text/plain; charset="utf-8" If the BMEC (Bandwidth Monitoring Event Configuration) feature is supported, the bandwidth events can be configured to track specific events. The event configuration is domain specific. ABMC (Assignable Bandwidth Monitoring Counters) feature needs event configuration information to assign hardware counter to an RMID. Event configurations are not stored in resctrl but instead always read from or written to hardware directly when prompted by user space. Read the event configuration from the hardware during the domain initialization. Save the configuration information in the rdt_hw_domain, so it can be used for counter assignment. Signed-off-by: Babu Moger --- v4: Read the configuration information from the hardware to initialize. Added few commit messages. Fixed the tab spaces. v3: Minor changes related to rebase in mbm_config_write_domain. v2: No changes. --- arch/x86/kernel/cpu/resctrl/core.c | 2 ++ arch/x86/kernel/cpu/resctrl/internal.h | 5 +++++ arch/x86/kernel/cpu/resctrl/monitor.c | 21 +++++++++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index ec93f6a50308..856c46d12177 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -542,6 +542,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) return; } =20 + arch_domain_mbm_evt_config(hw_dom); + list_add_tail_rcu(&d->list, add_pos); =20 err =3D resctrl_online_domain(r, d); diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 5e7e76cd512f..60a1ca0a11a7 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -373,6 +373,8 @@ struct arch_mbm_state { * @ctrl_val: array of cache or mem ctrl values (indexed by CLOSID) * @arch_mbm_total: arch private state for MBM total bandwidth * @arch_mbm_local: arch private state for MBM local bandwidth + * @mbm_total_cfg: MBM total bandwidth configuration + * @mbm_local_cfg: MBM local bandwidth configuration * * Members of this structure are accessed via helpers that provide abstrac= tion. */ @@ -381,6 +383,8 @@ struct rdt_hw_domain { u32 *ctrl_val; struct arch_mbm_state *arch_mbm_total; struct arch_mbm_state *arch_mbm_local; + u32 mbm_total_cfg; + u32 mbm_local_cfg; }; =20 static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain = *r) @@ -622,6 +626,7 @@ void __check_limbo(struct rdt_domain *d, bool force_fre= e); void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init resctrl_file_fflags_init(const char *config, unsigned long fflags); +void arch_domain_mbm_evt_config(struct rdt_hw_domain *hw_dom); void rdt_staged_configs_clear(void); bool closid_allocated(unsigned int closid); int resctrl_find_cleanest_closid(void); diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index b1d002e5e93d..ab0f4bb49bd9 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1093,6 +1093,27 @@ int __init rdt_get_mon_l3_config(struct rdt_resource= *r) return 0; } =20 +void arch_domain_mbm_evt_config(struct rdt_hw_domain *hw_dom) +{ + u64 msrval; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:26.5385 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b477f1b7-6134-4b4b-2694-08dc7bec97af X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8800 Content-Type: text/plain; charset="utf-8" The event configuration is domain specific and initialized during domain initialization. It is not required to read the configuration register every time user asks for it. Use the value stored in rdt_hw_domain instead. Signed-off-by: Babu Moger --- v4: New patch. --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 55 ++++++++++++-------------- 1 file changed, 25 insertions(+), 30 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index c176bacf7ba1..0e425c91fa46 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1618,46 +1618,30 @@ static inline unsigned int mon_event_config_index_g= et(u32 evtid) } } =20 -static void mon_event_config_read(void *info) -{ - struct mon_config_info *mon_info =3D info; - unsigned int index; - u64 msrval; - - index =3D mon_event_config_index_get(mon_info->evtid); - if (index =3D=3D INVALID_CONFIG_INDEX) { - pr_warn_once("Invalid event id %d\n", mon_info->evtid); - return; - } - rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval); - - /* Report only the valid event configuration bits */ - mon_info->mon_config =3D msrval & MAX_EVT_CONFIG_BITS; -} - -static void mondata_config_read(struct rdt_domain *d, struct mon_config_in= fo *mon_info) -{ - smp_call_function_any(&d->cpu_mask, mon_event_config_read, mon_info, 1); -} - static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32= evtid) { - struct mon_config_info mon_info =3D {0}; struct rdt_domain *dom; bool sep =3D false; + u32 val; =20 cpus_read_lock(); mutex_lock(&rdtgroup_mutex); =20 list_for_each_entry(dom, &r->domains, list) { + struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(dom); if (sep) seq_puts(s, ";"); =20 - memset(&mon_info, 0, sizeof(struct mon_config_info)); - mon_info.evtid =3D evtid; - mondata_config_read(dom, &mon_info); + if (evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) { + val =3D hw_dom->mbm_total_cfg; + } else if (evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID) { + val =3D hw_dom->mbm_local_cfg; + } else { + pr_warn_once("Invalid event id %d\n", evtid); + break; + } =20 - seq_printf(s, "%d=3D0x%02x", dom->id, mon_info.mon_config); + seq_printf(s, "%d=3D0x%02x", dom->id, val); sep =3D true; } seq_puts(s, "\n"); @@ -1704,17 +1688,28 @@ static void mon_event_config_write(void *info) static void mbm_config_write_domain(struct rdt_resource *r, struct rdt_domain *d, u32 evtid, u32 val) { + struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); struct mon_config_info mon_info =3D {0}; =20 /* * Read the current config value first. If both are the same then * no need to write it again. */ - mon_info.evtid =3D evtid; - mondata_config_read(d, &mon_info); - if (mon_info.mon_config =3D=3D val) + switch (evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + if (val =3D=3D hw_dom->mbm_total_cfg) + return; + break; + case QOS_L3_MBM_LOCAL_EVENT_ID: + if (val =3D=3D hw_dom->mbm_local_cfg) + return; + break; + default: + pr_warn_once("Invalid event id %d\n", evtid); return; + } =20 + mon_info.evtid =3D evtid; mon_info.mon_config =3D val; =20 /* --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2047.outbound.protection.outlook.com [40.107.102.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A1EB12A179; Fri, 24 May 2024 12:25:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.102.47 ARC-Seal: i=2; a=rsa-sha256; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:34.0309 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bad5bf8c-6a6f-49d7-65f2-08dc7bec9c26 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7262 The ABMC feature provides an option to the user to assign a hardware counter to an RMID and monitor the bandwidth as long as the counter is assigned. The bandwidth events will be tracked by the hardware until the user changes the configuration. Each resctrl group can configure maximum two counters, one for total event and one for local event. The counters are configured by writing to MSR L3_QOS_ABMC_CFG. Configuration is done by setting the counter id, bandwidth source (RMID), bandwidth types. Reading L3_QOS_ABMC_DSC returns the configuration of the counter id specified in L3_QOS_ABMC_CFG. Attempts to read or write these MSRs when ABMC is not enabled will result in a #GP(0) exception. MSR L3_QOS_ABMC_CFG (0xC000_03FDh) and L3_QOS_ABMC_DSC (0xC000_03FEh) details. =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Bits Mnemonic Description Access Type Reset Value =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 63 CfgEn Configuration Enable R/W 0 62 CtrEn Counter Enable R/W 0 61:53 =E2=80=93 Reserved MBZ 0 52:48 CtrID Counter Identifier R/W 0 47 IsCOS BwSrc field is a COS R/W 0 (not an RMID) 46:44 =E2=80=93 Reserved MBZ 0 43:32 BwSrc Bandwidth Source R/W 0 (RMID or COS) 31:0 BwType Bandwidth types to R/W 0 track for this counter =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D The feature details are documented in the APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 --- v4: Added more descriptions. Changed the name abmc_ctr_id to ctr_id. Added L3_QOS_ABMC_DSC. Used for reading the configuration. v3: No changes. v2: No changes. --- arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/kernel/cpu/resctrl/internal.h | 30 ++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index 5f9a0139e98c..6d2fe39ac68f 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1172,6 +1172,8 @@ #define MSR_IA32_SMBA_BW_BASE 0xc0000280 #define MSR_IA32_EVT_CFG_BASE 0xc0000400 #define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff +#define MSR_IA32_L3_QOS_ABMC_CFG 0xc00003fd +#define MSR_IA32_L3_QOS_ABMC_DSC 0xc00003fe =20 /* MSR_IA32_VMX_MISC bits */ #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 60a1ca0a11a7..45ed33f4f0ff 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -107,6 +107,9 @@ cpumask_any_housekeeping(const struct cpumask *mask, in= t exclude_cpu) #define ASSIGN_TOTAL BIT(QOS_L3_MBM_TOTAL_EVENT_ID) #define ASSIGN_LOCAL BIT(QOS_L3_MBM_LOCAL_EVENT_ID) =20 +/* Maximum assignable counters per resctrl group */ +#define MAX_CNTRS 2 + struct rdt_fs_context { struct kernfs_fs_context kfc; bool enable_cdpl2; @@ -211,6 +214,7 @@ enum rdtgrp_mode { * @crdtgrp_list: child rdtgroup node list * @rmid: rmid for this rdtgroup * @mon_state: Assignment state of the group + * @ctr_id: ABMC counter ids assigned to this group */ struct mongroup { struct kernfs_node *mon_data_kn; @@ -218,6 +222,7 @@ struct mongroup { struct list_head crdtgrp_list; u32 rmid; u32 mon_state; + u32 ctr_id[MAX_CNTRS]; }; =20 /** @@ -568,6 +573,31 @@ union cpuid_0x10_x_edx { unsigned int full; }; =20 +/* + * ABMC counters can be configured by writing to L3_QOS_ABMC_CFG. + * @bw_type : Bandwidth types to track for this counter + * @bw_src : Bandwidth Source (RMID or CLOSID) + * @reserved1 : Reserved + * @is_cos : BwSrc field is a COS (not an RMID) + * @ctr_id : Counter Identifier + * @reserved : Reserved + * @ctr_en : Counter Enable bit + * @cfg_en : Configuration Enable bit + */ +union l3_qos_abmc_cfg { + struct { + unsigned long bw_type :32, + bw_src :12, + reserved1: 3, + is_cos : 1, + ctr_id : 5, + reserved : 9, + ctr_en : 1, + cfg_en : 1; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:41.6307 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bdf284b9-4f9d-43c1-099c-08dc7beca0ae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F4.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8177 Content-Type: text/plain; charset="utf-8" ABMC feature requires to users to assign a hardware counter to an RMID to monitor the events. Provide the interfaces to assign a counter. Individual counters are configured by writing to L3_QOS_ABMC_CFG MSR and specifying the counter id, bandwidth source, and bandwidth types. The feature details are documented in the APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 --- v4: Commit message update. User bitmap APIs where applicable. Changed the interfaces considering MPAM(arm). Added domain specific assignment. v3: Removed the static from the prototype of rdtgroup_assign_abmc. The function is not called directly from user anymore. These changes are related to global assignment interface. v2: Minor text changes in commit message. --- arch/x86/kernel/cpu/resctrl/internal.h | 3 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 101 +++++++++++++++++++++++++ 2 files changed, 104 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 45ed33f4f0ff..a88c8fc5e4df 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -657,6 +657,9 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init resctrl_file_fflags_init(const char *config, unsigned long fflags); void arch_domain_mbm_evt_config(struct rdt_hw_domain *hw_dom); +int resctrl_arch_assign(struct rdt_domain *d, u32 evtid, u32 rmid, + u32 ctr_id, u32 closid, bool enable); +int resctrl_grp_assign(struct rdtgroup *rdtgrp, u32 evtid); void rdt_staged_configs_clear(void); bool closid_allocated(unsigned int closid); int resctrl_find_cleanest_closid(void); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 0e425c91fa46..48df76499a04 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -203,6 +203,19 @@ static void num_cntrs_init(void) num_cntrs_free_map_len =3D r->mon.num_cntrs; } =20 +static int assign_cntrs_alloc(void) +{ + u32 ctr_id =3D find_first_bit(&num_cntrs_free_map, + num_cntrs_free_map_len); + + if (ctr_id >=3D num_cntrs_free_map_len) + return -ENOSPC; + + __clear_bit(ctr_id, &num_cntrs_free_map); + + return ctr_id; +} + /** * rdtgroup_mode_by_closid - Return mode of resource group with closid * @closid: closid if the resource group @@ -1830,6 +1843,94 @@ static ssize_t mbm_local_bytes_config_write(struct k= ernfs_open_file *of, return ret ?: nbytes; } =20 +static void rdtgroup_abmc_cfg(void *info) +{ + u64 *msrval =3D info; + + wrmsrl(MSR_IA32_L3_QOS_ABMC_CFG, *msrval); +} + +int resctrl_arch_assign(struct rdt_domain *d, u32 evtid, u32 rmid, + u32 ctr_id, u32 closid, bool enable) +{ + struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); + union l3_qos_abmc_cfg abmc_cfg =3D { 0 }; + struct arch_mbm_state *arch_mbm; + + abmc_cfg.split.cfg_en =3D 1; + abmc_cfg.split.ctr_en =3D enable ? 1 : 0; + abmc_cfg.split.ctr_id =3D ctr_id; + abmc_cfg.split.bw_src =3D rmid; + + /* + * Read the event configuration from the domain and pass it as + * bw_type. + */ + if (evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) { + abmc_cfg.split.bw_type =3D hw_dom->mbm_total_cfg; + arch_mbm =3D &hw_dom->arch_mbm_total[rmid]; + } else { + abmc_cfg.split.bw_type =3D hw_dom->mbm_local_cfg; + arch_mbm =3D &hw_dom->arch_mbm_local[rmid]; + } + + smp_call_function_any(&d->cpu_mask, rdtgroup_abmc_cfg, &abmc_cfg, 1); + + /* Reset the internal counters */ + if (arch_mbm) + memset(arch_mbm, 0, sizeof(struct arch_mbm_state)); + + return 0; +} + +int resctrl_grp_assign(struct rdtgroup *rdtgrp, u32 evtid) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + int ctr_id =3D 0, index; + struct rdt_domain *d; + u32 mon_state; + + index =3D mon_event_config_index_get(evtid); + if (index =3D=3D INVALID_CONFIG_INDEX) { + rdt_last_cmd_puts("Invalid event id\n"); + return -EINVAL; + } + + if (evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) { + mon_state =3D ASSIGN_TOTAL; + } else if (evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID) { + mon_state =3D ASSIGN_LOCAL; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:49.8566 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c0e623f1-1494-4e59-0f25-08dc7beca58e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7743 Content-Type: text/plain; charset="utf-8" Hardware provides a limited number of ABMC counters. Once all the counters are exhausted, counters need to be freed for new assignments. Provide the interface to unassign the counter. The feature details are documented in the APM listed below [1]. [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth Monitoring (ABMC). Signed-off-by: Babu Moger Link: https://bugzilla.kernel.org/show_bug.cgi?id=3D206537 --- v4: Added domain specific unassign feature. Few name changes. v3: Removed the static from the prototype of rdtgroup_unassign_abmc. The function is not called directly from user anymore. These changes are related to global assignment interface. v2: No changes. --- arch/x86/kernel/cpu/resctrl/internal.h | 2 ++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 42 ++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index a88c8fc5e4df..e16244895350 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -660,6 +660,8 @@ void arch_domain_mbm_evt_config(struct rdt_hw_domain *h= w_dom); int resctrl_arch_assign(struct rdt_domain *d, u32 evtid, u32 rmid, u32 ctr_id, u32 closid, bool enable); int resctrl_grp_assign(struct rdtgroup *rdtgrp, u32 evtid); +int resctrl_grp_unassign(struct rdtgroup *rdtgrp, u32 evtid); +void num_cntrs_free(u32 ctr_id); void rdt_staged_configs_clear(void); bool closid_allocated(unsigned int closid); int resctrl_find_cleanest_closid(void); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 48df76499a04..5ea1e58c7201 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -216,6 +216,11 @@ static int assign_cntrs_alloc(void) return ctr_id; } =20 +void num_cntrs_free(u32 ctr_id) +{ + __set_bit(ctr_id, &num_cntrs_free_map); +} + /** * rdtgroup_mode_by_closid - Return mode of resource group with closid * @closid: closid if the resource group @@ -1931,6 +1936,43 @@ int resctrl_grp_assign(struct rdtgroup *rdtgrp, u32 = evtid) return 0; } =20 +int resctrl_grp_unassign(struct rdtgroup *rdtgrp, u32 evtid) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + struct rdt_domain *d; + u32 mon_state; + int index; + + index =3D mon_event_config_index_get(evtid); + if (index =3D=3D INVALID_CONFIG_INDEX) { + pr_warn_once("Invalid event id %d\n", evtid); + return -EINVAL; + } + + if (evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) { + mon_state =3D ASSIGN_TOTAL; + } else if (evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID) { + mon_state =3D ASSIGN_LOCAL; + } else { + rdt_last_cmd_puts("Invalid event id\n"); + return -EINVAL; + } + + if (rdtgrp->mon.mon_state & mon_state) { + list_for_each_entry(d, &r->domains, list) + resctrl_arch_assign(d, evtid, rdtgrp->mon.rmid, + rdtgrp->mon.ctr_id[index], + rdtgrp->closid, 0); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:25:59.9933 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e2b6f3ce-6f94-4cf1-4182-08dc7becab8f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000141.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7448 Content-Type: text/plain; charset="utf-8" Enable ABMC by default when feature is supported. Counters are assigned automatically on group creation. If the counters are exhausted, report the warnings and continue. It is not required to fail group creation for assignment failures. Users will have the option to modify the assignments. Signed-off-by: Babu Moger --- v4: Few name changes based on the upstream discussion. Commit message update. v3: This is a new patch. Patch addresses the upstream comment to enable ABMC feature by default if the feature is available. --- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 69 ++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 5ea1e58c7201..f452b6d9bb99 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -2756,6 +2756,7 @@ static void rdt_disable_ctx(void) { resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L3, false); resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L2, false); + resctrl_abmc_disable(RDT_RESOURCE_L3); set_mba_sc(false); =20 resctrl_debug =3D false; @@ -2786,6 +2787,8 @@ static int rdt_enable_ctx(struct rdt_fs_context *ctx) if (ctx->enable_debug) resctrl_debug =3D true; =20 + resctrl_abmc_enable(RDT_RESOURCE_L3); + return 0; =20 out_cdpl3: @@ -2882,6 +2885,41 @@ static void schemata_list_destroy(void) } } =20 +static int resctrl_assign_events(struct rdtgroup *rdtgrp) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); + int ret =3D 0; + + if (!hw_res->abmc_enabled) + return 0; + + if (is_mbm_total_enabled()) + ret =3D resctrl_grp_assign(rdtgrp, QOS_L3_MBM_TOTAL_EVENT_ID); + + if (!ret && is_mbm_local_enabled()) + ret =3D resctrl_grp_assign(rdtgrp, QOS_L3_MBM_LOCAL_EVENT_ID); + + return ret; +} + +static int resctrl_unassign_events(struct rdtgroup *rdtgrp) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); + int ret =3D 0; + + if (!hw_res->abmc_enabled) + return 0; + + if (is_mbm_total_enabled()) + ret =3D resctrl_grp_unassign(rdtgrp, QOS_L3_MBM_TOTAL_EVENT_ID); + + if (!ret && is_mbm_local_enabled()) + ret =3D resctrl_grp_unassign(rdtgrp, QOS_L3_MBM_LOCAL_EVENT_ID); + return ret; +} + static int rdt_get_tree(struct fs_context *fc) { struct rdt_fs_context *ctx =3D rdt_fc2context(fc); @@ -2941,6 +2979,14 @@ static int rdt_get_tree(struct fs_context *fc) if (ret < 0) goto out_mongrp; rdtgroup_default.mon.mon_data_kn =3D kn_mondata; + + /* + * Assign the monitor counters if it is available. If it fails, + * report the warnings and continue. It is not nessaccery to + * fail here. + */ + if (resctrl_assign_events(&rdtgroup_default) < 0) + rdt_last_cmd_puts("Monitor assignment failed\n"); } =20 ret =3D rdt_pseudo_lock_init(); @@ -3214,6 +3260,8 @@ static void rdt_kill_sb(struct super_block *sb) cpus_read_lock(); mutex_lock(&rdtgroup_mutex); =20 + resctrl_unassign_events(&rdtgroup_default); + rdt_disable_ctx(); =20 /*Put everything back to default values. */ @@ -3752,6 +3800,14 @@ static int rdtgroup_mkdir_mon(struct kernfs_node *pa= rent_kn, goto out_unlock; } =20 + /* + * Assign the monitor counters if it is available. If it fails, + * report the warnings and continue. It is not nessaccery to + * fail here. + */ + if (resctrl_assign_events(rdtgrp) < 0) + rdt_last_cmd_puts("Monitor assignment failed\n"); + kernfs_activate(rdtgrp->kn); =20 /* @@ -3796,6 +3852,14 @@ static int rdtgroup_mkdir_ctrl_mon(struct kernfs_nod= e *parent_kn, if (ret) goto out_closid_free; =20 + /* + * Assign the monitor counters if it is available. If it fails, + * report the warnings and continue. It is not nessaccery to + * fail here. + */ + if (resctrl_assign_events(rdtgrp) < 0) + rdt_last_cmd_puts("Monitor assignment failed\n"); + kernfs_activate(rdtgrp->kn); =20 ret =3D rdtgroup_init_alloc(rdtgrp); @@ -3891,6 +3955,9 @@ static int rdtgroup_rmdir_mon(struct rdtgroup *rdtgrp= , cpumask_var_t tmpmask) update_closid_rmid(tmpmask, NULL); =20 rdtgrp->flags =3D RDT_DELETED; + + resctrl_unassign_events(rdtgrp); + free_rmid(rdtgrp->closid, rdtgrp->mon.rmid); =20 /* @@ -3937,6 +4004,8 @@ static int rdtgroup_rmdir_ctrl(struct rdtgroup *rdtgr= p, cpumask_var_t tmpmask) cpumask_or(tmpmask, tmpmask, &rdtgrp->cpu_mask); update_closid_rmid(tmpmask, NULL); =20 + resctrl_unassign_events(rdtgrp); + free_rmid(rdtgrp->closid, rdtgrp->mon.rmid); closid_free(rdtgrp->closid); =20 --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM04-MW2-obe.outbound.protection.outlook.com (mail-mw2nam04on2054.outbound.protection.outlook.com [40.107.101.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 463DB12BF21; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:26:09.8956 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 60ec3c51-09ef-4dff-9e30-08dc7becb178 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013F.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6432 Content-Type: text/plain; charset="utf-8" Introduce interface to switch between ABMC and legacy_mbm modes. By default ABMC is enabled on resctrl mount if the feature is available. However, user will have the option to go back to legacy_mbm if required. $ cat /sys/fs/resctrl/info/L3_MON/mbm_assign [abmc] mbm_legacy To enable the legacy monitoring feature: $ echo "mbm_legacy" > /sys/fs/resctrl/info/L3_MON/mbm_assign Signed-off-by: Babu Moger --- v4: Minor commit text changes. Keep the default to ABMC when supported. v3: New patch to address the review comments from upstream. --- Documentation/arch/x86/resctrl.rst | 10 +++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 40 +++++++++++++++++++++++++- 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index ab3cde61a124..fd050d4d22cd 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -271,6 +271,16 @@ with the following files: [abmc] mbm_legacy =20 + * To enable ABMC feature: + :: + + # echo "abmc" > /sys/fs/resctrl/info/L3_MON/mbm_assign + + * To enable the legacy monitoring feature: + :: + + # echo "mbm_legacy" > /sys/fs/resctrl/info/L3_MON/mbm_assign + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index f452b6d9bb99..d77ff059269a 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -908,6 +908,43 @@ static int rdtgroup_mbm_assign_show(struct kernfs_open= _file *of, return 0; } =20 +/* + * rdtgroup_mode_write - Modify the resource group's mode + */ +static ssize_t rdtgroup_mbm_assign_write(struct kernfs_open_file *of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r =3D of->kn->parent->priv; + int ret =3D 0; + + if (!r->abmc_capable) + return -EINVAL; + + /* Valid input requires a trailing newline */ + if (nbytes =3D=3D 0 || buf[nbytes - 1] !=3D '\n') + return -EINVAL; + + buf[nbytes - 1] =3D '\0'; + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + rdt_last_cmd_clear(); + + if (!strcmp(buf, "mbm_legacy")) + resctrl_abmc_disable(RDT_RESOURCE_L3); + else if (!strcmp(buf, "abmc")) + ret =3D resctrl_abmc_enable(RDT_RESOURCE_L3); + else + ret =3D -EINVAL; + + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} + #ifdef CONFIG_PROC_CPU_RESCTRL =20 /* @@ -2087,9 +2124,10 @@ static struct rftype res_common_files[] =3D { }, { .name =3D "mbm_assign", - .mode =3D 0444, + .mode =3D 0644, .kf_ops =3D &rdtgroup_kf_single_ops, .seq_show =3D rdtgroup_mbm_assign_show, + .write =3D rdtgroup_mbm_assign_write, }, { .name =3D "cpus", --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2085.outbound.protection.outlook.com [40.107.93.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A01638664D; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:26:17.6382 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e69fff76-b7b9-4cbe-a8c1-08dc7becb613 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7419 Content-Type: text/plain; charset="utf-8" Introduce the interface to list the monitor states of all the resctrl group= s. Example: $cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control List follows the following format: "//=3D" Format for specific type of groups: - Default CTRL_MON group: "//=3D" - Non-default CTRL_MON group: "//=3D" - Child MON group of default CTRL_MON group: "//=3D" - Child MON group of non-default CTRL_MON group: "//=3D" Assignment flags can be one of the following: t MBM total event is enabled l MBM local event is enabled tl Both total and local MBM events are enabled _ None of the MBM events are enabled Signed-off-by: Babu Moger --- v4: Added functionality to query domain specific assigment in. rdtgroup_abmc_dom_state(). v3: New patch. Addresses the feedback to provide the global assignment interface. https://lore.kernel.org/lkml/c73f444b-83a1-4e9a-95d3-54c5165ee782@intel= .com/ --- Documentation/arch/x86/resctrl.rst | 55 +++++++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 1 + arch/x86/kernel/cpu/resctrl/rdtgroup.c | 129 +++++++++++++++++++++++++ 3 files changed, 185 insertions(+) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index fd050d4d22cd..255087de568d 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -281,6 +281,61 @@ with the following files: =20 # echo "mbm_legacy" > /sys/fs/resctrl/info/L3_MON/mbm_assign =20 +"mbm_assign_control": + Available when ABMC features are supported. + Reports the resctrl group and monitor status of each group. + + List follows the following format: + "//=3D" + + Format for specific type of grpups: + + * Default CTRL_MON group: + "//=3D" + + * Non-default CTRL_MON group: + "//=3D" + + * Child MON group of default CTRL_MON group: + "//=3D" + + * Child MON group of non-default CTRL_MON group: + "//=3D" + + Assignment flags can be one of the following: + :: + + t MBM total event is enabled + l MBM local event is enabled + tl Both total and local MBM events are enabled + _ None of the MBM events are enabled + + Examples: + :: + + # mkdir /sys/fs/resctrl/mon_groups/child_default_mon_grp + # mkdir /sys/fs/resctrl/non_default_ctrl_mon_grp + # mkdir /sys/fs/resctrl/non_default_ctrl_mon_grp/mon_groups/child_non_de= fault_mon_grp + + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3Dtl; + //0=3Dtl;1=3Dtl; + /child_default_mon_grp/0=3Dtl;1=3Dtl; + + There are four resctrl groups. All the groups have total and local event= s are + enabled on domain 0 and 1. + + non_default_ctrl_mon_grp// - This is a non default control mon group. + + non_default_ctrl_mon_grp/child_non_default_mon_grp/ - This is a child mo= nitor + group of the non default control mon group. + + // - This is a default control mon group. + + /child_default_mon_grp/ - This is a child monitor group of the default c= ontrol + mon group. + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index ab0f4bb49bd9..f4dba02db9c0 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1083,6 +1083,7 @@ int __init rdt_get_mon_l3_config(struct rdt_resource = *r) r->mon.num_cntrs =3D 64; } resctrl_file_fflags_init("num_cntrs", RFTYPE_MON_INFO); + resctrl_file_fflags_init("mbm_assign_control", RFTYPE_MON_INFO); } } =20 diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index d77ff059269a..bd3a54405402 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -945,6 +945,129 @@ static ssize_t rdtgroup_mbm_assign_write(struct kernf= s_open_file *of, return ret ?: nbytes; } =20 +static void rdtgroup_abmc_dom_cfg(void *info) +{ + u64 *msrval =3D info; + + wrmsrl(MSR_IA32_L3_QOS_ABMC_CFG, *msrval); + rdmsrl(MSR_IA32_L3_QOS_ABMC_DSC, *msrval); +} + +/* + * Writing the counter id with CfgEn=3D0 on L3_QOS_ABMC_CFG and reading + * L3_QOS_ABMC_DSC back will return configuration of the counter + * specified. + */ +static int rdtgroup_abmc_dom_state(struct rdt_domain *d, u32 ctr_id, u32 r= mid) +{ + union l3_qos_abmc_cfg abmc_cfg =3D { 0 }; + + abmc_cfg.split.cfg_en =3D 0; + abmc_cfg.split.ctr_id =3D ctr_id; + + smp_call_function_any(&d->cpu_mask, rdtgroup_abmc_dom_cfg, + &abmc_cfg, 1); + + if (abmc_cfg.split.ctr_en && abmc_cfg.split.bw_src =3D=3D rmid) + return 0; + else + return -1; +} + +static char *mon_state_to_str(struct rdtgroup *rdtgrp, + struct rdt_domain *d, char *str) +{ + char *tmp =3D str; + int dom_state =3D ASSIGN_NONE; + + /* + * Query the monitor state for the domain. + * Index 0 for evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID + * Index 1 for evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID + */ + if (rdtgrp->mon.mon_state & ASSIGN_TOTAL) + if (!rdtgroup_abmc_dom_state(d, rdtgrp->mon.ctr_id[0], rdtgrp->mon.rmid)) + dom_state |=3D ASSIGN_TOTAL; + + if (rdtgrp->mon.mon_state & ASSIGN_LOCAL) + if (!rdtgroup_abmc_dom_state(d, rdtgrp->mon.ctr_id[1], rdtgrp->mon.rmid)) + dom_state |=3D ASSIGN_LOCAL; + + switch (dom_state) { + case ASSIGN_NONE: + *tmp++ =3D '_'; + break; + case (ASSIGN_TOTAL | ASSIGN_LOCAL): + *tmp++ =3D 't'; + *tmp++ =3D 'l'; + break; + case ASSIGN_TOTAL: + *tmp++ =3D 't'; + break; + case ASSIGN_LOCAL: + *tmp++ =3D 'l'; + break; + default: + break; + } + + *tmp =3D '\0'; + return str; +} + +static int rdtgroup_mbm_assign_control_show(struct kernfs_open_file *of, + struct seq_file *s, void *v) +{ + struct rdt_resource *r =3D of->kn->parent->priv; + struct rdt_hw_resource *hw_res =3D resctrl_to_arch_res(r); + struct rdt_domain *dom; + struct rdtgroup *rdtg; + int grp_default =3D 0; + char str[10]; + + if (!hw_res->abmc_enabled) { + rdt_last_cmd_puts("ABMC feature is not enabled\n"); + return -EINVAL; + } + + mutex_lock(&rdtgroup_mutex); + + list_for_each_entry(rdtg, &rdt_all_groups, rdtgroup_list) { + struct rdtgroup *crg; + + if (rdtg =3D=3D &rdtgroup_default) { + grp_default =3D 1; + seq_puts(s, "//"); + } else { + grp_default =3D 0; + seq_printf(s, "%s//", rdtg->kn->name); + } + + list_for_each_entry(dom, &r->domains, list) + seq_printf(s, "%d=3D%s;", dom->id, + mon_state_to_str(rdtg, dom, str)); + seq_putc(s, '\n'); + + list_for_each_entry(crg, &rdtg->mon.crdtgrp_list, + mon.crdtgrp_list) { + if (grp_default) + seq_printf(s, "/%s/", crg->kn->name); + else + seq_printf(s, "%s/%s/", rdtg->kn->name, + crg->kn->name); + + list_for_each_entry(dom, &r->domains, list) + seq_printf(s, "%d=3D%s;", dom->id, + mon_state_to_str(crg, dom, str)); + seq_putc(s, '\n'); + } + } + + mutex_unlock(&rdtgroup_mutex); + + return 0; +} + #ifdef CONFIG_PROC_CPU_RESCTRL =20 /* @@ -2143,6 +2266,12 @@ static struct rftype res_common_files[] =3D { .kf_ops =3D &rdtgroup_kf_single_ops, .seq_show =3D rdtgroup_num_cntrs_show, }, + { + .name =3D "mbm_assign_control", + .mode =3D 0444, + .kf_ops =3D &rdtgroup_kf_single_ops, + .seq_show =3D rdtgroup_mbm_assign_control_show, + }, { .name =3D "cpus_list", .mode =3D 0644, --=20 2.34.1 From nobody Fri Feb 13 15:02:24 2026 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2040.outbound.protection.outlook.com [40.107.244.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 394BF12C467; Fri, 24 May 2024 12:26:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.40 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Fri, 24 May 2024 12:26:25 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH2PEPF0000013D.mail.protection.outlook.com (10.167.244.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7611.14 via Frontend Transport; Fri, 24 May 2024 12:26:25 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 24 May 2024 07:26:23 -0500 From: Babu Moger To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 19/19] x86/resctrl: Introduce interface to modify assignment states of the groups Date: Fri, 24 May 2024 07:23:38 -0500 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH2PEPF0000013D:EE_|IA1PR12MB7734:EE_ X-MS-Office365-Filtering-Correlation-Id: ee58329b-16f7-47c2-b0b2-08dc7becba86 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|376005|36860700004|1800799015|7416005|82310400017; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2024 12:26:25.0717 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ee58329b-16f7-47c2-b0b2-08dc7becba86 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7734 Content-Type: text/plain; charset="utf-8" Introduce the interface to enable events in ABMC mode. Events can be enabled or disabled by writing to file /sys/fs/resctrl/info/L3_MON/mbm_assign_control Format is similar to the list format with addition of op-code for the assignment operation. "//" Format for specific type of groups: * Default CTRL_MON group: "//" * Non-default CTRL_MON group: "//" * Child MON group of default CTRL_MON group: "//" * Child MON group of non-default CTRL_MON group: "//" Op-code can be one of the following: =3D Update the assignment to match the flags + enable a new state - disable a new state Assignment flags can be one of the following: t MBM total event is enabled l MBM local event is enabled tl Both total and local MBM events are enabled _ None of the MBM events are enabled Signed-off-by: Babu Moger --- v4: Added domain specific assignments. Fixed the opcode parsing. v3: New patch. Addresses the feedback to provide the global assignment interface. https://lore.kernel.org/lkml/c73f444b-83a1-4e9a-95d3-54c5165ee782@intel= .com/ --- Documentation/arch/x86/resctrl.rst | 81 +++++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 242 ++++++++++++++++++++++++- 2 files changed, 322 insertions(+), 1 deletion(-) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/re= sctrl.rst index 255087de568d..89af91805b38 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -336,6 +336,87 @@ with the following files: /child_default_mon_grp/ - This is a child monitor group of the default c= ontrol mon group. =20 + Assignment state can be updated by writing to the interface. + + Format is similar to the list format with addition of op-code for the + assignment operation. + + "//" + + Format for each type of groups: + + * Default CTRL_MON group: + "//" + + * Non-default CTRL_MON group: + "//" + + * Child MON group of default CTRL_MON group: + "//" + + * Child MON group of non-default CTRL_MON group: + "//" + + Op-code can be one of the following: + :: + + =3D Update the assignment to match the flags + + Add a new state + - delete a new state + + Examples: + :: + + Initial group status: + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3Dtl; + //0=3Dtl;1=3Dtl; + /child_default_mon_grp/0=3Dtl;1=3Dtl; + + To update the default group to enable only total event on domain 0: + # echo "//0=3Dt" > /sys/fs/resctrl/info/L3_MON/mbm_assign_control + + Assignment status after the update: + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3Dtl; + //0=3Dt;1=3Dtl;2=3Dtl; + /child_default_mon_grp/0=3Dtl;1=3Dtl; + + To update the MON group child_default_mon_grp to remove total event on = domain 1: + # echo "/child_default_mon_grp/1-t" > /sys/fs/resctrl/info/L3_MON/mbm_a= ssign_control + + Assignment status after the update: + $ cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3Dtl; + //0=3Dt;1=3Dl; + /child_default_mon_grp/0=3Dt;1=3Dtl; + + To update the MON group non_default_ctrl_mon_grp/child_non_default_mon_= grp to + remove both local and total events on domain 1: + # echo "non_default_ctrl_mon_grp/child_non_default_mon_grp/1=3D_" > + /sys/fs/resctrl/info/L3_MON/mbm_assign_control + + Assignment status after the update: + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3D_; + //0=3Dt;1=3Dl; + /child_default_mon_grp/0=3Dt;1=3Dtl; + + To update the default group to add a total event domain 1. + # echo "//1+t" > /sys/fs/resctrl/info/L3_MON/mbm_assign_control + + Assignment status after the update: + + # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_control + non_default_ctrl_mon_grp//0=3Dtl;1=3Dtl; + non_default_ctrl_mon_grp/child_non_default_mon_grp/0=3Dtl;1=3D_; + //0=3Dt;1=3Dtl; + /child_default_mon_grp/0=3Dt;1=3Dtl; + "max_threshold_occupancy": Read/write file provides the largest value (in bytes) at which a previously used LLC_occupancy diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index bd3a54405402..b74c18927bd2 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1068,6 +1068,245 @@ static int rdtgroup_mbm_assign_control_show(struct = kernfs_open_file *of, return 0; } =20 +static int str_to_mon_state(char *flag) +{ + int i, mon_state =3D 0; + + for (i =3D 0; i < strlen(flag); i++) { + switch (*(flag + i)) { + case 't': + mon_state |=3D ASSIGN_TOTAL; + break; + case 'l': + mon_state |=3D ASSIGN_LOCAL; + break; + case '_': + mon_state =3D ASSIGN_NONE; + break; + default: + mon_state =3D ASSIGN_NONE; + break; + } + } + + return mon_state; +} + +static struct rdtgroup *resctrl_get_rdtgroup(enum rdt_group_type rtype, ch= ar *p_grp, char *c_grp) +{ + struct rdtgroup *rdtg, *crg; + + if (rtype =3D=3D RDTCTRL_GROUP && *p_grp =3D=3D '\0') { + return &rdtgroup_default; + } else if (rtype =3D=3D RDTCTRL_GROUP) { + list_for_each_entry(rdtg, &rdt_all_groups, rdtgroup_list) + if (!strcmp(p_grp, rdtg->kn->name)) + return rdtg; + } else if (rtype =3D=3D RDTMON_GROUP) { + list_for_each_entry(rdtg, &rdt_all_groups, rdtgroup_list) { + if (!strcmp(p_grp, rdtg->kn->name)) { + list_for_each_entry(crg, &rdtg->mon.crdtgrp_list, + mon.crdtgrp_list) { + if (!strcmp(c_grp, crg->kn->name)) + return crg; + } + } + } + } + + return NULL; +} + +static int resctrl_process_flags(enum rdt_group_type rtype, char *p_grp, c= har *c_grp, char *tok) +{ + struct rdt_resource *r =3D &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl; + int op, mon_state, assign_state, unassign_state; + char *dom_str, *id_str, *op_str; + struct rdtgroup *rdtgrp; + struct rdt_domain *d; + unsigned long dom_id; + int ret, found =3D 0; + + rdtgrp =3D resctrl_get_rdtgroup(rtype, p_grp, c_grp); + + if (!rdtgrp) { + rdt_last_cmd_puts("Not a valid resctrl group\n"); + return -EINVAL; + } + +next: + if (!tok || tok[0] =3D=3D '\0') + return 0; + + /* Start processing the strings for each domain */ + dom_str =3D strim(strsep(&tok, ";")); + + op_str =3D strpbrk(dom_str, "=3D+-"); + + if (op_str) { + op =3D *op_str; + } else { + rdt_last_cmd_puts("Missing operation =3D, +, -, _ character\n"); + return -EINVAL; + } + + id_str =3D strsep(&dom_str, "=3D+-"); + + if (!id_str || kstrtoul(id_str, 10, &dom_id)) { + rdt_last_cmd_puts("Missing domain id\n"); + return -EINVAL; + } + + /* Verify if the dom_id is valid */ + list_for_each_entry(d, &r->domains, list) { + if (d->id =3D=3D dom_id) { + found =3D 1; + break; + } + } + if (!found) { + rdt_last_cmd_printf("Invalid domain id %ld\n", dom_id); + return -EINVAL; + } + + mon_state =3D str_to_mon_state(dom_str); + + assign_state =3D 0; + unassign_state =3D 0; + + switch (op) { + case '+': + assign_state =3D mon_state; + break; + case '-': + unassign_state =3D mon_state; + break; + case '=3D': + assign_state =3D mon_state; + unassign_state =3D (ASSIGN_TOTAL | ASSIGN_LOCAL) & ~assign_state; + break; + default: + break; + } + + if (assign_state & ASSIGN_TOTAL) + ret =3D resctrl_arch_assign(d, QOS_L3_MBM_TOTAL_EVENT_ID, + rdtgrp->mon.rmid, + rdtgrp->mon.ctr_id[0], + rdtgrp->closid, 1); + if (ret) + goto out_fail; + + if (assign_state & ASSIGN_LOCAL) + ret =3D resctrl_arch_assign(d, QOS_L3_MBM_LOCAL_EVENT_ID, + rdtgrp->mon.rmid, + rdtgrp->mon.ctr_id[1], + rdtgrp->closid, 1); + + if (ret) + goto out_fail; + + if (unassign_state & ASSIGN_TOTAL) + ret =3D resctrl_arch_assign(d, QOS_L3_MBM_TOTAL_EVENT_ID, + rdtgrp->mon.rmid, + rdtgrp->mon.ctr_id[0], + rdtgrp->closid, 0); + + if (ret) + goto out_fail; + + if (unassign_state & ASSIGN_LOCAL) + ret =3D resctrl_arch_assign(d, QOS_L3_MBM_LOCAL_EVENT_ID, + rdtgrp->mon.rmid, + rdtgrp->mon.ctr_id[1], + rdtgrp->closid, 0); + if (ret) + goto out_fail; + + goto next; + +out_fail: + + return -EINVAL; +} + +static ssize_t rdtgroup_mbm_assign_control_write(struct kernfs_open_file *= of, + char *buf, size_t nbytes, + loff_t off) +{ + struct rdt_resource *r =3D of->kn->parent->priv; + char *token, *cmon_grp, *mon_grp; + struct rdt_hw_resource *hw_res; + int ret; + + hw_res =3D resctrl_to_arch_res(r); + if (!hw_res->abmc_enabled) + return -EINVAL; + + /* Valid input requires a trailing newline */ + if (nbytes =3D=3D 0 || buf[nbytes - 1] !=3D '\n') + return -EINVAL; + + buf[nbytes - 1] =3D '\0'; + rdt_last_cmd_clear(); + + cpus_read_lock(); + mutex_lock(&rdtgroup_mutex); + + while ((token =3D strsep(&buf, "\n")) !=3D NULL) { + if (strstr(token, "//")) { + /* + * The control mon group processing: + * default CTRL_MON group: "//" + * non-default CTRL_MON group: "//flags" + * The CTRL_MON group will be empty string if it is a + * default group. + */ + cmon_grp =3D strsep(&token, "//"); + + /* + * strsep returns empty string for contiguous delimiters. + * Make sure check for two consicutive delimiters and + * advance the token. + */ + mon_grp =3D strsep(&token, "//"); + if (*mon_grp !=3D '\0') { + rdt_last_cmd_printf("Invalid CTRL_MON group format %s\n", token); + ret =3D -EINVAL; + break; + } + + ret =3D resctrl_process_flags(RDTCTRL_GROUP, cmon_grp, mon_grp, token); + if (ret) + break; + } else if (strstr(token, "/")) { + /* + * Mon group processing: + * MON_GROUP inside default CTRL_MON group: "//" + * MON_GROUP within CTRL_MON group: "//" + */ + cmon_grp =3D strsep(&token, "/"); + + /* Extract the MON_GROUP. It cannot be empty string */ + mon_grp =3D strsep(&token, "/"); + if (*mon_grp =3D=3D '\0') { + rdt_last_cmd_printf("Invalid MON_GROUP format %s\n", token); + ret =3D -EINVAL; + break; + } + + ret =3D resctrl_process_flags(RDTMON_GROUP, cmon_grp, mon_grp, token); + if (ret) + break; + } + } + + mutex_unlock(&rdtgroup_mutex); + cpus_read_unlock(); + + return ret ?: nbytes; +} + #ifdef CONFIG_PROC_CPU_RESCTRL =20 /* @@ -2268,9 +2507,10 @@ static struct rftype res_common_files[] =3D { }, { .name =3D "mbm_assign_control", - .mode =3D 0444, + .mode =3D 0644, .kf_ops =3D &rdtgroup_kf_single_ops, .seq_show =3D rdtgroup_mbm_assign_control_show, + .write =3D rdtgroup_mbm_assign_control_write, }, { .name =3D "cpus_list", --=20 2.34.1