From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E00E11386AF; Tue, 12 Mar 2024 17:34:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264869; cv=none; b=V5/kP7L4hMTNOzVx0wThXTu5BN9/YYVO0FwKbezHMoN4YKcB5NgF1t9o98SQzuKAi26IHYl3Vr356A6HMvFQ1aUEi3wTIyTqgMWuRfJ2Ixdfq49tS6errxbrXYjOVgWabU9pqKI5mnyaN3pS+lLGjUMR15OF9JU0aCRJZT/aLPw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264869; c=relaxed/simple; bh=cRphM6Rk/wa3iqAPnSFQ/7D1dzvpZzzX3sHdjvVeTZ4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ZsL2Bwf25uybWfOid2885meSu9jjg4fRY9XSnHqzf5itDmJa7ljVgWA5HxpRzJr9ryvrfFbuRyZyaNdGW3OmPwZy1Vu3BHUf9WKGkwsUrZdMKrWjxxs/iJCT57P09CmqHOd+JJk2A113MYn5JYtgIHmx/nC0TaJbs/L/wWLGaKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 571A315BF; Tue, 12 Mar 2024 10:35:04 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0740E3F762; Tue, 12 Mar 2024 10:34:24 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn, Shuai Xue Subject: [PATCH 01/10] perf/alibaba_uncore_drw: Use correct CPU affinity Date: Tue, 12 Mar 2024 17:34:03 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Although this driver is trying to use the IRQ-multiplexing mechanism to handle context migration correctly, it's failing to make events follow the IRQ instance, instead forcing them onto a per-PMU CPU which is set once at probe time then never maintained. Fix this by using the correct CPU from the IRQ instance, and remove the erroneous per-PMU data plus the redundant check which does not mean what it thinks it means. CC: Shuai Xue Fixes: cf7b61073e45 ("drivers/perf: add DDR Sub-System Driveway PMU driver = for Yitian 710 SoC") Signed-off-by: Robin Murphy Reviewed-by: James Clark --- drivers/perf/alibaba_uncore_drw_pmu.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/perf/alibaba_uncore_drw_pmu.c b/drivers/perf/alibaba_u= ncore_drw_pmu.c index 19d459a36be5..b37e9794823a 100644 --- a/drivers/perf/alibaba_uncore_drw_pmu.c +++ b/drivers/perf/alibaba_uncore_drw_pmu.c @@ -96,8 +96,6 @@ struct ali_drw_pmu { =20 struct list_head pmus_node; struct ali_drw_pmu_irq *irq; - int irq_num; - int cpu; DECLARE_BITMAP(used_mask, ALI_DRW_PMU_COMMON_MAX_COUNTERS); struct perf_event *events[ALI_DRW_PMU_COMMON_MAX_COUNTERS]; int evtids[ALI_DRW_PMU_COMMON_MAX_COUNTERS]; @@ -221,7 +219,7 @@ static ssize_t ali_drw_pmu_cpumask_show(struct device *= dev, { struct ali_drw_pmu *drw_pmu =3D to_ali_drw_pmu(dev_get_drvdata(dev)); =20 - return cpumap_print_to_pagebuf(true, buf, cpumask_of(drw_pmu->cpu)); + return cpumap_print_to_pagebuf(true, buf, cpumask_of(drw_pmu->irq->cpu)); } =20 static struct device_attribute ali_drw_pmu_cpumask_attr =3D @@ -550,11 +548,7 @@ static int ali_drw_pmu_event_init(struct perf_event *e= vent) return -EOPNOTSUPP; } =20 - event->cpu =3D drw_pmu->cpu; - if (event->cpu < 0) { - dev_err(dev, "Per-task mode not supported!\n"); - return -EOPNOTSUPP; - } + event->cpu =3D drw_pmu->irq->cpu; =20 if (event->group_leader !=3D event && !is_software_event(event->group_leader)) { @@ -701,8 +695,6 @@ static int ali_drw_pmu_probe(struct platform_device *pd= ev) /* clearing interrupt status */ writel(0xffffff, drw_pmu->cfg_base + ALI_DRW_PMU_OV_INTR_CLR); =20 - drw_pmu->cpu =3D smp_processor_id(); - ret =3D ali_drw_pmu_init_irq(drw_pmu, pdev); if (ret) return ret; --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 39FFC13956C; Tue, 12 Mar 2024 17:34:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264871; cv=none; b=j7QUHPEkvkofdF8yQYq/RDTG9uoFpWxj3K2etgNVeom76bQqbOcCjRTRitsXgjHYUybHI0Dw0M1yr1cc3rYan8mnjbbxjDvH2VNgDeHbI3XP2fwy3PXvEz+7qWt4KJWvHNG7FKLAGSDgNTGaeld9crSx+Cq+bKSnzqWDCvpt5c4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264871; c=relaxed/simple; bh=G61qQSbKIc/00ZL3F3yoF/s/9tEIXEVun3SaCdru6+0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hEnecvSIGr1uB6WhaUm0vAkewEBWjPuUlTxX31ZwCz6zRNDFFBfhb4iLlLwIid00T5vIo3GPEgybhCfAJHt6asRwxaPJ1el7umv2nYNp5MkTGRqQNLM/nPuiPjLTxyDf57j4xkOS+AJnMaZPAIc3jPvjfqgRBq+eU4mzH3W/E5k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B54E015DB; Tue, 12 Mar 2024 10:35:06 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 847BC3F762; Tue, 12 Mar 2024 10:34:27 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 02/10] perf: Add capability for common event support Date: Tue, 12 Mar 2024 17:34:04 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Many PMUs do not support common hardware/cache/etc. events and only handle their own PMU-specific events. Since this only depends on matching the event and PMU types, it's a prime candidate for a core capability to save more event_init boilerplate in drivers. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- include/linux/perf_event.h | 1 + kernel/events/core.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index d2a15c0c6f8a..983201f21dd2 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -291,6 +291,7 @@ struct perf_event_pmu_context; #define PERF_PMU_CAP_NO_EXCLUDE 0x0040 #define PERF_PMU_CAP_AUX_OUTPUT 0x0080 #define PERF_PMU_CAP_EXTENDED_HW_TYPE 0x0100 +#define PERF_PMU_CAP_NO_COMMON_EVENTS 0x0200 =20 struct perf_output_handle; =20 diff --git a/kernel/events/core.c b/kernel/events/core.c index f0f0f71213a1..7ad80826c218 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -11649,6 +11649,11 @@ static int perf_try_init_event(struct pmu *pmu, st= ruct perf_event *event) struct perf_event_context *ctx =3D NULL; int ret; =20 + /* Short-circuit if we know the PMU won't want this event */ + if (pmu->capabilities & PERF_PMU_CAP_NO_COMMON_EVENTS && + event->attr.type !=3D pmu->type) + return -ENOENT; + if (!try_module_get(pmu->module)) return -ENODEV; =20 --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7EC8D139596; Tue, 12 Mar 2024 17:34:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264874; cv=none; b=V/4ElNAQS2VfSXwaMy4nSvfvmbgj+/vzqNdlVkzJcSCN+h773x9yG+DsB7w/tfxbGUVqjKK56cXEbfMqAu7f3o2JTxDGGFAs3WOIqRxCz9gXPHFLjdeMvkAvzm0X8E6NVpJm6DMx4SC+h59E2/Zg9TZIqJTD6KAOglBIsGRfY/4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264874; c=relaxed/simple; bh=/GfEJw6zB25TqgDGj1VUeKJo+8W9aPFMIn6BqDqMrLg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cW7hjMRY0bppvc5zeCjaCLnCW4jTiAUCWB2C7gaLL7lvqmI9Q/rKbftlKqtcRAQ8UEi/r0PzBxGMqk3PNDZf/BN7Dm5Z/tDKfLZEfo5/52LwAaRAQCZLpNw2sdOH0e6yWndVdBOmGH9M4zgBc1+HyyhR/ZnJSBqY5NFWbXKc+PA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E89B1650; Tue, 12 Mar 2024 10:35:09 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E36593F762; Tue, 12 Mar 2024 10:34:29 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 03/10] drivers/perf: Use PERF_PMU_CAP_NO_COMMON_EVENTS Date: Tue, 12 Mar 2024 17:34:05 +0000 Message-Id: <7043be8c1de4458927414cecc86445c805cd8820.1710257512.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that we have a core capability for refusing common event types, make use of it to purge the -ENOENT boilerplate from our system PMU drivers. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- drivers/perf/alibaba_uncore_drw_pmu.c | 6 ++---- drivers/perf/amlogic/meson_ddr_pmu_core.c | 6 ++---- drivers/perf/arm-cci.c | 10 ++-------- drivers/perf/arm-ccn.c | 6 ++---- drivers/perf/arm-cmn.c | 6 ++---- drivers/perf/arm_cspmu/arm_cspmu.c | 6 ++---- drivers/perf/arm_dmc620_pmu.c | 6 ++---- drivers/perf/arm_dsu_pmu.c | 6 ++---- drivers/perf/arm_smmuv3_pmu.c | 6 ++---- drivers/perf/arm_spe_pmu.c | 7 ++----- drivers/perf/cxl_pmu.c | 7 ++----- drivers/perf/dwc_pcie_pmu.c | 6 ++---- drivers/perf/fsl_imx8_ddr_perf.c | 6 ++---- drivers/perf/fsl_imx9_ddr_perf.c | 6 ++---- drivers/perf/hisilicon/hisi_pcie_pmu.c | 7 ++----- drivers/perf/hisilicon/hisi_uncore_pmu.c | 6 ++---- drivers/perf/hisilicon/hns3_pmu.c | 6 ++---- drivers/perf/marvell_cn10k_ddr_pmu.c | 6 ++---- drivers/perf/marvell_cn10k_tad_pmu.c | 6 ++---- drivers/perf/qcom_l2_pmu.c | 10 +++------- drivers/perf/qcom_l3_pmu.c | 9 ++------- drivers/perf/thunderx2_pmu.c | 7 ++----- drivers/perf/xgene_pmu.c | 7 ++----- 23 files changed, 47 insertions(+), 107 deletions(-) diff --git a/drivers/perf/alibaba_uncore_drw_pmu.c b/drivers/perf/alibaba_u= ncore_drw_pmu.c index b37e9794823a..606c2301bd11 100644 --- a/drivers/perf/alibaba_uncore_drw_pmu.c +++ b/drivers/perf/alibaba_uncore_drw_pmu.c @@ -535,9 +535,6 @@ static int ali_drw_pmu_event_init(struct perf_event *ev= ent) struct perf_event *sibling; struct device *dev =3D drw_pmu->pmu.dev; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event)) { dev_err(dev, "Sampling not supported!\n"); return -EOPNOTSUPP; @@ -709,7 +706,8 @@ static int ali_drw_pmu_probe(struct platform_device *pd= ev) .stop =3D ali_drw_pmu_stop, .read =3D ali_drw_pmu_read, .attr_groups =3D ali_drw_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 ret =3D perf_pmu_register(&drw_pmu->pmu, name, -1); diff --git a/drivers/perf/amlogic/meson_ddr_pmu_core.c b/drivers/perf/amlog= ic/meson_ddr_pmu_core.c index bbc7285fd934..c19b682297f3 100644 --- a/drivers/perf/amlogic/meson_ddr_pmu_core.c +++ b/drivers/perf/amlogic/meson_ddr_pmu_core.c @@ -121,9 +121,6 @@ static int meson_ddr_perf_event_init(struct perf_event = *event) u64 config1 =3D event->attr.config1; u64 config2 =3D event->attr.config2; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 @@ -492,7 +489,8 @@ int meson_ddr_pmu_create(struct platform_device *pdev) *pmu =3D (struct ddr_pmu) { .pmu =3D { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D meson_ddr_perf_event_init, diff --git a/drivers/perf/arm-cci.c b/drivers/perf/arm-cci.c index 61de861eaf91..f157bfd4b923 100644 --- a/drivers/perf/arm-cci.c +++ b/drivers/perf/arm-cci.c @@ -815,10 +815,6 @@ static int pmu_map_event(struct perf_event *event) { struct cci_pmu *cci_pmu =3D to_cci_pmu(event->pmu); =20 - if (event->attr.type < PERF_TYPE_MAX || - !cci_pmu->model->validate_hw_event) - return -ENOENT; - return cci_pmu->model->validate_hw_event(cci_pmu, event->attr.config); } =20 @@ -1316,9 +1312,6 @@ static int cci_pmu_event_init(struct perf_event *even= t) atomic_t *active_events =3D &cci_pmu->active_events; int err =3D 0; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* Shared by all CPUs, no meaningful state to sample */ if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; @@ -1420,7 +1413,8 @@ static int cci_pmu_init(struct cci_pmu *cci_pmu, stru= ct platform_device *pdev) .stop =3D cci_pmu_stop, .read =3D pmu_read, .attr_groups =3D pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 cci_pmu->plat_device =3D pdev; diff --git a/drivers/perf/arm-ccn.c b/drivers/perf/arm-ccn.c index 728d13d8e98a..ce26bb773a56 100644 --- a/drivers/perf/arm-ccn.c +++ b/drivers/perf/arm-ccn.c @@ -719,9 +719,6 @@ static int arm_ccn_pmu_event_init(struct perf_event *ev= ent) int i; struct perf_event *sibling; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - ccn =3D pmu_to_arm_ccn(event->pmu); =20 if (hw->sample_period) { @@ -1275,7 +1272,8 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn) .read =3D arm_ccn_pmu_event_read, .pmu_enable =3D arm_ccn_pmu_enable, .pmu_disable =3D arm_ccn_pmu_disable, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 /* No overflow interrupt? Have to use a timer instead. */ diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index c584165b13ba..717dd90417d6 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -1696,9 +1696,6 @@ static int arm_cmn_event_init(struct perf_event *even= t) bool bynodeid; u16 nodeid, eventid; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EINVAL; =20 @@ -2471,7 +2468,8 @@ static int arm_cmn_probe(struct platform_device *pdev) cmn->pmu =3D (struct pmu) { .module =3D THIS_MODULE, .attr_groups =3D arm_cmn_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .pmu_enable =3D arm_cmn_pmu_enable, .pmu_disable =3D arm_cmn_pmu_disable, diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/ar= m_cspmu.c index 50b89b989ce7..d408cbb84ed7 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -676,9 +676,6 @@ static int arm_cspmu_event_init(struct perf_event *even= t) =20 cspmu =3D to_arm_cspmu(event->pmu); =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * Following other "uncore" PMUs, we do not support sampling mode or * attach to a task (per-process mode). @@ -1186,7 +1183,8 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *c= spmu) if (ret) return ret; =20 - capabilities =3D PERF_PMU_CAP_NO_EXCLUDE; + capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS; if (cspmu->irq =3D=3D 0) capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; =20 diff --git a/drivers/perf/arm_dmc620_pmu.c b/drivers/perf/arm_dmc620_pmu.c index 30cea6859574..dc0b5269edc1 100644 --- a/drivers/perf/arm_dmc620_pmu.c +++ b/drivers/perf/arm_dmc620_pmu.c @@ -515,9 +515,6 @@ static int dmc620_pmu_event_init(struct perf_event *eve= nt) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * DMC 620 PMUs are shared across all cpus and cannot * support task bound and sampling events. @@ -673,7 +670,8 @@ static int dmc620_pmu_device_probe(struct platform_devi= ce *pdev) =20 dmc620_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dmc620_pmu_event_init, .add =3D dmc620_pmu_add, diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c index 7ec4498e312f..f5ea5acaf2f3 100644 --- a/drivers/perf/arm_dsu_pmu.c +++ b/drivers/perf/arm_dsu_pmu.c @@ -544,9 +544,6 @@ static int dsu_pmu_event_init(struct perf_event *event) { struct dsu_pmu *dsu_pmu =3D to_dsu_pmu(event->pmu); =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* We don't support sampling */ if (is_sampling_event(event)) { dev_dbg(dsu_pmu->pmu.dev, "Can't support sampling events\n"); @@ -762,7 +759,8 @@ static int dsu_pmu_device_probe(struct platform_device = *pdev) .read =3D dsu_pmu_read, =20 .attr_groups =3D dsu_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 rc =3D perf_pmu_register(&dsu_pmu->pmu, name, -1); diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 6303b82566f9..ccecde79adb4 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -401,9 +401,6 @@ static int smmu_pmu_event_init(struct perf_event *event) int group_num_events =3D 1; u16 event_id; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (hwc->sample_period) { dev_dbg(dev, "Sampling not supported\n"); return -EOPNOTSUPP; @@ -870,7 +867,8 @@ static int smmu_pmu_probe(struct platform_device *pdev) .stop =3D smmu_pmu_event_stop, .read =3D smmu_pmu_event_read, .attr_groups =3D smmu_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 smmu_pmu->reg_base =3D devm_platform_get_and_ioremap_resource(pdev, 0, &r= es_0); diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c index b622d75d8c9e..290e98247bba 100644 --- a/drivers/perf/arm_spe_pmu.c +++ b/drivers/perf/arm_spe_pmu.c @@ -699,10 +699,6 @@ static int arm_spe_pmu_event_init(struct perf_event *e= vent) struct perf_event_attr *attr =3D &event->attr; struct arm_spe_pmu *spe_pmu =3D to_spe_pmu(event->pmu); =20 - /* This is, of course, deeply driver-specific */ - if (attr->type !=3D event->pmu->type) - return -ENOENT; - if (event->cpu >=3D 0 && !cpumask_test_cpu(event->cpu, &spe_pmu->supported_cpus)) return -ENOENT; @@ -932,7 +928,8 @@ static int arm_spe_pmu_perf_init(struct arm_spe_pmu *sp= e_pmu) =20 spe_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE, + .capabilities =3D PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .attr_groups =3D arm_spe_pmu_attr_groups, /* * We hitch a ride on the software context here, so that diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index 365d964b0f6a..57954d102a75 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -571,10 +571,6 @@ static int cxl_pmu_event_init(struct perf_event *event) struct cxl_pmu_info *info =3D pmu_to_cxl_pmu_info(event->pmu); int rc; =20 - /* Top level type sanity check - is this a Hardware Event being requested= */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; /* TODO: Validation of any filter */ @@ -870,7 +866,8 @@ static int cxl_pmu_probe(struct device *dev) .read =3D cxl_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cxl_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 if (info->irq <=3D 0) diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c index 957058ad0099..161faa98f627 100644 --- a/drivers/perf/dwc_pcie_pmu.c +++ b/drivers/perf/dwc_pcie_pmu.c @@ -366,9 +366,6 @@ static int dwc_pcie_pmu_event_init(struct perf_event *e= vent) struct perf_event *sibling; u32 lane; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* We don't support sampling */ if (is_sampling_event(event)) return -EINVAL; @@ -636,7 +633,8 @@ static int dwc_pcie_pmu_probe(struct platform_device *p= lat_dev) .parent =3D &pdev->dev, .module =3D THIS_MODULE, .attr_groups =3D dwc_pcie_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dwc_pcie_pmu_event_init, .add =3D dwc_pcie_pmu_event_add, diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_p= erf.c index 7dbfaee372c7..021d637aea06 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -398,9 +398,6 @@ static int ddr_perf_event_init(struct perf_event *event) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 @@ -651,7 +648,8 @@ static int ddr_perf_init(struct ddr_pmu *pmu, void __io= mem *base, *pmu =3D (struct ddr_pmu) { .pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D ddr_perf_event_init, diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_p= erf.c index 9685645bfe04..ec03e1e69568 100644 --- a/drivers/perf/fsl_imx9_ddr_perf.c +++ b/drivers/perf/fsl_imx9_ddr_perf.c @@ -416,9 +416,6 @@ static int ddr_perf_event_init(struct perf_event *event) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 @@ -528,7 +525,8 @@ static void ddr_perf_init(struct ddr_pmu *pmu, void __i= omem *base, *pmu =3D (struct ddr_pmu) { .pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D ddr_perf_event_init, diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilico= n/hisi_pcie_pmu.c index b90ba8aca3fa..5a301a7db7ae 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -353,10 +353,6 @@ static int hisi_pcie_pmu_event_init(struct perf_event = *event) struct hisi_pcie_pmu *pcie_pmu =3D to_pcie_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - /* Check the type first before going on, otherwise it's not our event */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (EXT_COUNTER_IS_USED(hisi_pcie_get_event(event))) hwc->event_base =3D HISI_PCIE_EXT_CNT; else @@ -813,7 +809,8 @@ static int hisi_pcie_alloc_pmu(struct pci_dev *pdev, st= ruct hisi_pcie_pmu *pcie_ .read =3D hisi_pcie_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hisi_pcie_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 return 0; diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisili= con/hisi_uncore_pmu.c index 04031450d5fe..0908ddd992b7 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c @@ -186,9 +186,6 @@ int hisi_uncore_pmu_event_init(struct perf_event *event) struct hw_perf_event *hwc =3D &event->hw; struct hisi_pmu *hisi_pmu; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * We do not support sampling as the counters are all * shared by all CPU cores in a CPU die(SCCL). Also we @@ -548,7 +545,8 @@ void hisi_pmu_init(struct hisi_pmu *hisi_pmu, struct mo= dule *module) pmu->stop =3D hisi_uncore_pmu_stop; pmu->read =3D hisi_uncore_pmu_read; pmu->attr_groups =3D hisi_pmu->pmu_events.attr_groups; - pmu->capabilities =3D PERF_PMU_CAP_NO_EXCLUDE; + pmu->capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS; } EXPORT_SYMBOL_GPL(hisi_pmu_init); =20 diff --git a/drivers/perf/hisilicon/hns3_pmu.c b/drivers/perf/hisilicon/hns= 3_pmu.c index 16869bf5bf4c..300345edd211 100644 --- a/drivers/perf/hisilicon/hns3_pmu.c +++ b/drivers/perf/hisilicon/hns3_pmu.c @@ -1236,9 +1236,6 @@ static int hns3_pmu_event_init(struct perf_event *eve= nt) int idx; int ret; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* Sampling is not supported */ if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; @@ -1429,7 +1426,8 @@ static int hns3_pmu_alloc_pmu(struct pci_dev *pdev, s= truct hns3_pmu *hns3_pmu) .read =3D hns3_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hns3_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 return 0; diff --git a/drivers/perf/marvell_cn10k_ddr_pmu.c b/drivers/perf/marvell_cn= 10k_ddr_pmu.c index 524ba82bfce2..baa0a3fbad31 100644 --- a/drivers/perf/marvell_cn10k_ddr_pmu.c +++ b/drivers/perf/marvell_cn10k_ddr_pmu.c @@ -325,9 +325,6 @@ static int cn10k_ddr_perf_event_init(struct perf_event = *event) struct cn10k_ddr_pmu *pmu =3D to_cn10k_ddr_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (is_sampling_event(event)) { dev_info(pmu->dev, "Sampling not supported!\n"); return -EOPNOTSUPP; @@ -656,7 +653,8 @@ static int cn10k_ddr_perf_probe(struct platform_device = *pdev) =20 ddr_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cn10k_attr_groups, .event_init =3D cn10k_ddr_perf_event_init, diff --git a/drivers/perf/marvell_cn10k_tad_pmu.c b/drivers/perf/marvell_cn= 10k_tad_pmu.c index fec8e82edb95..bc2d642e87e8 100644 --- a/drivers/perf/marvell_cn10k_tad_pmu.c +++ b/drivers/perf/marvell_cn10k_tad_pmu.c @@ -140,9 +140,6 @@ static int tad_pmu_event_init(struct perf_event *event) { struct tad_pmu *tad_pmu =3D to_tad_pmu(event->pmu); =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - if (!event->attr.disabled) return -EINVAL; =20 @@ -321,7 +318,8 @@ static int tad_pmu_probe(struct platform_device *pdev) .module =3D THIS_MODULE, .attr_groups =3D tad_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_INTERRUPT, + PERF_PMU_CAP_NO_INTERRUPT | + PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, =20 .event_init =3D tad_pmu_event_init, diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c index 3f9a98c17a89..8b2617ad4bdc 100644 --- a/drivers/perf/qcom_l2_pmu.c +++ b/drivers/perf/qcom_l2_pmu.c @@ -440,12 +440,7 @@ static int l2_cache_event_init(struct perf_event *even= t) struct hw_perf_event *hwc =3D &event->hw; struct cluster_pmu *cluster; struct perf_event *sibling; - struct l2cache_pmu *l2cache_pmu; - - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - l2cache_pmu =3D to_l2cache_pmu(event->pmu); + struct l2cache_pmu *l2cache_pmu =3D to_l2cache_pmu(event->pmu); =20 if (hwc->sample_period) { dev_dbg_ratelimited(&l2cache_pmu->pdev->dev, @@ -914,7 +909,8 @@ static int l2_cache_pmu_probe(struct platform_device *p= dev) .stop =3D l2_cache_event_stop, .read =3D l2_cache_event_read, .attr_groups =3D l2_cache_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 l2cache_pmu->num_counters =3D get_num_counters(); diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c index f16783d03db7..72610777567d 100644 --- a/drivers/perf/qcom_l3_pmu.c +++ b/drivers/perf/qcom_l3_pmu.c @@ -480,12 +480,6 @@ static int qcom_l3_cache__event_init(struct perf_event= *event) struct l3cache_pmu *l3pmu =3D to_l3cache_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - /* - * Is the event for this PMU? - */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * Sampling not supported since these events are not core-attributable. */ @@ -760,7 +754,8 @@ static int qcom_l3_cache_pmu_probe(struct platform_devi= ce *pdev) .read =3D qcom_l3_cache__event_read, =20 .attr_groups =3D qcom_l3_cache_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 l3pmu->regs =3D devm_platform_get_and_ioremap_resource(pdev, 0, &memrc); diff --git a/drivers/perf/thunderx2_pmu.c b/drivers/perf/thunderx2_pmu.c index 1edb9c03704f..8c7a2c6113be 100644 --- a/drivers/perf/thunderx2_pmu.c +++ b/drivers/perf/thunderx2_pmu.c @@ -574,10 +574,6 @@ static int tx2_uncore_event_init(struct perf_event *ev= ent) struct hw_perf_event *hwc =3D &event->hw; struct tx2_uncore_pmu *tx2_pmu; =20 - /* Test the event attr type check for PMU enumeration */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * SOC PMU counters are shared across all cores. * Therefore, it does not support per-process mode. @@ -737,7 +733,8 @@ static int tx2_uncore_pmu_register( .start =3D tx2_uncore_event_start, .stop =3D tx2_uncore_event_stop, .read =3D tx2_uncore_event_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 tx2_pmu->pmu.name =3D devm_kasprintf(dev, GFP_KERNEL, diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c index 7ce344248dda..16bb3dfb1636 100644 --- a/drivers/perf/xgene_pmu.c +++ b/drivers/perf/xgene_pmu.c @@ -888,10 +888,6 @@ static int xgene_perf_event_init(struct perf_event *ev= ent) struct hw_perf_event *hw =3D &event->hw; struct perf_event *sibling; =20 - /* Test the event attr type check for PMU enumeration */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - /* * SOC PMU counters are shared across all cores. * Therefore, it does not support per-process mode. @@ -1112,7 +1108,8 @@ static int xgene_init_perf(struct xgene_pmu_dev *pmu_= dev, char *name) .start =3D xgene_perf_start, .stop =3D xgene_perf_stop, .read =3D xgene_perf_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 /* Hardware counter init */ --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F31891386A8; Tue, 12 Mar 2024 17:34:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264876; 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Tue, 12 Mar 2024 10:35:11 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6C6EE3F762; Tue, 12 Mar 2024 10:34:32 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 04/10] perf: Rename PERF_PMU_CAP_NO_INTERRUPT Date: Tue, 12 Mar 2024 17:34:06 +0000 Message-Id: <0999a39f0a068979dbcc6119380f63d706101b4f.1710257512.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The PERF_PMU_CAP_NO_INTERRUPT flag is used by the core solely to determine whether PMUs can support sampling events or not. It makes sense to utilise the same capability for non-CPU-affine PMUs which have no relevant state to sample, but it would be a rather confusing misnomer when such PMUs do still have interrupts for handling overflows. Let's rename it to represent what it actually means. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- arch/arc/kernel/perf_event.c | 2 +- arch/csky/kernel/perf_event.c | 2 +- arch/powerpc/perf/8xx-pmu.c | 2 +- arch/powerpc/perf/hv-24x7.c | 2 +- arch/powerpc/perf/hv-gpci.c | 2 +- arch/powerpc/platforms/pseries/papr_scm.c | 2 +- arch/s390/kernel/perf_cpum_cf.c | 2 +- arch/sh/kernel/perf_event.c | 2 +- arch/x86/events/amd/uncore.c | 6 +++--- arch/x86/events/core.c | 2 +- arch/x86/events/intel/cstate.c | 6 +++--- arch/x86/events/msr.c | 2 +- drivers/fpga/dfl-fme-perf.c | 2 +- drivers/perf/arm_cspmu/arm_cspmu.c | 2 +- drivers/perf/arm_pmu_platform.c | 2 +- drivers/perf/marvell_cn10k_tad_pmu.c | 2 +- drivers/perf/riscv_pmu_sbi.c | 2 +- include/linux/perf_event.h | 2 +- kernel/events/core.c | 2 +- 19 files changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c index adff957962da..cd02cf7904e8 100644 --- a/arch/arc/kernel/perf_event.c +++ b/arch/arc/kernel/perf_event.c @@ -819,7 +819,7 @@ static int arc_pmu_device_probe(struct platform_device = *pdev) } =20 if (irq =3D=3D -1) - arc_pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + arc_pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; =20 /* * perf parser doesn't really like '-' symbol in events name, so let's diff --git a/arch/csky/kernel/perf_event.c b/arch/csky/kernel/perf_event.c index e5f18420ce64..c733fb29114f 100644 --- a/arch/csky/kernel/perf_event.c +++ b/arch/csky/kernel/perf_event.c @@ -1315,7 +1315,7 @@ int csky_pmu_device_probe(struct platform_device *pde= v, =20 ret =3D csky_pmu_request_irq(csky_pmu_handle_irq); if (ret) { - csky_pmu.pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + csky_pmu.pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; pr_notice("[perf] PMU request irq fail!\n"); } =20 diff --git a/arch/powerpc/perf/8xx-pmu.c b/arch/powerpc/perf/8xx-pmu.c index 308a2e40d7be..456de23c2ea7 100644 --- a/arch/powerpc/perf/8xx-pmu.c +++ b/arch/powerpc/perf/8xx-pmu.c @@ -181,7 +181,7 @@ static struct pmu mpc8xx_pmu =3D { .add =3D mpc8xx_pmu_add, .del =3D mpc8xx_pmu_del, .read =3D mpc8xx_pmu_read, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_NMI, }; =20 diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c index 057ec2e3451d..74821bb193c1 100644 --- a/arch/powerpc/perf/hv-24x7.c +++ b/arch/powerpc/perf/hv-24x7.c @@ -1737,7 +1737,7 @@ static int hv_24x7_init(void) return -ENOMEM; =20 /* sampling not supported */ - h_24x7_pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + h_24x7_pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING =20 r =3D create_events_from_catalog(&event_group.attrs, &event_desc_group.attrs, diff --git a/arch/powerpc/perf/hv-gpci.c b/arch/powerpc/perf/hv-gpci.c index 27f18119fda1..25842f61662c 100644 --- a/arch/powerpc/perf/hv-gpci.c +++ b/arch/powerpc/perf/hv-gpci.c @@ -984,7 +984,7 @@ static int hv_gpci_init(void) return r; =20 /* sampling not supported */ - h_gpci_pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + h_gpci_pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING =20 arg =3D (void *)get_cpu_var(hv_gpci_reqb); memset(arg, 0, HGPCI_REQ_BUFFER_SIZE); diff --git a/arch/powerpc/platforms/pseries/papr_scm.c b/arch/powerpc/platf= orms/pseries/papr_scm.c index 1a53e048ceb7..6415cdabe403 100644 --- a/arch/powerpc/platforms/pseries/papr_scm.c +++ b/arch/powerpc/platforms/pseries/papr_scm.c @@ -501,7 +501,7 @@ static void papr_scm_pmu_register(struct papr_scm_priv = *p) nd_pmu->pmu.add =3D papr_scm_pmu_add; nd_pmu->pmu.del =3D papr_scm_pmu_del; =20 - nd_pmu->pmu.capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | + nd_pmu->pmu.capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE; =20 /*updating the cpumask variable */ diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_c= f.c index 41ed6e0f0a2a..8474aafa2075 100644 --- a/arch/s390/kernel/perf_cpum_cf.c +++ b/arch/s390/kernel/perf_cpum_cf.c @@ -1054,7 +1054,7 @@ static void cpumf_pmu_del(struct perf_event *event, i= nt flags) /* Performance monitoring unit for s390x */ static struct pmu cpumf_pmu =3D { .task_ctx_nr =3D perf_sw_context, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT, + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING .pmu_enable =3D cpumf_pmu_enable, .pmu_disable =3D cpumf_pmu_disable, .event_init =3D cpumf_pmu_event_init, diff --git a/arch/sh/kernel/perf_event.c b/arch/sh/kernel/perf_event.c index 1d2507f22437..4bade9b7d357 100644 --- a/arch/sh/kernel/perf_event.c +++ b/arch/sh/kernel/perf_event.c @@ -352,7 +352,7 @@ int register_sh_pmu(struct sh_pmu *_pmu) * no interrupts, and are therefore unable to do sampling without * further work and timer assistance. */ - pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING =20 WARN_ON(_pmu->num_events > MAX_HWEVENTS); =20 diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 5bf03c575812..4220bf556962 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -700,7 +700,7 @@ int amd_uncore_df_ctx_init(struct amd_uncore *uncore, u= nsigned int cpu) .start =3D amd_uncore_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, .module =3D THIS_MODULE, }; =20 @@ -833,7 +833,7 @@ int amd_uncore_l3_ctx_init(struct amd_uncore *uncore, u= nsigned int cpu) .start =3D amd_uncore_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, .module =3D THIS_MODULE, }; =20 @@ -958,7 +958,7 @@ int amd_uncore_umc_ctx_init(struct amd_uncore *uncore, = unsigned int cpu) .start =3D amd_uncore_umc_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, .module =3D THIS_MODULE, }; =20 diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 09050641ce5d..20cded91716f 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1812,7 +1812,7 @@ static void __init pmu_check_apic(void) * events (user-space has to fall back and * sample via a hrtimer based software event): */ - pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING =20 } =20 diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c index 4b50a3a9818a..3e4ab89d440c 100644 --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -530,7 +530,7 @@ static struct pmu cstate_core_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_EXCLUDE, .module =3D THIS_MODULE, }; =20 @@ -545,7 +545,7 @@ static struct pmu cstate_pkg_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_EXCLUDE, .module =3D THIS_MODULE, }; =20 @@ -560,7 +560,7 @@ static struct pmu cstate_module_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE, .module =3D THIS_MODULE, }; =20 diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index 9e237b30f017..b33c0931d61d 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -296,7 +296,7 @@ static struct pmu pmu_msr =3D { .start =3D msr_event_start, .stop =3D msr_event_stop, .read =3D msr_event_update, - .capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE, .attr_update =3D attr_update, }; =20 diff --git a/drivers/fpga/dfl-fme-perf.c b/drivers/fpga/dfl-fme-perf.c index 7422d2bc6f37..b5bafea06a55 100644 --- a/drivers/fpga/dfl-fme-perf.c +++ b/drivers/fpga/dfl-fme-perf.c @@ -921,7 +921,7 @@ static int fme_perf_pmu_register(struct platform_device= *pdev, pmu->start =3D fme_perf_event_start; pmu->stop =3D fme_perf_event_stop; pmu->read =3D fme_perf_event_read; - pmu->capabilities =3D PERF_PMU_CAP_NO_INTERRUPT | + pmu->capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE; =20 name =3D devm_kasprintf(priv->dev, GFP_KERNEL, "dfl_fme%d", pdev->id); diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/ar= m_cspmu.c index d408cbb84ed7..32ffea50cd7a 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -1186,7 +1186,7 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *c= spmu) capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_COMMON_EVENTS; if (cspmu->irq =3D=3D 0) - capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; =20 cspmu->pmu =3D (struct pmu){ .task_ctx_nr =3D perf_invalid_context, diff --git a/drivers/perf/arm_pmu_platform.c b/drivers/perf/arm_pmu_platfor= m.c index 3596db36cbff..e96c003f8555 100644 --- a/drivers/perf/arm_pmu_platform.c +++ b/drivers/perf/arm_pmu_platform.c @@ -109,7 +109,7 @@ static int pmu_parse_irqs(struct arm_pmu *pmu) */ if (num_irqs =3D=3D 0) { dev_warn(dev, "no irqs for PMU, sampling events not supported\n"); - pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; cpumask_setall(&pmu->supported_cpus); return 0; } diff --git a/drivers/perf/marvell_cn10k_tad_pmu.c b/drivers/perf/marvell_cn= 10k_tad_pmu.c index bc2d642e87e8..aaedb5715d69 100644 --- a/drivers/perf/marvell_cn10k_tad_pmu.c +++ b/drivers/perf/marvell_cn10k_tad_pmu.c @@ -318,7 +318,7 @@ static int tad_pmu_probe(struct platform_device *pdev) .module =3D THIS_MODULE, .attr_groups =3D tad_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_INTERRUPT | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, =20 diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 16acd4dcdb96..aa562520ecfd 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -1049,7 +1049,7 @@ static int pmu_sbi_device_probe(struct platform_devic= e *pdev) ret =3D pmu_sbi_setup_irqs(pmu, pdev); if (ret < 0) { pr_info("Perf sampling/filtering is not supported as sscof extension is = not available\n"); - pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_INTERRUPT; + pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; pmu->pmu.capabilities |=3D PERF_PMU_CAP_NO_EXCLUDE; } =20 diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 983201f21dd2..b1fd832ed8bf 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -282,7 +282,7 @@ struct perf_event_pmu_context; /** * pmu::capabilities flags */ -#define PERF_PMU_CAP_NO_INTERRUPT 0x0001 +#define PERF_PMU_CAP_NO_SAMPLING 0x0001 #define PERF_PMU_CAP_NO_NMI 0x0002 #define PERF_PMU_CAP_AUX_NO_SG 0x0004 #define PERF_PMU_CAP_EXTENDED_REGS 0x0008 diff --git a/kernel/events/core.c b/kernel/events/core.c index 7ad80826c218..892212aae85e 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -12539,7 +12539,7 @@ SYSCALL_DEFINE5(perf_event_open, } =20 if (is_sampling_event(event)) { - if (event->pmu->capabilities & PERF_PMU_CAP_NO_INTERRUPT) { + if (event->pmu->capabilities & PERF_PMU_CAP_NO_SAMPLING) { err =3D -EOPNOTSUPP; goto err_alloc; } --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 92F7A13A279; Tue, 12 Mar 2024 17:34:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264879; cv=none; b=fVcKTtZGsZ/6c62pxVWoCAFwfhk3/f1E8UBKh6UVmr67hDz5AuQ1L6YW8DRoyG2AjSEP21M5RBbI3hS9rdHUgR2GaVpnoNlkRUazMDpY5kmokA9pKok0YHXI+Vfz8ldW9R7ZYkgHNRaLzqtLUh6+jaKctFZ70x9Y4My2T6c3HrE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264879; c=relaxed/simple; bh=7moC6d9m4ZjglLfhbpvlbuJJHrdfbQlKhLM46UMhzJA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=q19aN0hSjz4qqVmdY6monsRr6sO8y3Wg8+yu4J49x9hJpBVVzEe1Dhn8W7uS/lQiifKu4gqi15nWCAGFg67qDZjuQI6xPV/if+Q3dc08PHTTeBm2BIVJ4CHHNpxon5PCgPR+qZ2I4roPswe+NR4YTzUEm6deWxhDgeVesNHwvdU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 273761570; Tue, 12 Mar 2024 10:35:14 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CBFEA3F762; Tue, 12 Mar 2024 10:34:34 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 05/10] drivers/perf: Use PERF_PMU_CAP_NO_SAMPLING consistently Date: Tue, 12 Mar 2024 17:34:07 +0000 Message-Id: <5622df31e5f4874c2c085d1ce930f5bbad889181.1710257512.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Our system PMUs fundamentally cannot support the current notion of sampling events, so now that the core capability has been clarified, apply it consistently and purge yet more boilerplate. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- drivers/perf/alibaba_uncore_drw_pmu.c | 6 +----- drivers/perf/amlogic/meson_ddr_pmu_core.c | 3 ++- drivers/perf/arm-cci.c | 3 ++- drivers/perf/arm-ccn.c | 12 +----------- drivers/perf/arm-cmn.c | 3 ++- drivers/perf/arm_cspmu/arm_cspmu.c | 17 ++++------------- drivers/perf/arm_dmc620_pmu.c | 4 ++-- drivers/perf/arm_dsu_pmu.c | 12 +----------- drivers/perf/arm_smmuv3_pmu.c | 6 +----- drivers/perf/cxl_pmu.c | 3 ++- drivers/perf/dwc_pcie_pmu.c | 5 +---- drivers/perf/fsl_imx8_ddr_perf.c | 3 ++- drivers/perf/fsl_imx9_ddr_perf.c | 3 ++- drivers/perf/hisilicon/hisi_pcie_pmu.c | 4 ++-- drivers/perf/hisilicon/hisi_uncore_pmu.c | 3 ++- drivers/perf/hisilicon/hns3_pmu.c | 4 ++-- drivers/perf/marvell_cn10k_ddr_pmu.c | 6 +----- drivers/perf/qcom_l2_pmu.c | 7 +------ drivers/perf/qcom_l3_pmu.c | 7 +------ drivers/perf/thunderx2_pmu.c | 4 ++-- drivers/perf/xgene_pmu.c | 4 ++-- 21 files changed, 36 insertions(+), 83 deletions(-) diff --git a/drivers/perf/alibaba_uncore_drw_pmu.c b/drivers/perf/alibaba_u= ncore_drw_pmu.c index 606c2301bd11..eadf4118d1ec 100644 --- a/drivers/perf/alibaba_uncore_drw_pmu.c +++ b/drivers/perf/alibaba_uncore_drw_pmu.c @@ -535,11 +535,6 @@ static int ali_drw_pmu_event_init(struct perf_event *e= vent) struct perf_event *sibling; struct device *dev =3D drw_pmu->pmu.dev; =20 - if (is_sampling_event(event)) { - dev_err(dev, "Sampling not supported!\n"); - return -EOPNOTSUPP; - } - if (event->attach_state & PERF_ATTACH_TASK) { dev_err(dev, "Per-task counter cannot allocate!\n"); return -EOPNOTSUPP; @@ -707,6 +702,7 @@ static int ali_drw_pmu_probe(struct platform_device *pd= ev) .read =3D ali_drw_pmu_read, .attr_groups =3D ali_drw_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/amlogic/meson_ddr_pmu_core.c b/drivers/perf/amlog= ic/meson_ddr_pmu_core.c index c19b682297f3..3bc887cde163 100644 --- a/drivers/perf/amlogic/meson_ddr_pmu_core.c +++ b/drivers/perf/amlogic/meson_ddr_pmu_core.c @@ -121,7 +121,7 @@ static int meson_ddr_perf_event_init(struct perf_event = *event) u64 config1 =3D event->attr.config1; u64 config2 =3D event->attr.config2; =20 - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 if (event->cpu < 0) @@ -490,6 +490,7 @@ int meson_ddr_pmu_create(struct platform_device *pdev) .pmu =3D { .module =3D THIS_MODULE, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, diff --git a/drivers/perf/arm-cci.c b/drivers/perf/arm-cci.c index f157bfd4b923..cf8fa2474bed 100644 --- a/drivers/perf/arm-cci.c +++ b/drivers/perf/arm-cci.c @@ -1313,7 +1313,7 @@ static int cci_pmu_event_init(struct perf_event *even= t) int err =3D 0; =20 /* Shared by all CPUs, no meaningful state to sample */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 /* @@ -1414,6 +1414,7 @@ static int cci_pmu_init(struct cci_pmu *cci_pmu, stru= ct platform_device *pdev) .read =3D pmu_read, .attr_groups =3D pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/arm-ccn.c b/drivers/perf/arm-ccn.c index ce26bb773a56..4114349e62dd 100644 --- a/drivers/perf/arm-ccn.c +++ b/drivers/perf/arm-ccn.c @@ -713,7 +713,6 @@ static void arm_ccn_pmu_event_release(struct perf_event= *event) static int arm_ccn_pmu_event_init(struct perf_event *event) { struct arm_ccn *ccn; - struct hw_perf_event *hw =3D &event->hw; u32 node_xp, type, event_id; int valid; int i; @@ -721,16 +720,6 @@ static int arm_ccn_pmu_event_init(struct perf_event *e= vent) =20 ccn =3D pmu_to_arm_ccn(event->pmu); =20 - if (hw->sample_period) { - dev_dbg(ccn->dev, "Sampling not supported!\n"); - return -EOPNOTSUPP; - } - - if (has_branch_stack(event)) { - dev_dbg(ccn->dev, "Can't exclude execution levels!\n"); - return -EINVAL; - } - if (event->cpu < 0) { dev_dbg(ccn->dev, "Can't provide per-task data!\n"); return -EOPNOTSUPP; @@ -1273,6 +1262,7 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn) .pmu_enable =3D arm_ccn_pmu_enable, .pmu_disable =3D arm_ccn_pmu_disable, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index 717dd90417d6..e1f151f04c9f 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -1696,7 +1696,7 @@ static int arm_cmn_event_init(struct perf_event *even= t) bool bynodeid; u16 nodeid, eventid; =20 - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EINVAL; =20 event->cpu =3D cmn->cpu; @@ -2469,6 +2469,7 @@ static int arm_cmn_probe(struct platform_device *pdev) .module =3D THIS_MODULE, .attr_groups =3D arm_cmn_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .pmu_enable =3D arm_cmn_pmu_enable, diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/ar= m_cspmu.c index 32ffea50cd7a..c5c7198e6921 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -680,12 +680,6 @@ static int arm_cspmu_event_init(struct perf_event *eve= nt) * Following other "uncore" PMUs, we do not support sampling mode or * attach to a task (per-process mode). */ - if (is_sampling_event(event)) { - dev_dbg(cspmu->pmu.dev, - "Can't support sampling events\n"); - return -EOPNOTSUPP; - } - if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) { dev_dbg(cspmu->pmu.dev, "Can't support per-task counters\n"); @@ -1171,7 +1165,7 @@ static int arm_cspmu_get_cpus(struct arm_cspmu *cspmu) =20 static int arm_cspmu_register_pmu(struct arm_cspmu *cspmu) { - int ret, capabilities; + int ret; struct attribute_group **attr_groups; =20 attr_groups =3D arm_cspmu_alloc_attr_group(cspmu); @@ -1183,11 +1177,6 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *= cspmu) if (ret) return ret; =20 - capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_COMMON_EVENTS; - if (cspmu->irq =3D=3D 0) - capabilities |=3D PERF_PMU_CAP_NO_SAMPLING; - cspmu->pmu =3D (struct pmu){ .task_ctx_nr =3D perf_invalid_context, .module =3D cspmu->impl.module, @@ -1200,7 +1189,9 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *c= spmu) .stop =3D arm_cspmu_stop, .read =3D arm_cspmu_read, .attr_groups =3D (const struct attribute_group **)attr_groups, - .capabilities =3D capabilities, + .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | + PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 /* Hardware counter init */ diff --git a/drivers/perf/arm_dmc620_pmu.c b/drivers/perf/arm_dmc620_pmu.c index dc0b5269edc1..47d3a166bccc 100644 --- a/drivers/perf/arm_dmc620_pmu.c +++ b/drivers/perf/arm_dmc620_pmu.c @@ -519,8 +519,7 @@ static int dmc620_pmu_event_init(struct perf_event *eve= nt) * DMC 620 PMUs are shared across all cpus and cannot * support task bound and sampling events. */ - if (is_sampling_event(event) || - event->attach_state & PERF_ATTACH_TASK) { + if (event->attach_state & PERF_ATTACH_TASK) { dev_dbg(dmc620_pmu->pmu.dev, "Can't support per-task counters\n"); return -EOPNOTSUPP; @@ -671,6 +670,7 @@ static int dmc620_pmu_device_probe(struct platform_devi= ce *pdev) dmc620_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dmc620_pmu_event_init, diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c index f5ea5acaf2f3..3424d165795c 100644 --- a/drivers/perf/arm_dsu_pmu.c +++ b/drivers/perf/arm_dsu_pmu.c @@ -544,23 +544,12 @@ static int dsu_pmu_event_init(struct perf_event *even= t) { struct dsu_pmu *dsu_pmu =3D to_dsu_pmu(event->pmu); =20 - /* We don't support sampling */ - if (is_sampling_event(event)) { - dev_dbg(dsu_pmu->pmu.dev, "Can't support sampling events\n"); - return -EOPNOTSUPP; - } - /* We cannot support task bound events */ if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) { dev_dbg(dsu_pmu->pmu.dev, "Can't support per-task counters\n"); return -EINVAL; } =20 - if (has_branch_stack(event)) { - dev_dbg(dsu_pmu->pmu.dev, "Can't support filtering\n"); - return -EINVAL; - } - if (!cpumask_test_cpu(event->cpu, &dsu_pmu->associated_cpus)) { dev_dbg(dsu_pmu->pmu.dev, "Requested cpu is not associated with the DSU\n"); @@ -760,6 +749,7 @@ static int dsu_pmu_device_probe(struct platform_device = *pdev) =20 .attr_groups =3D dsu_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index ccecde79adb4..8206ba0c1637 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -401,11 +401,6 @@ static int smmu_pmu_event_init(struct perf_event *even= t) int group_num_events =3D 1; u16 event_id; =20 - if (hwc->sample_period) { - dev_dbg(dev, "Sampling not supported\n"); - return -EOPNOTSUPP; - } - if (event->cpu < 0) { dev_dbg(dev, "Per-task mode not supported\n"); return -EOPNOTSUPP; @@ -868,6 +863,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) .read =3D smmu_pmu_event_read, .attr_groups =3D smmu_pmu_attr_grps, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index 57954d102a75..41afbbd221a9 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -571,7 +571,7 @@ static int cxl_pmu_event_init(struct perf_event *event) struct cxl_pmu_info *info =3D pmu_to_cxl_pmu_info(event->pmu); int rc; =20 - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; /* TODO: Validation of any filter */ =20 @@ -867,6 +867,7 @@ static int cxl_pmu_probe(struct device *dev) .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cxl_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c index 161faa98f627..638ad527f252 100644 --- a/drivers/perf/dwc_pcie_pmu.c +++ b/drivers/perf/dwc_pcie_pmu.c @@ -366,10 +366,6 @@ static int dwc_pcie_pmu_event_init(struct perf_event *= event) struct perf_event *sibling; u32 lane; =20 - /* We don't support sampling */ - if (is_sampling_event(event)) - return -EINVAL; - /* We cannot support task bound events */ if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) return -EINVAL; @@ -634,6 +630,7 @@ static int dwc_pcie_pmu_probe(struct platform_device *p= lat_dev) .module =3D THIS_MODULE, .attr_groups =3D dwc_pcie_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dwc_pcie_pmu_event_init, diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_p= erf.c index 021d637aea06..0070f2bd4d88 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -398,7 +398,7 @@ static int ddr_perf_event_init(struct perf_event *event) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 if (event->cpu < 0) { @@ -649,6 +649,7 @@ static int ddr_perf_init(struct ddr_pmu *pmu, void __io= mem *base, .pmu =3D (struct pmu) { .module =3D THIS_MODULE, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_p= erf.c index ec03e1e69568..83822abf8031 100644 --- a/drivers/perf/fsl_imx9_ddr_perf.c +++ b/drivers/perf/fsl_imx9_ddr_perf.c @@ -416,7 +416,7 @@ static int ddr_perf_event_init(struct perf_event *event) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 if (event->cpu < 0) { @@ -526,6 +526,7 @@ static void ddr_perf_init(struct ddr_pmu *pmu, void __i= omem *base, .pmu =3D (struct pmu) { .module =3D THIS_MODULE, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilico= n/hisi_pcie_pmu.c index 5a301a7db7ae..7579b93dc462 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -358,8 +358,7 @@ static int hisi_pcie_pmu_event_init(struct perf_event *= event) else hwc->event_base =3D HISI_PCIE_CNT; =20 - /* Sampling is not supported. */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 if (!hisi_pcie_pmu_valid_filter(event, pcie_pmu)) @@ -810,6 +809,7 @@ static int hisi_pcie_alloc_pmu(struct pci_dev *pdev, st= ruct hisi_pcie_pmu *pcie_ .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hisi_pcie_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisili= con/hisi_uncore_pmu.c index 0908ddd992b7..7718b031f671 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c @@ -191,7 +191,7 @@ int hisi_uncore_pmu_event_init(struct perf_event *event) * shared by all CPU cores in a CPU die(SCCL). Also we * do not support attach to a task(per-process mode) */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 /* @@ -546,6 +546,7 @@ void hisi_pmu_init(struct hisi_pmu *hisi_pmu, struct mo= dule *module) pmu->read =3D hisi_uncore_pmu_read; pmu->attr_groups =3D hisi_pmu->pmu_events.attr_groups; pmu->capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS; } EXPORT_SYMBOL_GPL(hisi_pmu_init); diff --git a/drivers/perf/hisilicon/hns3_pmu.c b/drivers/perf/hisilicon/hns= 3_pmu.c index 300345edd211..3d089df22c01 100644 --- a/drivers/perf/hisilicon/hns3_pmu.c +++ b/drivers/perf/hisilicon/hns3_pmu.c @@ -1236,8 +1236,7 @@ static int hns3_pmu_event_init(struct perf_event *eve= nt) int idx; int ret; =20 - /* Sampling is not supported */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EOPNOTSUPP; =20 event->cpu =3D hns3_pmu->on_cpu; @@ -1427,6 +1426,7 @@ static int hns3_pmu_alloc_pmu(struct pci_dev *pdev, s= truct hns3_pmu *hns3_pmu) .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hns3_pmu_attr_groups, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/marvell_cn10k_ddr_pmu.c b/drivers/perf/marvell_cn= 10k_ddr_pmu.c index baa0a3fbad31..bb16a193ff36 100644 --- a/drivers/perf/marvell_cn10k_ddr_pmu.c +++ b/drivers/perf/marvell_cn10k_ddr_pmu.c @@ -325,11 +325,6 @@ static int cn10k_ddr_perf_event_init(struct perf_event= *event) struct cn10k_ddr_pmu *pmu =3D to_cn10k_ddr_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - if (is_sampling_event(event)) { - dev_info(pmu->dev, "Sampling not supported!\n"); - return -EOPNOTSUPP; - } - if (event->cpu < 0) { dev_warn(pmu->dev, "Can't provide per-task data!\n"); return -EOPNOTSUPP; @@ -654,6 +649,7 @@ static int cn10k_ddr_perf_probe(struct platform_device = *pdev) ddr_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cn10k_attr_groups, diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c index 8b2617ad4bdc..3f7837632988 100644 --- a/drivers/perf/qcom_l2_pmu.c +++ b/drivers/perf/qcom_l2_pmu.c @@ -442,12 +442,6 @@ static int l2_cache_event_init(struct perf_event *even= t) struct perf_event *sibling; struct l2cache_pmu *l2cache_pmu =3D to_l2cache_pmu(event->pmu); =20 - if (hwc->sample_period) { - dev_dbg_ratelimited(&l2cache_pmu->pdev->dev, - "Sampling not supported\n"); - return -EOPNOTSUPP; - } - if (event->cpu < 0) { dev_dbg_ratelimited(&l2cache_pmu->pdev->dev, "Per-task mode not supported\n"); @@ -910,6 +904,7 @@ static int l2_cache_pmu_probe(struct platform_device *p= dev) .read =3D l2_cache_event_read, .attr_groups =3D l2_cache_pmu_attr_grps, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c index 72610777567d..54fde33802f4 100644 --- a/drivers/perf/qcom_l3_pmu.c +++ b/drivers/perf/qcom_l3_pmu.c @@ -480,12 +480,6 @@ static int qcom_l3_cache__event_init(struct perf_event= *event) struct l3cache_pmu *l3pmu =3D to_l3cache_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - /* - * Sampling not supported since these events are not core-attributable. - */ - if (hwc->sample_period) - return -EINVAL; - /* * Task mode not available, we run the counters as socket counters, * not attributable to any CPU and therefore cannot attribute per-task. @@ -755,6 +749,7 @@ static int qcom_l3_cache_pmu_probe(struct platform_devi= ce *pdev) =20 .attr_groups =3D qcom_l3_cache_pmu_attr_grps, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/thunderx2_pmu.c b/drivers/perf/thunderx2_pmu.c index 8c7a2c6113be..06b589799536 100644 --- a/drivers/perf/thunderx2_pmu.c +++ b/drivers/perf/thunderx2_pmu.c @@ -577,9 +577,8 @@ static int tx2_uncore_event_init(struct perf_event *eve= nt) /* * SOC PMU counters are shared across all cores. * Therefore, it does not support per-process mode. - * Also, it does not support event sampling mode. */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EINVAL; =20 if (event->cpu < 0) @@ -734,6 +733,7 @@ static int tx2_uncore_pmu_register( .stop =3D tx2_uncore_event_stop, .read =3D tx2_uncore_event_read, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c index 16bb3dfb1636..7f753b8f4e93 100644 --- a/drivers/perf/xgene_pmu.c +++ b/drivers/perf/xgene_pmu.c @@ -891,9 +891,8 @@ static int xgene_perf_event_init(struct perf_event *eve= nt) /* * SOC PMU counters are shared across all cores. * Therefore, it does not support per-process mode. - * Also, it does not support event sampling mode. */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + if (event->attach_state & PERF_ATTACH_TASK) return -EINVAL; =20 if (event->cpu < 0) @@ -1109,6 +1108,7 @@ static int xgene_init_perf(struct xgene_pmu_dev *pmu_= dev, char *name) .stop =3D xgene_perf_stop, .read =3D xgene_perf_read, .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | + PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_COMMON_EVENTS, }; =20 --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F279113A882; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8607615DB; Tue, 12 Mar 2024 10:35:16 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 551FD3F762; Tue, 12 Mar 2024 10:34:37 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 06/10] drivers/perf: Clean up redundant per-task checks Date: Tue, 12 Mar 2024 17:34:08 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" It turns out that a while back, perf_event_alloc() grew the ability to properly refuse all per-task and cgroup events on behalf of uncore/system PMUs using perf_invalid_context, so that's a whole load more inconsistent boilerplate which can also go from our drivers. This includes a couple more cases of drivers foolishly checking event->cpu *after* overriding it with their own (necessarily valid) CPU... Signed-off-by: Robin Murphy Reviewed-by: James Clark --- drivers/perf/alibaba_uncore_drw_pmu.c | 5 ----- drivers/perf/amlogic/meson_ddr_pmu_core.c | 6 ------ drivers/perf/arm-cci.c | 6 ------ drivers/perf/arm-ccn.c | 4 ---- drivers/perf/arm-cmn.c | 5 ----- drivers/perf/arm_cspmu/arm_cspmu.c | 10 ---------- drivers/perf/arm_dmc620_pmu.c | 12 ------------ drivers/perf/arm_dsu_pmu.c | 6 ------ drivers/perf/arm_smmuv3_pmu.c | 5 ----- drivers/perf/cxl_pmu.c | 2 -- drivers/perf/dwc_pcie_pmu.c | 4 ---- drivers/perf/fsl_imx8_ddr_perf.c | 8 -------- drivers/perf/fsl_imx9_ddr_perf.c | 8 -------- drivers/perf/hisilicon/hisi_pcie_pmu.c | 3 --- drivers/perf/hisilicon/hisi_uncore_pmu.c | 15 --------------- drivers/perf/hisilicon/hns3_pmu.c | 3 --- drivers/perf/marvell_cn10k_ddr_pmu.c | 5 ----- drivers/perf/qcom_l2_pmu.c | 6 ------ drivers/perf/qcom_l3_pmu.c | 7 ------- drivers/perf/thunderx2_pmu.c | 10 ---------- drivers/perf/xgene_pmu.c | 9 --------- 21 files changed, 139 deletions(-) diff --git a/drivers/perf/alibaba_uncore_drw_pmu.c b/drivers/perf/alibaba_u= ncore_drw_pmu.c index eadf4118d1ec..42172939721b 100644 --- a/drivers/perf/alibaba_uncore_drw_pmu.c +++ b/drivers/perf/alibaba_uncore_drw_pmu.c @@ -535,11 +535,6 @@ static int ali_drw_pmu_event_init(struct perf_event *e= vent) struct perf_event *sibling; struct device *dev =3D drw_pmu->pmu.dev; =20 - if (event->attach_state & PERF_ATTACH_TASK) { - dev_err(dev, "Per-task counter cannot allocate!\n"); - return -EOPNOTSUPP; - } - event->cpu =3D drw_pmu->irq->cpu; =20 if (event->group_leader !=3D event && diff --git a/drivers/perf/amlogic/meson_ddr_pmu_core.c b/drivers/perf/amlog= ic/meson_ddr_pmu_core.c index 3bc887cde163..6fcd37b11dd8 100644 --- a/drivers/perf/amlogic/meson_ddr_pmu_core.c +++ b/drivers/perf/amlogic/meson_ddr_pmu_core.c @@ -121,12 +121,6 @@ static int meson_ddr_perf_event_init(struct perf_event= *event) u64 config1 =3D event->attr.config1; u64 config2 =3D event->attr.config2; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - - if (event->cpu < 0) - return -EOPNOTSUPP; - /* check if the number of parameters is too much */ if (event->attr.config !=3D ALL_CHAN_COUNTER_ID && hweight64(config1) + hweight64(config2) > MAX_AXI_PORTS_OF_CHANNEL) diff --git a/drivers/perf/arm-cci.c b/drivers/perf/arm-cci.c index cf8fa2474bed..2ccce0e66ada 100644 --- a/drivers/perf/arm-cci.c +++ b/drivers/perf/arm-cci.c @@ -1312,10 +1312,6 @@ static int cci_pmu_event_init(struct perf_event *eve= nt) atomic_t *active_events =3D &cci_pmu->active_events; int err =3D 0; =20 - /* Shared by all CPUs, no meaningful state to sample */ - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - /* * Following the example set by other "uncore" PMUs, we accept any CPU * and rewrite its affinity dynamically rather than having perf core @@ -1325,8 +1321,6 @@ static int cci_pmu_event_init(struct perf_event *even= t) * the event being installed into its context, so the PMU's CPU can't * change under our feet. */ - if (event->cpu < 0) - return -EINVAL; event->cpu =3D cci_pmu->cpu; =20 event->destroy =3D hw_perf_event_destroy; diff --git a/drivers/perf/arm-ccn.c b/drivers/perf/arm-ccn.c index 4114349e62dd..2adb6a1d136f 100644 --- a/drivers/perf/arm-ccn.c +++ b/drivers/perf/arm-ccn.c @@ -720,10 +720,6 @@ static int arm_ccn_pmu_event_init(struct perf_event *e= vent) =20 ccn =3D pmu_to_arm_ccn(event->pmu); =20 - if (event->cpu < 0) { - dev_dbg(ccn->dev, "Can't provide per-task data!\n"); - return -EOPNOTSUPP; - } /* * Many perf core operations (eg. events rotation) operate on a * single CPU context. This is obvious for CPU PMUs, where one diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index e1f151f04c9f..26ede1db1f72 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -1696,12 +1696,7 @@ static int arm_cmn_event_init(struct perf_event *eve= nt) bool bynodeid; u16 nodeid, eventid; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - event->cpu =3D cmn->cpu; - if (event->cpu < 0) - return -EINVAL; =20 type =3D CMN_EVENT_TYPE(event); /* DTC events (i.e. cycles) already have everything they need */ diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/ar= m_cspmu.c index c5c7198e6921..b007e1fdd336 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -676,16 +676,6 @@ static int arm_cspmu_event_init(struct perf_event *eve= nt) =20 cspmu =3D to_arm_cspmu(event->pmu); =20 - /* - * Following other "uncore" PMUs, we do not support sampling mode or - * attach to a task (per-process mode). - */ - if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) { - dev_dbg(cspmu->pmu.dev, - "Can't support per-task counters\n"); - return -EINVAL; - } - /* * Make sure the CPU assignment is on one of the CPUs associated with * this PMU. diff --git a/drivers/perf/arm_dmc620_pmu.c b/drivers/perf/arm_dmc620_pmu.c index 47d3a166bccc..98e7c2333cc6 100644 --- a/drivers/perf/arm_dmc620_pmu.c +++ b/drivers/perf/arm_dmc620_pmu.c @@ -515,16 +515,6 @@ static int dmc620_pmu_event_init(struct perf_event *ev= ent) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - /* - * DMC 620 PMUs are shared across all cpus and cannot - * support task bound and sampling events. - */ - if (event->attach_state & PERF_ATTACH_TASK) { - dev_dbg(dmc620_pmu->pmu.dev, - "Can't support per-task counters\n"); - return -EOPNOTSUPP; - } - /* * Many perf core operations (eg. events rotation) operate on a * single CPU context. This is obvious for CPU PMUs, where one @@ -535,8 +525,6 @@ static int dmc620_pmu_event_init(struct perf_event *eve= nt) * processor. */ event->cpu =3D dmc620_pmu->irq->cpu; - if (event->cpu < 0) - return -EINVAL; =20 /* * We can't atomically disable all HW counters so only one event allowed, diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c index 3424d165795c..740f8c958976 100644 --- a/drivers/perf/arm_dsu_pmu.c +++ b/drivers/perf/arm_dsu_pmu.c @@ -544,12 +544,6 @@ static int dsu_pmu_event_init(struct perf_event *event) { struct dsu_pmu *dsu_pmu =3D to_dsu_pmu(event->pmu); =20 - /* We cannot support task bound events */ - if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) { - dev_dbg(dsu_pmu->pmu.dev, "Can't support per-task counters\n"); - return -EINVAL; - } - if (!cpumask_test_cpu(event->cpu, &dsu_pmu->associated_cpus)) { dev_dbg(dsu_pmu->pmu.dev, "Requested cpu is not associated with the DSU\n"); diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index 8206ba0c1637..f4e22ff179b9 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -401,11 +401,6 @@ static int smmu_pmu_event_init(struct perf_event *even= t) int group_num_events =3D 1; u16 event_id; =20 - if (event->cpu < 0) { - dev_dbg(dev, "Per-task mode not supported\n"); - return -EOPNOTSUPP; - } - /* Verify specified event is supported on this PMU */ event_id =3D get_event(event); if (event_id < SMMU_PMCG_ARCH_MAX_EVENTS && diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index 41afbbd221a9..e78f8db8ef52 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -571,8 +571,6 @@ static int cxl_pmu_event_init(struct perf_event *event) struct cxl_pmu_info *info =3D pmu_to_cxl_pmu_info(event->pmu); int rc; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; /* TODO: Validation of any filter */ =20 /* diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c index 638ad527f252..c2c4a7673e58 100644 --- a/drivers/perf/dwc_pcie_pmu.c +++ b/drivers/perf/dwc_pcie_pmu.c @@ -366,10 +366,6 @@ static int dwc_pcie_pmu_event_init(struct perf_event *= event) struct perf_event *sibling; u32 lane; =20 - /* We cannot support task bound events */ - if (event->cpu < 0 || event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - if (event->group_leader !=3D event && !is_software_event(event->group_leader)) return -EINVAL; diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_p= erf.c index 0070f2bd4d88..612216277ea5 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -398,14 +398,6 @@ static int ddr_perf_event_init(struct perf_event *even= t) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - - if (event->cpu < 0) { - dev_warn(pmu->dev, "Can't provide per-task data!\n"); - return -EOPNOTSUPP; - } - /* * We must NOT create groups containing mixed PMUs, although software * events are acceptable (for example to create a CCN group diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_p= erf.c index 83822abf8031..80b4703bef89 100644 --- a/drivers/perf/fsl_imx9_ddr_perf.c +++ b/drivers/perf/fsl_imx9_ddr_perf.c @@ -416,14 +416,6 @@ static int ddr_perf_event_init(struct perf_event *even= t) struct hw_perf_event *hwc =3D &event->hw; struct perf_event *sibling; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - - if (event->cpu < 0) { - dev_warn(pmu->dev, "Can't provide per-task data!\n"); - return -EOPNOTSUPP; - } - /* * We must NOT create groups containing mixed PMUs, although software * events are acceptable (for example to create a CCN group diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilico= n/hisi_pcie_pmu.c index 7579b93dc462..d37c65d40a30 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -358,9 +358,6 @@ static int hisi_pcie_pmu_event_init(struct perf_event *= event) else hwc->event_base =3D HISI_PCIE_CNT; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - if (!hisi_pcie_pmu_valid_filter(event, pcie_pmu)) return -EINVAL; =20 diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisili= con/hisi_uncore_pmu.c index 7718b031f671..5de53e76e42f 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c @@ -186,21 +186,6 @@ int hisi_uncore_pmu_event_init(struct perf_event *even= t) struct hw_perf_event *hwc =3D &event->hw; struct hisi_pmu *hisi_pmu; =20 - /* - * We do not support sampling as the counters are all - * shared by all CPU cores in a CPU die(SCCL). Also we - * do not support attach to a task(per-process mode) - */ - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - - /* - * The uncore counters not specific to any CPU, so cannot - * support per-task - */ - if (event->cpu < 0) - return -EINVAL; - /* * Validate if the events in group does not exceed the * available counters in hardware. diff --git a/drivers/perf/hisilicon/hns3_pmu.c b/drivers/perf/hisilicon/hns= 3_pmu.c index 3d089df22c01..09bf38e56909 100644 --- a/drivers/perf/hisilicon/hns3_pmu.c +++ b/drivers/perf/hisilicon/hns3_pmu.c @@ -1236,9 +1236,6 @@ static int hns3_pmu_event_init(struct perf_event *eve= nt) int idx; int ret; =20 - if (event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - event->cpu =3D hns3_pmu->on_cpu; =20 idx =3D hns3_pmu_get_event_idx(hns3_pmu); diff --git a/drivers/perf/marvell_cn10k_ddr_pmu.c b/drivers/perf/marvell_cn= 10k_ddr_pmu.c index bb16a193ff36..ebafa39a6b24 100644 --- a/drivers/perf/marvell_cn10k_ddr_pmu.c +++ b/drivers/perf/marvell_cn10k_ddr_pmu.c @@ -325,11 +325,6 @@ static int cn10k_ddr_perf_event_init(struct perf_event= *event) struct cn10k_ddr_pmu *pmu =3D to_cn10k_ddr_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - if (event->cpu < 0) { - dev_warn(pmu->dev, "Can't provide per-task data!\n"); - return -EOPNOTSUPP; - } - /* We must NOT create groups containing mixed PMUs */ if (event->group_leader->pmu !=3D event->pmu && !is_software_event(event->group_leader)) diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c index 3f7837632988..d85f11c9261f 100644 --- a/drivers/perf/qcom_l2_pmu.c +++ b/drivers/perf/qcom_l2_pmu.c @@ -442,12 +442,6 @@ static int l2_cache_event_init(struct perf_event *even= t) struct perf_event *sibling; struct l2cache_pmu *l2cache_pmu =3D to_l2cache_pmu(event->pmu); =20 - if (event->cpu < 0) { - dev_dbg_ratelimited(&l2cache_pmu->pdev->dev, - "Per-task mode not supported\n"); - return -EOPNOTSUPP; - } - if (((L2_EVT_GROUP(event->attr.config) > L2_EVT_GROUP_MAX) || ((event->attr.config & ~L2_EVT_MASK) !=3D 0)) && (event->attr.config !=3D L2CYCLE_CTR_RAW_CODE)) { diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c index 54fde33802f4..733067fa68e5 100644 --- a/drivers/perf/qcom_l3_pmu.c +++ b/drivers/perf/qcom_l3_pmu.c @@ -480,13 +480,6 @@ static int qcom_l3_cache__event_init(struct perf_event= *event) struct l3cache_pmu *l3pmu =3D to_l3cache_pmu(event->pmu); struct hw_perf_event *hwc =3D &event->hw; =20 - /* - * Task mode not available, we run the counters as socket counters, - * not attributable to any CPU and therefore cannot attribute per-task. - */ - if (event->cpu < 0) - return -EINVAL; - /* Validate the group */ if (!qcom_l3_cache__validate_event_group(event)) return -EINVAL; diff --git a/drivers/perf/thunderx2_pmu.c b/drivers/perf/thunderx2_pmu.c index 06b589799536..d9da3070f27c 100644 --- a/drivers/perf/thunderx2_pmu.c +++ b/drivers/perf/thunderx2_pmu.c @@ -574,16 +574,6 @@ static int tx2_uncore_event_init(struct perf_event *ev= ent) struct hw_perf_event *hwc =3D &event->hw; struct tx2_uncore_pmu *tx2_pmu; =20 - /* - * SOC PMU counters are shared across all cores. - * Therefore, it does not support per-process mode. - */ - if (event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - - if (event->cpu < 0) - return -EINVAL; - tx2_pmu =3D pmu_to_tx2_pmu(event->pmu); if (tx2_pmu->cpu >=3D nr_cpu_ids) return -EINVAL; diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c index 7f753b8f4e93..b2d855866354 100644 --- a/drivers/perf/xgene_pmu.c +++ b/drivers/perf/xgene_pmu.c @@ -888,15 +888,6 @@ static int xgene_perf_event_init(struct perf_event *ev= ent) struct hw_perf_event *hw =3D &event->hw; struct perf_event *sibling; =20 - /* - * SOC PMU counters are shared across all cores. - * Therefore, it does not support per-process mode. - */ - if (event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - - if (event->cpu < 0) - return -EINVAL; /* * Many perf core operations (eg. events rotation) operate on a * single CPU context. This is obvious for CPU PMUs, where one --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3495F13AA38; Tue, 12 Mar 2024 17:34:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264883; cv=none; b=lYCyDe8iZBX4TLjJsjX7jETfujluIdpW0qtakZ75nUNLs3ebDbedqCM5UZmAsn0UVr9ZPddSfGrUs+Oz9PdDEGOI6YZoUBq/js4vhaL6b4jYpo3OWNhZOurMyv5f6I58hOs3CV9RZK1ZqqktdZ6opqgkUdHz4PD1ZpyHfuOPhM4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264883; c=relaxed/simple; bh=d9eYuC/0QjnZWpRuO8xv/IzmP7HaTLBEEZ80UNZvfK0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=p7U/gsFAvEN9jMnTT1ZS9timStV0VGVqPSQ9QCxThpGoewcg3uLLisMWD41o8nlYJch5P19P+49ZjrYZ3fc7owzseWMaLE2NEMPmptdIIlMp5HS1LHxc454mGZEeiuy+MzelVFQVDF+fglUjLjE1jvlrg8AKAW1rY/dN2vj3AAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EEE1815BF; Tue, 12 Mar 2024 10:35:18 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B3A223F762; Tue, 12 Mar 2024 10:34:39 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 07/10] perf: Define common uncore capabilities Date: Tue, 12 Mar 2024 17:34:09 +0000 Message-Id: <8496411b6ae9306b70cb90edafa4134b113a3cfe.1710257512.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Nearly all uncore/system PMUs share a common set of capbilities, so let's wrap those up in a single macro for ease of use. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- include/linux/perf_event.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index b1fd832ed8bf..5d5db122005b 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -293,6 +293,9 @@ struct perf_event_pmu_context; #define PERF_PMU_CAP_EXTENDED_HW_TYPE 0x0100 #define PERF_PMU_CAP_NO_COMMON_EVENTS 0x0200 =20 +#define PERF_PMU_UNCORE_CAPS \ +(PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_COMMO= N_EVENTS) + struct perf_output_handle; =20 #define PMU_NULL_DEV ((void *)(~0UL)) --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DA99513B29B; Tue, 12 Mar 2024 17:34:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264886; cv=none; b=cRhn7kR973sxYbbqlGv9RXtt2hDxxM0/2a0faWvf8HJPW3PdJzZLTe42v16QhIWuj2vxAPm8268tysEbmSXyMNTtyeSeTz4cqOVc9Fv+azzm34W0cx2O0VrIe71U5TNEGCiqj6RoGL/Fw8wGCVV4SThKy7Wn3Fm8wmSnSv52afQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264886; c=relaxed/simple; bh=N2jXvmloCVFQbL6+Vb3DnGt/iNl7WwTUKjV6MPRxljA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=q0m9VVgZ/5srUFvmMAEQs/ki8LSOcUnCtT8xXpNKeoyZN1no/tgNxJF4PVTpoDyY892FkAqad0zICjT/nJHvHJqX/MJXmRWtyyfZKgLGqF3p/keTKj3nomPUYajZNaqioGTsMju2ZTOWzn0VrWrRST24AY3qT3TDKEMxjG9wJzY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 599381650; Tue, 12 Mar 2024 10:35:21 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 28AB03F762; Tue, 12 Mar 2024 10:34:42 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn Subject: [PATCH 08/10] drivers/perf: Use common uncore capabilities Date: Tue, 12 Mar 2024 17:34:10 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that we've ratified it, adopt PERF_PMU_UNCORE_CAPS. Signed-off-by: Robin Murphy Reviewed-by: James Clark --- drivers/perf/alibaba_uncore_drw_pmu.c | 4 +--- drivers/perf/amlogic/meson_ddr_pmu_core.c | 4 +--- drivers/perf/arm-cci.c | 4 +--- drivers/perf/arm-ccn.c | 4 +--- drivers/perf/arm-cmn.c | 4 +--- drivers/perf/arm_cspmu/arm_cspmu.c | 4 +--- drivers/perf/arm_dmc620_pmu.c | 4 +--- drivers/perf/arm_dsu_pmu.c | 4 +--- drivers/perf/arm_smmuv3_pmu.c | 4 +--- drivers/perf/cxl_pmu.c | 4 +--- drivers/perf/dwc_pcie_pmu.c | 4 +--- drivers/perf/fsl_imx8_ddr_perf.c | 4 +--- drivers/perf/fsl_imx9_ddr_perf.c | 4 +--- drivers/perf/hisilicon/hisi_pcie_pmu.c | 4 +--- drivers/perf/hisilicon/hisi_uncore_pmu.c | 4 +--- drivers/perf/hisilicon/hns3_pmu.c | 4 +--- drivers/perf/marvell_cn10k_ddr_pmu.c | 4 +--- drivers/perf/marvell_cn10k_tad_pmu.c | 4 +--- drivers/perf/qcom_l2_pmu.c | 4 +--- drivers/perf/qcom_l3_pmu.c | 4 +--- drivers/perf/thunderx2_pmu.c | 4 +--- drivers/perf/xgene_pmu.c | 4 +--- 22 files changed, 22 insertions(+), 66 deletions(-) diff --git a/drivers/perf/alibaba_uncore_drw_pmu.c b/drivers/perf/alibaba_u= ncore_drw_pmu.c index 42172939721b..9bacb79a86c4 100644 --- a/drivers/perf/alibaba_uncore_drw_pmu.c +++ b/drivers/perf/alibaba_uncore_drw_pmu.c @@ -696,9 +696,7 @@ static int ali_drw_pmu_probe(struct platform_device *pd= ev) .stop =3D ali_drw_pmu_stop, .read =3D ali_drw_pmu_read, .attr_groups =3D ali_drw_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 ret =3D perf_pmu_register(&drw_pmu->pmu, name, -1); diff --git a/drivers/perf/amlogic/meson_ddr_pmu_core.c b/drivers/perf/amlog= ic/meson_ddr_pmu_core.c index 6fcd37b11dd8..e6370ea08231 100644 --- a/drivers/perf/amlogic/meson_ddr_pmu_core.c +++ b/drivers/perf/amlogic/meson_ddr_pmu_core.c @@ -483,9 +483,7 @@ int meson_ddr_pmu_create(struct platform_device *pdev) *pmu =3D (struct ddr_pmu) { .pmu =3D { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D meson_ddr_perf_event_init, diff --git a/drivers/perf/arm-cci.c b/drivers/perf/arm-cci.c index 2ccce0e66ada..916e9881adf9 100644 --- a/drivers/perf/arm-cci.c +++ b/drivers/perf/arm-cci.c @@ -1407,9 +1407,7 @@ static int cci_pmu_init(struct cci_pmu *cci_pmu, stru= ct platform_device *pdev) .stop =3D cci_pmu_stop, .read =3D pmu_read, .attr_groups =3D pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 cci_pmu->plat_device =3D pdev; diff --git a/drivers/perf/arm-ccn.c b/drivers/perf/arm-ccn.c index 2adb6a1d136f..3f2f41ee476e 100644 --- a/drivers/perf/arm-ccn.c +++ b/drivers/perf/arm-ccn.c @@ -1257,9 +1257,7 @@ static int arm_ccn_pmu_init(struct arm_ccn *ccn) .read =3D arm_ccn_pmu_event_read, .pmu_enable =3D arm_ccn_pmu_enable, .pmu_disable =3D arm_ccn_pmu_disable, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 /* No overflow interrupt? Have to use a timer instead. */ diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index 26ede1db1f72..e779da94351a 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -2463,9 +2463,7 @@ static int arm_cmn_probe(struct platform_device *pdev) cmn->pmu =3D (struct pmu) { .module =3D THIS_MODULE, .attr_groups =3D arm_cmn_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .pmu_enable =3D arm_cmn_pmu_enable, .pmu_disable =3D arm_cmn_pmu_disable, diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/ar= m_cspmu.c index b007e1fdd336..2d9cb2ac0213 100644 --- a/drivers/perf/arm_cspmu/arm_cspmu.c +++ b/drivers/perf/arm_cspmu/arm_cspmu.c @@ -1179,9 +1179,7 @@ static int arm_cspmu_register_pmu(struct arm_cspmu *c= spmu) .stop =3D arm_cspmu_stop, .read =3D arm_cspmu_read, .attr_groups =3D (const struct attribute_group **)attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 /* Hardware counter init */ diff --git a/drivers/perf/arm_dmc620_pmu.c b/drivers/perf/arm_dmc620_pmu.c index 98e7c2333cc6..047bff8733c4 100644 --- a/drivers/perf/arm_dmc620_pmu.c +++ b/drivers/perf/arm_dmc620_pmu.c @@ -657,9 +657,7 @@ static int dmc620_pmu_device_probe(struct platform_devi= ce *pdev) =20 dmc620_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dmc620_pmu_event_init, .add =3D dmc620_pmu_add, diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c index 740f8c958976..8d97ef86f9a8 100644 --- a/drivers/perf/arm_dsu_pmu.c +++ b/drivers/perf/arm_dsu_pmu.c @@ -742,9 +742,7 @@ static int dsu_pmu_device_probe(struct platform_device = *pdev) .read =3D dsu_pmu_read, =20 .attr_groups =3D dsu_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 rc =3D perf_pmu_register(&dsu_pmu->pmu, name, -1); diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index f4e22ff179b9..34669d1314a4 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -857,9 +857,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) .stop =3D smmu_pmu_event_stop, .read =3D smmu_pmu_event_read, .attr_groups =3D smmu_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 smmu_pmu->reg_base =3D devm_platform_get_and_ioremap_resource(pdev, 0, &r= es_0); diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index e78f8db8ef52..8b7548192245 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -864,9 +864,7 @@ static int cxl_pmu_probe(struct device *dev) .read =3D cxl_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cxl_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 if (info->irq <=3D 0) diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c index c2c4a7673e58..bb8d77b470ce 100644 --- a/drivers/perf/dwc_pcie_pmu.c +++ b/drivers/perf/dwc_pcie_pmu.c @@ -625,9 +625,7 @@ static int dwc_pcie_pmu_probe(struct platform_device *p= lat_dev) .parent =3D &pdev->dev, .module =3D THIS_MODULE, .attr_groups =3D dwc_pcie_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .event_init =3D dwc_pcie_pmu_event_init, .add =3D dwc_pcie_pmu_event_add, diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_p= erf.c index 612216277ea5..1f250ff3075b 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -640,9 +640,7 @@ static int ddr_perf_init(struct ddr_pmu *pmu, void __io= mem *base, *pmu =3D (struct ddr_pmu) { .pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D ddr_perf_event_init, diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_p= erf.c index 80b4703bef89..a9156f17886b 100644 --- a/drivers/perf/fsl_imx9_ddr_perf.c +++ b/drivers/perf/fsl_imx9_ddr_perf.c @@ -517,9 +517,7 @@ static void ddr_perf_init(struct ddr_pmu *pmu, void __i= omem *base, *pmu =3D (struct ddr_pmu) { .pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D attr_groups, .event_init =3D ddr_perf_event_init, diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilico= n/hisi_pcie_pmu.c index d37c65d40a30..35f0407f4e10 100644 --- a/drivers/perf/hisilicon/hisi_pcie_pmu.c +++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c @@ -805,9 +805,7 @@ static int hisi_pcie_alloc_pmu(struct pci_dev *pdev, st= ruct hisi_pcie_pmu *pcie_ .read =3D hisi_pcie_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hisi_pcie_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 return 0; diff --git a/drivers/perf/hisilicon/hisi_uncore_pmu.c b/drivers/perf/hisili= con/hisi_uncore_pmu.c index 5de53e76e42f..25d1e704ea25 100644 --- a/drivers/perf/hisilicon/hisi_uncore_pmu.c +++ b/drivers/perf/hisilicon/hisi_uncore_pmu.c @@ -530,9 +530,7 @@ void hisi_pmu_init(struct hisi_pmu *hisi_pmu, struct mo= dule *module) pmu->stop =3D hisi_uncore_pmu_stop; pmu->read =3D hisi_uncore_pmu_read; pmu->attr_groups =3D hisi_pmu->pmu_events.attr_groups; - pmu->capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS; + pmu->capabilities =3D PERF_PMU_UNCORE_CAPS; } EXPORT_SYMBOL_GPL(hisi_pmu_init); =20 diff --git a/drivers/perf/hisilicon/hns3_pmu.c b/drivers/perf/hisilicon/hns= 3_pmu.c index 09bf38e56909..34b1ca3f0bb6 100644 --- a/drivers/perf/hisilicon/hns3_pmu.c +++ b/drivers/perf/hisilicon/hns3_pmu.c @@ -1422,9 +1422,7 @@ static int hns3_pmu_alloc_pmu(struct pci_dev *pdev, s= truct hns3_pmu *hns3_pmu) .read =3D hns3_pmu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D hns3_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 return 0; diff --git a/drivers/perf/marvell_cn10k_ddr_pmu.c b/drivers/perf/marvell_cn= 10k_ddr_pmu.c index ebafa39a6b24..ee69077a9320 100644 --- a/drivers/perf/marvell_cn10k_ddr_pmu.c +++ b/drivers/perf/marvell_cn10k_ddr_pmu.c @@ -643,9 +643,7 @@ static int cn10k_ddr_perf_probe(struct platform_device = *pdev) =20 ddr_pmu->pmu =3D (struct pmu) { .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D cn10k_attr_groups, .event_init =3D cn10k_ddr_perf_event_init, diff --git a/drivers/perf/marvell_cn10k_tad_pmu.c b/drivers/perf/marvell_cn= 10k_tad_pmu.c index aaedb5715d69..c83924a094dc 100644 --- a/drivers/perf/marvell_cn10k_tad_pmu.c +++ b/drivers/perf/marvell_cn10k_tad_pmu.c @@ -317,9 +317,7 @@ static int tad_pmu_probe(struct platform_device *pdev) =20 .module =3D THIS_MODULE, .attr_groups =3D tad_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .task_ctx_nr =3D perf_invalid_context, =20 .event_init =3D tad_pmu_event_init, diff --git a/drivers/perf/qcom_l2_pmu.c b/drivers/perf/qcom_l2_pmu.c index d85f11c9261f..67e69e0293aa 100644 --- a/drivers/perf/qcom_l2_pmu.c +++ b/drivers/perf/qcom_l2_pmu.c @@ -897,9 +897,7 @@ static int l2_cache_pmu_probe(struct platform_device *p= dev) .stop =3D l2_cache_event_stop, .read =3D l2_cache_event_read, .attr_groups =3D l2_cache_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 l2cache_pmu->num_counters =3D get_num_counters(); diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c index 733067fa68e5..f545c01aa671 100644 --- a/drivers/perf/qcom_l3_pmu.c +++ b/drivers/perf/qcom_l3_pmu.c @@ -741,9 +741,7 @@ static int qcom_l3_cache_pmu_probe(struct platform_devi= ce *pdev) .read =3D qcom_l3_cache__event_read, =20 .attr_groups =3D qcom_l3_cache_pmu_attr_grps, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 l3pmu->regs =3D devm_platform_get_and_ioremap_resource(pdev, 0, &memrc); diff --git a/drivers/perf/thunderx2_pmu.c b/drivers/perf/thunderx2_pmu.c index d9da3070f27c..c1e2372f57c5 100644 --- a/drivers/perf/thunderx2_pmu.c +++ b/drivers/perf/thunderx2_pmu.c @@ -722,9 +722,7 @@ static int tx2_uncore_pmu_register( .start =3D tx2_uncore_event_start, .stop =3D tx2_uncore_event_stop, .read =3D tx2_uncore_event_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 tx2_pmu->pmu.name =3D devm_kasprintf(dev, GFP_KERNEL, diff --git a/drivers/perf/xgene_pmu.c b/drivers/perf/xgene_pmu.c index b2d855866354..8cc6989857e8 100644 --- a/drivers/perf/xgene_pmu.c +++ b/drivers/perf/xgene_pmu.c @@ -1098,9 +1098,7 @@ static int xgene_init_perf(struct xgene_pmu_dev *pmu_= dev, char *name) .start =3D xgene_perf_start, .stop =3D xgene_perf_stop, .read =3D xgene_perf_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | - PERF_PMU_CAP_NO_SAMPLING | - PERF_PMU_CAP_NO_COMMON_EVENTS, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 /* Hardware counter init */ --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5AD8513B2B9; Tue, 12 Mar 2024 17:34:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710264889; cv=none; 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Tue, 12 Mar 2024 10:35:24 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 882003F762; Tue, 12 Mar 2024 10:34:44 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn, Thomas Gleixner , Borislav Petkov , Dave Hansen Subject: [PATCH 09/10] x86: Use common uncore PMU capabilities Date: Tue, 12 Mar 2024 17:34:11 +0000 Message-Id: <8a92d8b76ab0658919cd58515f68ed30c805e070.1710257512.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch the x86 uncore PMU drivers over to the new common capabilities, allowing to remove all the checks that perf core now takes care of. CC: Thomas Gleixner CC: Borislav Petkov CC: Dave Hansen Signed-off-by: Robin Murphy Reviewed-by: James Clark --- arch/x86/events/amd/iommu.c | 17 +---------------- arch/x86/events/amd/power.c | 10 +--------- arch/x86/events/amd/uncore.c | 12 +++--------- arch/x86/events/intel/cstate.c | 16 +++------------- arch/x86/events/intel/uncore.c | 11 +---------- arch/x86/events/intel/uncore_snb.c | 20 +++----------------- arch/x86/events/msr.c | 9 +-------- arch/x86/events/rapl.c | 9 +-------- 8 files changed, 14 insertions(+), 90 deletions(-) diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c index b15f7b950d2e..dd4cabb40865 100644 --- a/arch/x86/events/amd/iommu.c +++ b/arch/x86/events/amd/iommu.c @@ -207,21 +207,6 @@ static int perf_iommu_event_init(struct perf_event *ev= ent) { struct hw_perf_event *hwc =3D &event->hw; =20 - /* test the event attr type check for PMU enumeration */ - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - /* - * IOMMU counters are shared across all cores. - * Therefore, it does not support per-process mode. - * Also, it does not support event sampling mode. - */ - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - - if (event->cpu < 0) - return -EINVAL; - /* update the hw_perf_event struct with the iommu config data */ hwc->conf =3D event->attr.config; hwc->conf1 =3D event->attr.config1; @@ -412,7 +397,7 @@ static const struct pmu iommu_pmu __initconst =3D { .read =3D perf_iommu_read, .task_ctx_nr =3D perf_invalid_context, .attr_groups =3D amd_iommu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 static __init int init_one_iommu(unsigned int idx) diff --git a/arch/x86/events/amd/power.c b/arch/x86/events/amd/power.c index 37d5b380516e..d528517df93e 100644 --- a/arch/x86/events/amd/power.c +++ b/arch/x86/events/amd/power.c @@ -124,14 +124,6 @@ static int pmu_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config & AMD_POWER_EVENT_MASK; =20 - /* Only look at AMD power events. */ - if (event->attr.type !=3D pmu_class.type) - return -ENOENT; - - /* Unsupported modes and filters. */ - if (event->attr.sample_period) - return -EINVAL; - if (cfg !=3D AMD_POWER_EVENTSEL_PKG) return -EINVAL; =20 @@ -212,7 +204,7 @@ static struct pmu pmu_class =3D { .start =3D pmu_event_start, .stop =3D pmu_event_stop, .read =3D pmu_event_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 4220bf556962..6e97ee4ccf4d 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -209,12 +209,6 @@ static int amd_uncore_event_init(struct perf_event *ev= ent) struct amd_uncore_ctx *ctx; struct hw_perf_event *hwc =3D &event->hw; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - if (event->cpu < 0) - return -EINVAL; - pmu =3D event_to_amd_uncore_pmu(event); ctx =3D *per_cpu_ptr(pmu->ctx, event->cpu); if (!ctx) @@ -700,7 +694,7 @@ int amd_uncore_df_ctx_init(struct amd_uncore *uncore, u= nsigned int cpu) .start =3D amd_uncore_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 @@ -833,7 +827,7 @@ int amd_uncore_l3_ctx_init(struct amd_uncore *uncore, u= nsigned int cpu) .start =3D amd_uncore_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 @@ -958,7 +952,7 @@ int amd_uncore_umc_ctx_init(struct amd_uncore *uncore, = unsigned int cpu) .start =3D amd_uncore_umc_start, .stop =3D amd_uncore_stop, .read =3D amd_uncore_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_SAMPLING, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c index 3e4ab89d440c..58d6e5b483c5 100644 --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -319,16 +319,6 @@ static int cstate_pmu_event_init(struct perf_event *ev= ent) u64 cfg =3D event->attr.config; int cpu; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - /* unsupported modes and filters */ - if (event->attr.sample_period) /* no sampling */ - return -EINVAL; - - if (event->cpu < 0) - return -EINVAL; - if (event->pmu =3D=3D &cstate_core_pmu) { if (cfg >=3D PERF_CSTATE_CORE_EVENT_MAX) return -EINVAL; @@ -530,7 +520,7 @@ static struct pmu cstate_core_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 @@ -545,7 +535,7 @@ static struct pmu cstate_pkg_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_SAMPLING| PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 @@ -560,7 +550,7 @@ static struct pmu cstate_module_pmu =3D { .start =3D cstate_pmu_event_start, .stop =3D cstate_pmu_event_stop, .read =3D cstate_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .module =3D THIS_MODULE, }; =20 diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c index 7927c0b832fa..031d5aff297a 100644 --- a/arch/x86/events/intel/uncore.c +++ b/arch/x86/events/intel/uncore.c @@ -736,24 +736,15 @@ static int uncore_pmu_event_init(struct perf_event *e= vent) struct hw_perf_event *hwc =3D &event->hw; int ret; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - pmu =3D uncore_event_to_pmu(event); /* no device found for this pmu */ if (pmu->func_id < 0) return -ENOENT; =20 - /* Sampling not supported yet */ - if (hwc->sample_period) - return -EINVAL; - /* * Place all uncore events for a particular physical package * onto a single cpu */ - if (event->cpu < 0) - return -EINVAL; box =3D uncore_pmu_to_box(pmu, event->cpu); if (!box || box->cpu < 0) return -EINVAL; @@ -919,7 +910,7 @@ static int uncore_pmu_register(struct intel_uncore_pmu = *pmu) .stop =3D uncore_pmu_event_stop, .read =3D uncore_pmu_event_read, .module =3D THIS_MODULE, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .attr_update =3D pmu->type->attr_update, }; } else { diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/unc= ore_snb.c index 7fd4334e12a1..2af53e3f16c1 100644 --- a/arch/x86/events/intel/uncore_snb.c +++ b/arch/x86/events/intel/uncore_snb.c @@ -876,33 +876,19 @@ static int snb_uncore_imc_event_init(struct perf_even= t *event) u64 cfg =3D event->attr.config & SNB_UNCORE_PCI_IMC_EVENT_MASK; int idx, base; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - pmu =3D uncore_event_to_pmu(event); /* no device found for this pmu */ if (pmu->func_id < 0) return -ENOENT; =20 - /* Sampling not supported yet */ - if (hwc->sample_period) - return -EINVAL; - - /* unsupported modes and filters */ - if (event->attr.sample_period) /* no sampling */ + /* check only supported bits are set */ + if (event->attr.config & ~SNB_UNCORE_PCI_IMC_EVENT_MASK) return -EINVAL; =20 /* * Place all uncore events for a particular physical package * onto a single cpu */ - if (event->cpu < 0) - return -EINVAL; - - /* check only supported bits are set */ - if (event->attr.config & ~SNB_UNCORE_PCI_IMC_EVENT_MASK) - return -EINVAL; - box =3D uncore_pmu_to_box(pmu, event->cpu); if (!box || box->cpu < 0) return -EINVAL; @@ -1013,7 +999,7 @@ static struct pmu snb_uncore_imc_pmu =3D { .start =3D uncore_pmu_event_start, .stop =3D uncore_pmu_event_stop, .read =3D uncore_pmu_event_read, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 static struct intel_uncore_ops snb_uncore_imc_ops =3D { diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index b33c0931d61d..af8dd83aca48 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -204,13 +204,6 @@ static int msr_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - /* unsupported modes and filters */ - if (event->attr.sample_period) /* no sampling */ - return -EINVAL; - if (cfg >=3D PERF_MSR_EVENT_MAX) return -EINVAL; =20 @@ -296,7 +289,7 @@ static struct pmu pmu_msr =3D { .start =3D msr_event_start, .stop =3D msr_event_stop, .read =3D msr_event_update, - .capabilities =3D PERF_PMU_CAP_NO_SAMPLING | PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, .attr_update =3D attr_update, }; =20 diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 8d98d468b976..34b054970c3d 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -328,17 +328,10 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) int bit, ret =3D 0; struct rapl_pmu *pmu; =20 - /* only look at RAPL events */ - if (event->attr.type !=3D rapl_pmus->pmu.type) - return -ENOENT; - /* check only supported bits are set */ if (event->attr.config & ~RAPL_EVENT_MASK) return -EINVAL; =20 - if (event->cpu < 0) - return -EINVAL; - event->event_caps |=3D PERF_EV_CAP_READ_ACTIVE_PKG; =20 if (!cfg || cfg >=3D NR_RAPL_DOMAINS + 1) @@ -693,7 +686,7 @@ static int __init init_rapl_pmus(void) rapl_pmus->pmu.stop =3D rapl_pmu_event_stop; rapl_pmus->pmu.read =3D rapl_pmu_event_read; rapl_pmus->pmu.module =3D THIS_MODULE; - rapl_pmus->pmu.capabilities =3D PERF_PMU_CAP_NO_EXCLUDE; + rapl_pmus->pmu.capabilities =3D PERF_PMU_UNCORE_CAPS; return 0; } =20 --=20 2.39.2.101.g768bb238c484.dirty From nobody Tue Dec 16 04:35:47 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 21D6013C9C8; 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dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DB0D615BF; Tue, 12 Mar 2024 10:35:26 -0700 (PDT) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 4EB4D3F762; Tue, 12 Mar 2024 10:34:47 -0700 (PDT) From: Robin Murphy To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Will Deacon Cc: Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, linux-perf-users@vger.kernel.org, jialong.yang@shingroup.cn, Russell King , Shawn Guo , Sascha Hauer Subject: [PATCH 10/10] ARM: Use common uncore PMU capabilities Date: Tue, 12 Mar 2024 17:34:12 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch the ARM system PMU drivers over to the new common capabilities, allowing to remove all the checks that perf core now takes care of. CC: Russell King CC: Shawn Guo CC: Sascha Hauer Signed-off-by: Robin Murphy Acked-by: Shawn Guo Reviewed-by: James Clark --- arch/arm/mach-imx/mmdc.c | 16 +--------------- arch/arm/mm/cache-l2x0-pmu.c | 12 +----------- 2 files changed, 2 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c index 444a7eaa320c..806ab6675b37 100644 --- a/arch/arm/mach-imx/mmdc.c +++ b/arch/arm/mach-imx/mmdc.c @@ -280,20 +280,6 @@ static int mmdc_pmu_event_init(struct perf_event *even= t) struct mmdc_pmu *pmu_mmdc =3D to_mmdc_pmu(event->pmu); int cfg =3D event->attr.config; =20 - if (event->attr.type !=3D event->pmu->type) - return -ENOENT; - - if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) - return -EOPNOTSUPP; - - if (event->cpu < 0) { - dev_warn(pmu_mmdc->dev, "Can't provide per-task data!\n"); - return -EOPNOTSUPP; - } - - if (event->attr.sample_period) - return -EINVAL; - if (cfg < 0 || cfg >=3D MMDC_NUM_COUNTERS) return -EINVAL; =20 @@ -445,7 +431,7 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc, .start =3D mmdc_pmu_event_start, .stop =3D mmdc_pmu_event_stop, .read =3D mmdc_pmu_event_update, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }, .mmdc_base =3D mmdc_base, .dev =3D dev, diff --git a/arch/arm/mm/cache-l2x0-pmu.c b/arch/arm/mm/cache-l2x0-pmu.c index 993fefdc167a..a2567d953fdb 100644 --- a/arch/arm/mm/cache-l2x0-pmu.c +++ b/arch/arm/mm/cache-l2x0-pmu.c @@ -295,16 +295,6 @@ static int l2x0_pmu_event_init(struct perf_event *even= t) { struct hw_perf_event *hw =3D &event->hw; =20 - if (event->attr.type !=3D l2x0_pmu->type) - return -ENOENT; - - if (is_sampling_event(event) || - event->attach_state & PERF_ATTACH_TASK) - return -EINVAL; - - if (event->cpu < 0) - return -EINVAL; - if (event->attr.config & ~L2X0_EVENT_CNT_CFG_SRC_MASK) return -EINVAL; =20 @@ -524,7 +514,7 @@ static __init int l2x0_pmu_init(void) .del =3D l2x0_pmu_event_del, .event_init =3D l2x0_pmu_event_init, .attr_groups =3D l2x0_pmu_attr_groups, - .capabilities =3D PERF_PMU_CAP_NO_EXCLUDE, + .capabilities =3D PERF_PMU_UNCORE_CAPS, }; =20 l2x0_pmu_reset(); --=20 2.39.2.101.g768bb238c484.dirty