From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26ECFC4167B for ; Tue, 5 Dec 2023 10:13:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344949AbjLEKMy (ORCPT ); Tue, 5 Dec 2023 05:12:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344948AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 652FB182; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id CF91B1C01B1; Tue, 5 Dec 2023 18:46:02 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 01/37] sh: passing FDT address to kernel startup. Date: Tue, 5 Dec 2023 18:45:20 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" R4 is caller saved in SH ABI. Save it so it doesn't get corrupted until it's needed for initialization. Signed-off-by: Yoshinori Sato --- arch/sh/boot/compressed/head_32.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/he= ad_32.S index 7bb168133dbb..6be59851122e 100644 --- a/arch/sh/boot/compressed/head_32.S +++ b/arch/sh/boot/compressed/head_32.S @@ -15,7 +15,8 @@ startup: /* Load initial status register */ mov.l init_sr, r1 ldc r1, sr - + /* Save FDT address */ + mov r4, r13 /* Move myself to proper location if necessary */ mova 1f, r0 mov.l 1f, r2 @@ -84,7 +85,7 @@ l1: /* Jump to the start of the decompressed kernel */ mov.l kernel_start_addr, r0 jmp @r0 - nop + mov r13, r4 =09 .align 2 bss_start_addr: --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CB38C4167B for ; Tue, 5 Dec 2023 10:12:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235084AbjLEKMt (ORCPT ); Tue, 5 Dec 2023 05:12:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344955AbjLEJzb (ORCPT ); Tue, 5 Dec 2023 04:55:31 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 76C67185; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id CA6E91C0322; Tue, 5 Dec 2023 18:46:04 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 02/37] sh: Kconfig unified OF supported targets. Date: Tue, 5 Dec 2023 18:45:21 +0900 Message-Id: <418cf6f790ac5c3f4615de36f3fa4ead558e9138.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Targets that support OF should be treated as one board. Signed-off-by: Yoshinori Sato --- arch/sh/boards/Kconfig | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 109bec4dad94..e7e52779ef62 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -19,16 +19,9 @@ config SH_DEVICE_TREE select TIMER_OF select COMMON_CLK select GENERIC_CALIBRATE_DELAY - -config SH_JCORE_SOC - bool "J-Core SoC" - select SH_DEVICE_TREE - select CLKSRC_JCORE_PIT - select JCORE_AIC - depends on CPU_J2 - help - Select this option to include drivers core components of the - J-Core SoC, including interrupt controllers and timers. + select GENERIC_IRQ_CHIP + select SYS_SUPPORTS_PCI + select GENERIC_PCI_IOMAP if PCI =20 config SH_SOLUTION_ENGINE bool "SolutionEngine" @@ -293,6 +286,7 @@ config SH_LANDISK bool "LANDISK" depends on CPU_SUBTYPE_SH7751R select HAVE_PCI + select SYS_SUPPORTS_PCI help I-O DATA DEVICE, INC. "LANDISK Series" support. =20 @@ -369,6 +363,16 @@ config SH_APSH4AD0A help Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A. =20 +config SH_OF_BOARD + bool "General Open Firmware boards" + select SH_DEVICE_TREE + select CLKSRC_JCORE_PIT if CPU_J2 + select JCORE_AIC if CPU_J2 + select HAVE_PCI if CPU_SUBTYPE_SH7751R + help + This board means general OF supported targets. + + source "arch/sh/boards/mach-r2d/Kconfig" source "arch/sh/boards/mach-highlander/Kconfig" source "arch/sh/boards/mach-sdk7780/Kconfig" --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23703C4167B for ; Tue, 5 Dec 2023 10:13:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346507AbjLEKNB (ORCPT ); Tue, 5 Dec 2023 05:13:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344956AbjLEJzb (ORCPT ); Tue, 5 Dec 2023 04:55:31 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 79474186; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id CC23D1C0465; Tue, 5 Dec 2023 18:46:06 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 03/37] sh: Enable OF support for build and configuration. Date: Tue, 5 Dec 2023 18:45:22 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" IRQ, CLK and PCI will be migrated to a common driver framework. So if OF, disable the SH specific drivers. Signed-off-by: Yoshinori Sato --- arch/sh/Kconfig | 11 ++++++----- arch/sh/drivers/Makefile | 2 ++ arch/sh/kernel/cpu/Makefile | 9 +++++++-- arch/sh/kernel/cpu/sh4/Makefile | 3 +++ 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 7500521b2b98..63961d273af7 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -65,10 +65,10 @@ config SUPERH select MODULES_USE_ELF_RELA select NEED_SG_DMA_LENGTH select NO_DMA if !MMU && !DMA_COHERENT - select NO_GENERIC_PCI_IOPORT_MAP if PCI + select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE select OLD_SIGACTION select OLD_SIGSUSPEND - select PCI_DOMAINS if PCI + select PCI_DOMAINS if PCI && !SH_DEVICE_TREE select PERF_EVENTS select PERF_USE_VMALLOC select RTC_LIB @@ -152,7 +152,7 @@ menu "System type" # config CPU_SH2 bool - select SH_INTC + select SH_INTC if !SH_DEVICE_TREE =20 config CPU_SH2A bool @@ -178,7 +178,7 @@ config CPU_SH4 select CPU_HAS_INTEVT select CPU_HAS_SR_RB select CPU_HAS_FPU if !CPU_SH4AL_DSP - select SH_INTC + select SH_INTC if !SH_DEVICE_TREE select SYS_SUPPORTS_SH_TMU =20 config CPU_SH4A @@ -521,6 +521,7 @@ config SH_PCLK_FREQ =20 config SH_CLK_CPG def_bool y + depends on !COMMON_CLK =20 config SH_CLK_CPG_LEGACY depends on SH_CLK_CPG @@ -665,7 +666,7 @@ config BUILTIN_DTB_SOURCE kernel. =20 config ZERO_PAGE_OFFSET - hex + hex "Zero page offset" default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ SH_7751_SOLUTION_ENGINE default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile index 8bd10b904bf9..83f609ca1eb4 100644 --- a/arch/sh/drivers/Makefile +++ b/arch/sh/drivers/Makefile @@ -5,6 +5,8 @@ =20 obj-y +=3D dma/ platform_early.o =20 +ifndef CONFIG_SH_DEVICE_TREE obj-$(CONFIG_PCI) +=3D pci/ +endif obj-$(CONFIG_PUSH_SWITCH) +=3D push-switch.o obj-$(CONFIG_HEARTBEAT) +=3D heartbeat.o diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index 46118236bf04..e00ebf134985 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE) +=3D shmobile/ # Common interfaces. =20 obj-$(CONFIG_SH_ADC) +=3D adc.o +ifndef CONFIG_COMMON_CLK +obj-y +=3D clock.o obj-$(CONFIG_SH_CLK_CPG_LEGACY) +=3D clock-cpg.o - -obj-y +=3D irq/ init.o clock.o fpu.o pfc.o proc.o +endif +ifndef CONFIG_GENERIC_IRQ_CHIP +obj-y +=3D irq/ +endif +obj-y +=3D init.o fpu.o pfc.o proc.o diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makef= ile index 02e3ee16e15c..33da4c86feff 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) :=3D perf_event.o perf-$(CONFIG_CPU_SUBTYPE_SH7750S) :=3D perf_event.o perf-$(CONFIG_CPU_SUBTYPE_SH7091) :=3D perf_event.o =20 +ifndef CONFIG_SH_DEVICE_TREE # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7750) +=3D setup-sh7750.o obj-$(CONFIG_CPU_SUBTYPE_SH7750R) +=3D setup-sh7750.o @@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A clock-$(CONFIG_CPU_SH4) :=3D clock-sh4.o endif =20 +endif # CONFIG_SH_DEVICE_TREE + obj-y +=3D $(clock-y) obj-$(CONFIG_PERF_EVENTS) +=3D $(perf-y) --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB406C4167B for ; Tue, 5 Dec 2023 09:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346694AbjLEJzv (ORCPT ); Tue, 5 Dec 2023 04:55:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235005AbjLEJz1 (ORCPT ); Tue, 5 Dec 2023 04:55:27 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DA836A9; Tue, 5 Dec 2023 01:55:33 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id EA7A91C0497; Tue, 5 Dec 2023 18:46:08 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 04/37] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC. Date: Tue, 5 Dec 2023 18:45:23 +0900 Message-Id: <7b00e02e77d8c9fec4f5ecb5176e28837c87b062.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 Interrupt controller priority register define. Signed-off-by: Yoshinori Sato --- .../interrupt-controller/sh7751-intc.h | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/sh7751-intc.h diff --git a/include/dt-bindings/interrupt-controller/sh7751-intc.h b/inclu= de/dt-bindings/interrupt-controller/sh7751-intc.h new file mode 100644 index 000000000000..5783ec72d70f --- /dev/null +++ b/include/dt-bindings/interrupt-controller/sh7751-intc.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * SH3/4 INTC EVT - IRQ conversion + */ + +#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC +#define __DT_BINDINGS_RENESAS_SH7751_INTC + +#define evt2irq(evt) ((evt) >> 5) + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0 + +#endif --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACDA7C07E97 for ; Tue, 5 Dec 2023 09:56:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346448AbjLEJzl (ORCPT ); Tue, 5 Dec 2023 04:55:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231929AbjLEJz1 (ORCPT ); Tue, 5 Dec 2023 04:55:27 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 502FDAB; Tue, 5 Dec 2023 01:55:32 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 1C5C71C04DB; Tue, 5 Dec 2023 18:46:11 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 05/37] sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y Date: Tue, 5 Dec 2023 18:45:24 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove unused function prototype. Add helper update_sr_imask. use for SH7751 irq driver. Add stub intc_finalize. Signed-off-by: Yoshinori Sato --- arch/sh/include/asm/irq.h | 10 ++++++++-- arch/sh/kernel/cpu/Makefile | 5 +---- arch/sh/kernel/cpu/irq/imask.c | 17 +++++++++++++++++ include/linux/sh_intc.h | 7 ++++++- 4 files changed, 32 insertions(+), 7 deletions(-) diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index 0f384b1f45ca..c3e3db793dba 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -16,8 +16,8 @@ /* * Simple Mask Register Support */ -extern void make_maskreg_irq(unsigned int irq); -extern unsigned short *irq_mask_register; + +void update_sr_imask(unsigned int irq, unsigned int enable); =20 /* * PINT IRQs @@ -54,4 +54,10 @@ extern void irq_finish(unsigned int irq); =20 #include =20 +/* SH3/4 INTC stuff */ +/* IRL level 0 - 15 */ +#define NR_IRL 15 +/* IRL0 -> IRQ16 */ +#define IRL_BASE_IRQ 16 + #endif /* __ASM_SH_IRQ_H */ diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index e00ebf134985..ad12807fae9c 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -20,7 +20,4 @@ ifndef CONFIG_COMMON_CLK obj-y +=3D clock.o obj-$(CONFIG_SH_CLK_CPG_LEGACY) +=3D clock-cpg.o endif -ifndef CONFIG_GENERIC_IRQ_CHIP -obj-y +=3D irq/ -endif -obj-y +=3D init.o fpu.o pfc.o proc.o +obj-y +=3D init.o fpu.o pfc.o proc.o irq/ diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c index 572585c3f2fd..d9a703715228 100644 --- a/arch/sh/kernel/cpu/irq/imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c @@ -51,6 +51,7 @@ static inline void set_interrupt_registers(int ip) : "t"); } =20 +#ifndef CONFIG_GENERIC_IRQ_CHIP static void mask_imask_irq(struct irq_data *data) { unsigned int irq =3D data->irq; @@ -83,3 +84,19 @@ void make_imask_irq(unsigned int irq) irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq, "level"); } +#else +void update_sr_imask(unsigned int irq, unsigned int enable) +{ + if (enable) { + set_bit(irq, imask_mask); + interrupt_priority =3D IMASK_PRIORITY - + find_first_bit(imask_mask, IMASK_PRIORITY); + } else { + clear_bit(irq, imask_mask); + if (interrupt_priority < IMASK_PRIORITY - irq) + interrupt_priority =3D IMASK_PRIORITY - irq; + } + set_interrupt_registers(interrupt_priority); +} +EXPORT_SYMBOL(update_sr_imask); +#endif diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h index 27ae79191bdc..994b5b05a0d7 100644 --- a/include/linux/sh_intc.h +++ b/include/linux/sh_intc.h @@ -139,8 +139,13 @@ struct intc_desc symbol __initdata =3D { \ int register_intc_controller(struct intc_desc *desc); int intc_set_priority(unsigned int irq, unsigned int prio); int intc_irq_lookup(const char *chipname, intc_enum enum_id); +#ifndef CONFIG_SH_DEVICE_TREE void intc_finalize(void); - +#else +static inline void intc_finalize(void) +{ +} +#endif #ifdef CONFIG_INTC_USERIMASK int register_intc_userimask(unsigned long addr); #else --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5909AC46CA3 for ; Tue, 5 Dec 2023 09:55:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344983AbjLEJzb (ORCPT ); Tue, 5 Dec 2023 04:55:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbjLEJz0 (ORCPT ); Tue, 5 Dec 2023 04:55:26 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 502A1AA; Tue, 5 Dec 2023 01:55:32 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 164F21C04FD; Tue, 5 Dec 2023 18:46:13 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 06/37] sh: kernel/setup Update DT support. Date: Tue, 5 Dec 2023 18:45:25 +0900 Message-Id: <76bbd45b22ef6cc1fa69369aff908c9c4e366860.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix extrnal fdt initialize and bootargs. Signed-off-by: Yoshinori Sato --- arch/sh/kernel/setup.c | 51 ++++++++++++++++++++++++++++-------------- 1 file changed, 34 insertions(+), 17 deletions(-) diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 3d80515298d2..b299abff68e0 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -74,7 +75,13 @@ extern int root_mountflags; #define RAMDISK_PROMPT_FLAG 0x8000 #define RAMDISK_LOAD_FLAG 0x4000 =20 +#if defined(CONFIG_OF) && !defined(CONFIG_USE_BUILTIN_DTB) +#define CHOSEN_BOOTARGS +#endif + +#ifndef CHOSEN_BOOTARGS static char __initdata command_line[COMMAND_LINE_SIZE] =3D { 0, }; +#endif =20 static struct resource code_resource =3D { .name =3D "Kernel code", @@ -244,18 +251,18 @@ void __init __weak plat_early_device_setup(void) void __ref sh_fdt_init(phys_addr_t dt_phys) { static int done =3D 0; - void *dt_virt; + void *fdt; =20 /* Avoid calling an __init function on secondary cpus. */ if (done) return; =20 #ifdef CONFIG_USE_BUILTIN_DTB - dt_virt =3D __dtb_start; + fdt =3D __dtb_start; #else - dt_virt =3D phys_to_virt(dt_phys); + fdt =3D phys_to_virt(dt_phys); #endif =20 - if (!dt_virt || !early_init_dt_scan(dt_virt)) { + if (!fdt || !early_init_dt_scan(fdt)) { pr_crit("Error: invalid device tree blob" " at physical address %p\n", (void *)dt_phys); =20 @@ -269,8 +276,20 @@ void __ref sh_fdt_init(phys_addr_t dt_phys) =20 void __init setup_arch(char **cmdline_p) { +#ifdef CONFIG_OF_EARLY_FLATTREE + if (IS_ENABLED(CONFIG_USE_BUILTIN_DTB)) { + /* Relocate Embedded DTB */ + unflatten_and_copy_device_tree(); + } else if (initial_boot_params) { + /* Reserve external DTB area */ + memblock_reserve(__pa(initial_boot_params), + fdt_totalsize(initial_boot_params)); + unflatten_device_tree(); + } +#endif enable_mmu(); =20 +#ifndef CONFIG_OF ROOT_DEV =3D old_decode_dev(ORIG_ROOT_DEV); =20 printk(KERN_NOTICE "Boot params:\n" @@ -299,19 +318,25 @@ void __init setup_arch(char **cmdline_p) bss_resource.start =3D virt_to_phys(__bss_start); bss_resource.end =3D virt_to_phys(__bss_stop)-1; =20 -#ifdef CONFIG_CMDLINE_OVERWRITE - strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); -#else +#endif + +#ifndef CHOSEN_BOOTARGS +#ifndef CONFIG_CMDLINE_OVERWRITE strscpy(command_line, COMMAND_LINE, sizeof(command_line)); #ifdef CONFIG_CMDLINE_EXTEND strlcat(command_line, " ", sizeof(command_line)); strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); #endif -#endif - +#else /* !CONFIG_CMDLINE_OVERWRITE*/ + strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); +#endif /* CONFIG_CMDLINE_OVERWRITE */ /* Save unparsed command line copy for /proc/cmdline */ memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); *cmdline_p =3D command_line; +#else /* CHOSEN_BOOTARGS */ + /* Use "/chosen/bootargs" specified in devicetree. */ + *cmdline_p =3D boot_command_line; +#endif =20 parse_early_param(); =20 @@ -322,14 +347,6 @@ void __init setup_arch(char **cmdline_p) /* Let earlyprintk output early console messages */ sh_early_platform_driver_probe("earlyprintk", 1, 1); =20 -#ifdef CONFIG_OF_EARLY_FLATTREE -#ifdef CONFIG_USE_BUILTIN_DTB - unflatten_and_copy_device_tree(); -#else - unflatten_device_tree(); -#endif -#endif - paging_init(); =20 /* Perform the machine specific initialisation */ --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41516C4167B for ; Tue, 5 Dec 2023 09:55:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346386AbjLEJzg (ORCPT ); Tue, 5 Dec 2023 04:55:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231772AbjLEJz0 (ORCPT ); Tue, 5 Dec 2023 04:55:26 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4FDC1A7; Tue, 5 Dec 2023 01:55:32 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 153D61C050D; Tue, 5 Dec 2023 18:46:15 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 07/37] sh: Fix COMMON_CLK support in CONFIG_OF=y. Date: Tue, 5 Dec 2023 18:45:26 +0900 Message-Id: <2bf3ae9e8b48d86acc771656ed7eb6a0ee9613ea.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Initialize the clock and timer using the COMMON_CLK procedure. sh's earlytimer mechanism doesn't work properly in OF, so timer initialization is delayed. If CONFIG_OF=3Dy, perform the general timer initialization procedure. Signed-off-by: Yoshinori Sato --- arch/sh/boards/of-generic.c | 28 ++++------------------------ arch/sh/kernel/time.c | 12 ++++++++++++ 2 files changed, 16 insertions(+), 24 deletions(-) diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c index f7f3e618e85b..f1ca5a914c11 100644 --- a/arch/sh/boards/of-generic.c +++ b/arch/sh/boards/of-generic.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -98,16 +99,7 @@ static void sh_of_smp_probe(void) =20 #endif =20 -static void noop(void) -{ -} - -static int noopi(void) -{ - return 0; -} - -static void __init sh_of_mem_reserve(void) +static void __init sh_of_mem_init(void) { early_init_fdt_reserve_self(); early_init_fdt_scan_reserved_mem(); @@ -140,25 +132,13 @@ static void __init sh_of_init_irq(void) irqchip_init(); } =20 -static int __init sh_of_clk_init(void) -{ -#ifdef CONFIG_COMMON_CLK - /* Disabled pending move to COMMON_CLK framework. */ - pr_info("SH generic board support: scanning for clk providers\n"); - of_clk_init(NULL); -#endif - return 0; -} - static struct sh_machine_vector __initmv sh_of_generic_mv =3D { .mv_setup =3D sh_of_setup, .mv_name =3D "devicetree", /* replaced by DT root's model */ .mv_irq_demux =3D sh_of_irq_demux, .mv_init_irq =3D sh_of_init_irq, - .mv_clk_init =3D sh_of_clk_init, - .mv_mode_pins =3D noopi, - .mv_mem_init =3D noop, - .mv_mem_reserve =3D sh_of_mem_reserve, + .mv_mode_pins =3D generic_mode_pins, + .mv_mem_init =3D sh_of_mem_init, }; =20 struct sh_clk_ops; diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 821a09cbd605..ce5b7c2f8628 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -19,7 +19,9 @@ #include #include #include +#include =20 +#ifndef CONFIG_SH_DEVICE_TREE static void __init sh_late_time_init(void) { /* @@ -43,3 +45,13 @@ void __init time_init(void) =20 late_time_init =3D sh_late_time_init; } +#else +/* CONFIG_SH_DEVICE_TREE */ +void __init time_init(void) +{ + pr_info("SH generic board support: scanning for clk providers\n"); + + of_clk_init(NULL); + timer_probe(); +} +#endif --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDA38C46CA0 for ; Tue, 5 Dec 2023 10:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346592AbjLEJ4R (ORCPT ); Tue, 5 Dec 2023 04:56:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E5413120; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 4097D1C051F; Tue, 5 Dec 2023 18:46:17 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 08/37] clocksource: sh_tmu: CLOCKSOURCE support. Date: Tue, 5 Dec 2023 18:45:27 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Allows initialization as CLOCKSOURCE. Signed-off-by: Yoshinori Sato --- drivers/clocksource/sh_tmu.c | 161 +++++++++++++++++++++++------------ 1 file changed, 106 insertions(+), 55 deletions(-) diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index beffff81c00f..e4ae83c9f7d4 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include #include @@ -65,6 +67,7 @@ struct sh_tmu_device { =20 bool has_clockevent; bool has_clocksource; + const char *name; }; =20 #define TSTR -1 /* shared register */ @@ -148,8 +151,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch) /* enable clock */ ret =3D clk_enable(ch->tmu->clk); if (ret) { - dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", - ch->index); + pr_err("%s ch%u: cannot enable clock\n", + ch->tmu->name, ch->index); return ret; } =20 @@ -174,9 +177,10 @@ static int sh_tmu_enable(struct sh_tmu_channel *ch) if (ch->enable_count++ > 0) return 0; =20 - pm_runtime_get_sync(&ch->tmu->pdev->dev); - dev_pm_syscore_device(&ch->tmu->pdev->dev, true); - + if (ch->tmu->pdev) { + pm_runtime_get_sync(&ch->tmu->pdev->dev); + dev_pm_syscore_device(&ch->tmu->pdev->dev, true); + } return __sh_tmu_enable(ch); } =20 @@ -202,8 +206,10 @@ static void sh_tmu_disable(struct sh_tmu_channel *ch) =20 __sh_tmu_disable(ch); =20 - dev_pm_syscore_device(&ch->tmu->pdev->dev, false); - pm_runtime_put(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) { + dev_pm_syscore_device(&ch->tmu->pdev->dev, false); + pm_runtime_put(&ch->tmu->pdev->dev); + } } =20 static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, @@ -245,7 +251,7 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_= id) return IRQ_HANDLED; } =20 -static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) +static inline struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) { return container_of(cs, struct sh_tmu_channel, cs); } @@ -292,7 +298,8 @@ static void sh_tmu_clocksource_suspend(struct clocksour= ce *cs) =20 if (--ch->enable_count =3D=3D 0) { __sh_tmu_disable(ch); - dev_pm_genpd_suspend(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) + dev_pm_genpd_suspend(&ch->tmu->pdev->dev); } } =20 @@ -304,7 +311,8 @@ static void sh_tmu_clocksource_resume(struct clocksourc= e *cs) return; =20 if (ch->enable_count++ =3D=3D 0) { - dev_pm_genpd_resume(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) + dev_pm_genpd_resume(&ch->tmu->pdev->dev); __sh_tmu_enable(ch); } } @@ -324,14 +332,14 @@ static int sh_tmu_register_clocksource(struct sh_tmu_= channel *ch, cs->mask =3D CLOCKSOURCE_MASK(32); cs->flags =3D CLOCK_SOURCE_IS_CONTINUOUS; =20 - dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", - ch->index); + pr_info("%s ch%u: used as clock source\n", + ch->tmu->name, ch->index); =20 clocksource_register_hz(cs, ch->tmu->rate); return 0; } =20 -static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) +static inline struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_devi= ce *ced) { return container_of(ced, struct sh_tmu_channel, ced); } @@ -364,8 +372,8 @@ static int sh_tmu_clock_event_set_state(struct clock_ev= ent_device *ced, if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced)) sh_tmu_disable(ch); =20 - dev_info(&ch->tmu->pdev->dev, "ch%u: used for %s clock events\n", - ch->index, periodic ? "periodic" : "oneshot"); + pr_info("%s ch%u: used for %s clock events\n", + ch->tmu->name, ch->index, periodic ? "periodic" : "oneshot"); sh_tmu_clock_event_start(ch, periodic); return 0; } @@ -403,7 +411,8 @@ static void sh_tmu_clock_event_resume(struct clock_even= t_device *ced) } =20 static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, - const char *name) + const char *name, + struct device_node *np) { struct clock_event_device *ced =3D &ch->ced; int ret; @@ -417,30 +426,32 @@ static void sh_tmu_register_clockevent(struct sh_tmu_= channel *ch, ced->set_state_shutdown =3D sh_tmu_clock_event_shutdown; ced->set_state_periodic =3D sh_tmu_clock_event_set_periodic; ced->set_state_oneshot =3D sh_tmu_clock_event_set_oneshot; - ced->suspend =3D sh_tmu_clock_event_suspend; - ced->resume =3D sh_tmu_clock_event_resume; - - dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", - ch->index); + if (ch->tmu->pdev) { + ced->suspend =3D sh_tmu_clock_event_suspend; + ced->resume =3D sh_tmu_clock_event_resume; + } + pr_info("%s ch%u: used for clock events\n", + ch->tmu->name, ch->index); =20 clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff); =20 ret =3D request_irq(ch->irq, sh_tmu_interrupt, IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, - dev_name(&ch->tmu->pdev->dev), ch); + ch->tmu->name, ch); if (ret) { - dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", - ch->index, ch->irq); + pr_err("%s ch%u: failed to request irq %d\n", + ch->tmu->name, ch->index, ch->irq); return; } } =20 static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name, + struct device_node *np, bool clockevent, bool clocksource) { if (clockevent) { ch->tmu->has_clockevent =3D true; - sh_tmu_register_clockevent(ch, name); + sh_tmu_register_clockevent(ch, name, np); } else if (clocksource) { ch->tmu->has_clocksource =3D true; sh_tmu_register_clocksource(ch, name); @@ -451,7 +462,8 @@ static int sh_tmu_register(struct sh_tmu_channel *ch, c= onst char *name, =20 static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int in= dex, bool clockevent, bool clocksource, - struct sh_tmu_device *tmu) + struct sh_tmu_device *tmu, + struct device_node *np) { /* Skip unused channels. */ if (!clockevent && !clocksource) @@ -465,53 +477,59 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel= *ch, unsigned int index, else ch->base =3D tmu->mapbase + 8 + ch->index * 12; =20 - ch->irq =3D platform_get_irq(tmu->pdev, index); + if (tmu->pdev) + ch->irq =3D platform_get_irq(tmu->pdev, index); + else + ch->irq =3D of_irq_get(np, index); if (ch->irq < 0) return ch->irq; =20 ch->cs_enabled =3D false; ch->enable_count =3D 0; =20 - return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), + return sh_tmu_register(ch, tmu->name, np, clockevent, clocksource); } =20 -static int sh_tmu_map_memory(struct sh_tmu_device *tmu) +static int sh_tmu_map_memory(struct sh_tmu_device *tmu, struct device_node= *np) { struct resource *res; =20 - res =3D platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); - return -ENXIO; - } + if (tmu->pdev) { + res =3D platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); + if (!res) { + pr_err("sh_tmu failed to get I/O memory\n"); + return -ENXIO; + } + + tmu->mapbase =3D ioremap(res->start, resource_size(res)); + } else + tmu->mapbase =3D of_iomap(np, 0); =20 - tmu->mapbase =3D ioremap(res->start, resource_size(res)); if (tmu->mapbase =3D=3D NULL) return -ENXIO; =20 return 0; } =20 -static int sh_tmu_parse_dt(struct sh_tmu_device *tmu) +static int sh_tmu_parse_dt(struct sh_tmu_device *tmu, struct device_node *= np) { - struct device_node *np =3D tmu->pdev->dev.of_node; - tmu->model =3D SH_TMU; tmu->num_channels =3D 3; =20 of_property_read_u32(np, "#renesas,channels", &tmu->num_channels); =20 if (tmu->num_channels !=3D 2 && tmu->num_channels !=3D 3) { - dev_err(&tmu->pdev->dev, "invalid number of channels %u\n", - tmu->num_channels); + pr_err("%s: invalid number of channels %u\n", + tmu->name, tmu->num_channels); return -EINVAL; } =20 return 0; } =20 -static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device = *pdev) +static int sh_tmu_setup(struct sh_tmu_device *tmu, + struct platform_device *pdev, struct device_node *np) { unsigned int i; int ret; @@ -520,8 +538,13 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, str= uct platform_device *pdev) =20 raw_spin_lock_init(&tmu->lock); =20 - if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { - ret =3D sh_tmu_parse_dt(tmu); + if (pdev) + tmu->name =3D dev_name(&pdev->dev); + else + tmu->name =3D of_node_full_name(np); + + if (IS_ENABLED(CONFIG_OF) && np) { + ret =3D sh_tmu_parse_dt(tmu, np); if (ret < 0) return ret; } else if (pdev->dev.platform_data) { @@ -531,14 +554,17 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, st= ruct platform_device *pdev) tmu->model =3D id->driver_data; tmu->num_channels =3D hweight8(cfg->channels_mask); } else { - dev_err(&tmu->pdev->dev, "missing platform data\n"); + pr_err("%s missing platform data\n", tmu->name); return -ENXIO; } =20 /* Get hold of clock. */ - tmu->clk =3D clk_get(&tmu->pdev->dev, "fck"); + if (pdev) + tmu->clk =3D clk_get(&tmu->pdev->dev, "fck"); + else + tmu->clk =3D of_clk_get(np, 0); if (IS_ERR(tmu->clk)) { - dev_err(&tmu->pdev->dev, "cannot get clock\n"); + pr_err("%s: cannot get clock\n", tmu->name); return PTR_ERR(tmu->clk); } =20 @@ -555,9 +581,9 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, stru= ct platform_device *pdev) clk_disable(tmu->clk); =20 /* Map the memory resource. */ - ret =3D sh_tmu_map_memory(tmu); + ret =3D sh_tmu_map_memory(tmu, np); if (ret < 0) { - dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); + pr_err("%s: failed to remap I/O memory\n", tmu->name); goto err_clk_unprepare; } =20 @@ -575,12 +601,12 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, st= ruct platform_device *pdev) */ for (i =3D 0; i < tmu->num_channels; ++i) { ret =3D sh_tmu_channel_setup(&tmu->channels[i], i, - i =3D=3D 0, i =3D=3D 1, tmu); + i =3D=3D 0, i =3D=3D 1, tmu, np); if (ret < 0) goto err_unmap; } - - platform_set_drvdata(pdev, tmu); + if (pdev) + platform_set_drvdata(pdev, tmu); =20 return 0; =20 @@ -594,6 +620,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, stru= ct platform_device *pdev) return ret; } =20 +#ifndef CONFIG_SH_DEVICE_TREE static int sh_tmu_probe(struct platform_device *pdev) { struct sh_tmu_device *tmu =3D platform_get_drvdata(pdev); @@ -613,7 +640,7 @@ static int sh_tmu_probe(struct platform_device *pdev) if (tmu =3D=3D NULL) return -ENOMEM; =20 - ret =3D sh_tmu_setup(tmu, pdev); + ret =3D sh_tmu_setup(tmu, pdev, pdev->dev.of_node); if (ret) { kfree(tmu); pm_runtime_idle(&pdev->dev); @@ -631,7 +658,26 @@ static int sh_tmu_probe(struct platform_device *pdev) =20 return 0; } +#else +static int __init sh_tmu_of_register(struct device_node *np) +{ + struct sh_tmu_device *tmu; + int ret; + + tmu =3D kzalloc(sizeof(*tmu), GFP_KERNEL); + if (tmu =3D=3D NULL) + return -ENOMEM; + + ret =3D sh_tmu_setup(tmu, NULL, np); + if (ret) { + kfree(tmu); + pr_warn("%pOF: Timer register failed (%d)", np, ret); + } + return ret; +} +#endif =20 +#ifndef CONFIG_SH_DEVICE_TREE static const struct platform_device_id sh_tmu_id_table[] =3D { { "sh-tmu", SH_TMU }, { "sh-tmu-sh3", SH_TMU_SH3 }, @@ -665,12 +711,17 @@ static void __exit sh_tmu_exit(void) platform_driver_unregister(&sh_tmu_device_driver); } =20 +subsys_initcall(sh_tmu_init); +module_exit(sh_tmu_exit); +#endif + #ifdef CONFIG_SUPERH +#ifdef CONFIG_SH_DEVICE_TREE +TIMER_OF_DECLARE(sh_tmu, "renesas,tmu", sh_tmu_of_register); +#else sh_early_platform_init("earlytimer", &sh_tmu_device_driver); #endif - -subsys_initcall(sh_tmu_init); -module_exit(sh_tmu_exit); +#endif =20 MODULE_AUTHOR("Magnus Damm"); MODULE_DESCRIPTION("SuperH TMU Timer Driver"); --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 539D0C4167B for ; Tue, 5 Dec 2023 10:13:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346666AbjLEKNO (ORCPT ); Tue, 5 Dec 2023 05:13:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346479AbjLEJzn (ORCPT ); Tue, 5 Dec 2023 04:55:43 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3D4F4187; Tue, 5 Dec 2023 01:55:37 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 3A4071C053F; Tue, 5 Dec 2023 18:46:19 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 09/37] dt-bindings: timer: renesas,tmu: add renesas,tmu-sh7750 Date: Tue, 5 Dec 2023 18:45:28 +0900 Message-Id: <91a4cac133cb7244903e872b9e63fbbd57fbd68c.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add SH7750 TMU entry. Signed-off-by: Yoshinori Sato --- .../devicetree/bindings/timer/renesas,tmu.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Doc= umentation/devicetree/bindings/timer/renesas,tmu.yaml index a67e427a9e7e..925c2a691b25 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml @@ -21,6 +21,7 @@ properties: compatible: items: - enum: + - renesas,tmu-sh7750 # SH7750 - renesas,tmu-r8a7740 # R-Mobile A1 - renesas,tmu-r8a774a1 # RZ/G2M - renesas,tmu-r8a774b1 # RZ/G2N @@ -46,7 +47,14 @@ properties: =20 interrupts: minItems: 2 - maxItems: 3 + maxItems: 4 + + interrupt-names: + items: + - const: tuni0 + - const: tuni1 + - const: tuni2 + - const: ticpi2 =20 clocks: maxItems: 1 @@ -84,6 +92,7 @@ if: - renesas,tmu-r8a7740 - renesas,tmu-r8a7778 - renesas,tmu-r8a7779 + - renesas,tmu-sh7750 then: required: - resets --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47E88C4167B for ; Tue, 5 Dec 2023 10:13:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235074AbjLEKNR (ORCPT ); Tue, 5 Dec 2023 05:13:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346473AbjLEJzn (ORCPT ); Tue, 5 Dec 2023 04:55:43 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 6F44818B; Tue, 5 Dec 2023 01:55:37 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 365251C0546; Tue, 5 Dec 2023 18:46:21 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 10/37] sh: Common PCI Framework driver support. Date: Tue, 5 Dec 2023 18:45:29 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add New OF based PCI Host driver. This driver conflicts some point in legacy PCI driver. To resolve the conflict, I made some changes to the legacy driver. Signed-off-by: Yoshinori Sato --- arch/sh/drivers/pci/pci.c | 6 ------ arch/sh/include/asm/io.h | 6 ++++++ arch/sh/include/asm/pci.h | 4 ++++ arch/sh/kernel/iomap.c | 24 ++++++++++++++++++++++++ 4 files changed, 34 insertions(+), 6 deletions(-) diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index a3903304f33f..61a19c2c9014 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -286,12 +286,6 @@ void __iomem *__pci_ioport_map(struct pci_dev *dev, return (void __iomem *)(chan->io_map_base + port); } =20 -void pci_iounmap(struct pci_dev *dev, void __iomem *addr) -{ - iounmap(addr); -} -EXPORT_SYMBOL(pci_iounmap); - #endif /* CONFIG_GENERIC_IOMAP */ =20 EXPORT_SYMBOL(PCIBIOS_MIN_IO); diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index ac521f287fa5..efea1bd0a681 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -20,6 +20,7 @@ #include #include #include +#include =20 #define __IO_PREFIX generic #include @@ -317,4 +318,9 @@ unsigned long long poke_real_address_q(unsigned long lo= ng addr, int valid_phys_addr_range(phys_addr_t addr, size_t size); int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); =20 +#if defined(CONFIG_PCI) && !defined(CONFIG_GENERIC_IOMAP) +#define pci_remap_iospace pci_remap_iospace +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); +#endif + #endif /* __ASM_SH_IO_H */ diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index 54c30126ea17..92b3bd604319 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h @@ -2,6 +2,7 @@ #ifndef __ASM_SH_PCI_H #define __ASM_SH_PCI_H =20 +#ifndef CONFIG_SH_DEVICE_TREE /* Can be used to override the logic in pci_scan_bus for skipping already-configured bus numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the loader */ @@ -88,4 +89,7 @@ static inline int pci_proc_domain(struct pci_bus *bus) return hose->need_domain_info; } =20 +#else /* CONFIG_SH_DEVICE_TREE */ +#include +#endif #endif /* __ASM_SH_PCI_H */ diff --git a/arch/sh/kernel/iomap.c b/arch/sh/kernel/iomap.c index 0a0dff4e66de..ec68ce4e4a17 100644 --- a/arch/sh/kernel/iomap.c +++ b/arch/sh/kernel/iomap.c @@ -160,3 +160,27 @@ void iowrite32_rep(void __iomem *addr, const void *src= , unsigned long count) mmio_outsl(addr, src, count); } EXPORT_SYMBOL(iowrite32_rep); + +#if defined(CONFIG_PCI) && !defined(CONFIG_GENERIC_IOMAP) +void pci_iounmap(struct pci_dev *dev, void __iomem *addr) +{ + iounmap(addr); +} +EXPORT_SYMBOL(pci_iounmap); + +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) +{ + unsigned long vaddr =3D res->start; + + if (!(res->flags & IORESOURCE_IO)) + return -EINVAL; + + if (res->end > IO_SPACE_LIMIT) + return -EINVAL; + + __set_io_port_base(phys_addr); + return ioremap_page_range(vaddr, vaddr + resource_size(res), phys_addr, + pgprot_device(PAGE_KERNEL)); +} +EXPORT_SYMBOL(pci_remap_iospace); +#endif --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7071DC4167B for ; Tue, 5 Dec 2023 10:12:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235040AbjLEKMl (ORCPT ); Tue, 5 Dec 2023 05:12:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344945AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 704C7127; Tue, 5 Dec 2023 01:55:35 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 4F0BC1C0559; Tue, 5 Dec 2023 18:46:23 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 11/37] pci: pci-sh7751: Add SH7751 PCI driver Date: Tue, 5 Dec 2023 18:45:30 +0900 Message-Id: <602e1ba4f02489fcbc47e8f9904f3c1db1c9f14a.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 CPU Internal PCI Controller driver. Signed-off-by: Yoshinori Sato --- drivers/pci/controller/Kconfig | 9 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pci-sh7751.c | 302 ++++++++++++++++++++++++++++ drivers/pci/controller/pci-sh7751.h | 76 +++++++ 4 files changed, 388 insertions(+) create mode 100644 drivers/pci/controller/pci-sh7751.c create mode 100644 drivers/pci/controller/pci-sh7751.h diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index e534c02ee34f..a2fd917a2e03 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -353,6 +353,15 @@ config PCIE_XILINX_CPM Say 'Y' here if you want kernel support for the Xilinx Versal CPM host bridge. =20 +config PCI_SH7751 + bool "Renesas SH7751 PCI controller" + depends on OF + depends on CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R || COMPILE_TEST + select PCI_HOST_COMMON + help + Say 'Y' here if you want kernel to support the Renesas SH7751 PCI + Host Bridge driver. + source "drivers/pci/controller/cadence/Kconfig" source "drivers/pci/controller/dwc/Kconfig" source "drivers/pci/controller/mobiveil/Kconfig" diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makef= ile index f2b19e6174af..aa97e5d74e58 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PCI_LOONGSON) +=3D pci-loongson.o obj-$(CONFIG_PCIE_HISI_ERR) +=3D pcie-hisi-error.o obj-$(CONFIG_PCIE_APPLE) +=3D pcie-apple.o obj-$(CONFIG_PCIE_MT7621) +=3D pcie-mt7621.o +obj-$(CONFIG_PCI_SH7751) +=3D pci-sh7751.o =20 # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y +=3D dwc/ diff --git a/drivers/pci/controller/pci-sh7751.c b/drivers/pci/controller/p= ci-sh7751.c new file mode 100644 index 000000000000..6bc022ccf64c --- /dev/null +++ b/drivers/pci/controller/pci-sh7751.c @@ -0,0 +1,302 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SH7751 PCI driver + * Copyright (C) 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pci-sh7751.h" + +#define pcic_writel(val, base, reg) __raw_writel(val, base + (reg)) +#define pcic_readl(base, reg) __raw_readl(base + (reg)) + +/* + * PCIC fixups + */ + +static inline void pci_fixup_write_regs(struct device_node *np, + const char *prop, + void __iomem *pcic, int reg, + int nr_regs) +{ + int i; + u32 val; + + for (i =3D 0; i < nr_regs; i++) { + if (of_property_read_u32_index(np, prop, i, &val)) + pcic_writel(val, pcic, reg + i * 4); + } +} + +#define SH7751_NUM_CONFIG 18 +static void pcic_fixups(struct device_node *np, + void __iomem *pcic, void __iomem *bsc) +{ + unsigned long bcr1, mcr; + u32 val; + int i, r; + u32 pci_config[SH7751_NUM_CONFIG * 2]; + + const struct { + const char *name; + int reg; + int nr; + } reg_prop[] =3D { + /* + * The bus timing uses the bootloader settings, + * so do not change them here. + */ + { "renesas,intm", PCIC_PCIINTM, 1, }, + { "renesas,aintm", PCIC_PCIAINTM, 1, }, + { "renesas,lsr", PCIC_PCILSR0, 2, }, + { "renesas,lar", PCIC_PCILAR0, 2, }, + { "renesas,dmabt", PCIC_PCIDMABT, 1, }, + { "renesas,pintm", PCIC_PCIPINTM, 1, }, + }; + + if (of_property_read_u32(np, "renesas,bcr1", &val)) { + bcr1 =3D ioread32(bsc + BSC_BCR1); + bcr1 |=3D val; + pcic_writel(bcr1, pcic, PCIC_PCIBCR1); + } + if (of_property_read_u32(np, "renesas,clkr", &val)) { + val =3D (val & 0xffffff); + pcic_writel(PCIC_WE_KEY | val, pcic, PCIC_PCICLKR); + } + for (i =3D 0; i < ARRAY_SIZE(reg_prop); i++) + pci_fixup_write_regs(np, reg_prop[i].name, pcic, + reg_prop[i].reg, reg_prop[i].nr); + + memset(pci_config, 0, sizeof(pci_config)); + if (of_property_read_u32_array(np, "renesas,config", + pci_config, SH7751_NUM_CONFIG) =3D=3D 0) { + for (i =3D 0; i < SH7751_NUM_CONFIG; i++) { + r =3D pci_config[i * 2]; + /* CONFIG0 is read-only, so make it a sentinel. */ + if (r =3D=3D 0) + break; + pcic_writel(pci_config[i * 2 + 1], pcic, r * 4); + } + } + + if (of_property_read_u32(np, "renesas,mcrmask", &val)) { + mcr =3D ioread32(bsc + BSC_MCR); + mcr &=3D ~val; + pcic_writel(mcr, pcic, PCIC_PCIMCR); + } +} + +/* + * We need to avoid collisions with `mirrored' VGA ports + * and other strange ISA hardware, so we always want the + * addresses to be allocated in the 0x000-0x0ff region + * modulo 0x400. + */ +#define IO_REGION_BASE 0x1000 +resource_size_t pcibios_align_resource(void *data, const struct resource *= res, + resource_size_t size, resource_size_t align) +{ + resource_size_t start =3D res->start; + + if (res->flags & IORESOURCE_IO) { + if (start < PCIBIOS_MIN_IO + IO_REGION_BASE) + start =3D PCIBIOS_MIN_IO + IO_REGION_BASE; + + /* + * Put everything into 0x00-0xff region modulo 0x400. + */ + if (start & 0x300) + start =3D (start + 0x3ff) & ~0x3ff; + } + + return start; +} + +static int setup_pci_bsc(struct device *dev, void __iomem *pcic, + void __iomem *bsc, unsigned int area, bool bcr3) +{ + unsigned long word; + + word =3D __raw_readl(bsc + BSC_BCR1); + /* check BCR for SDRAM in area */ + if (((word >> area) & 1) =3D=3D 0) { + dev_info(dev, "PCI: Area %d is not configured for SDRAM. BCR1=3D0x%lx\n", + area, word); + return 0; + } + pcic_writel(word, pcic, PCIC_PCIBCR1); + + word =3D __raw_readw(bsc + BSC_BCR2); + /* check BCR2 for 32bit SDRAM interface*/ + if (((word >> (area << 1)) & 0x3) !=3D 0x3) { + dev_info(dev, "PCI: Area %d is not 32 bit SDRAM. BCR2=3D0x%lx\n", + area, word); + return 0; + } + pcic_writel(word, pcic, PCIC_PCIBCR2); + + if (bcr3) { + /* BCR3 have only SH7751R */ + word =3D __raw_readw(bsc + BSC_BCR3); + pcic_writel(word, pcic, PCIC_PCIBCR3); + } + + return 1; +} + +static void set_pci_window(void __iomem *pcic, int no, u32 *memory) +{ + u32 word; + + word =3D memory[1] - 1; + pcic_writel(word, pcic, PCIC_PCILSR0 + no * 4); + word =3D P2SEGADDR(memory[0]); + pcic_writel(word, pcic, PCIC_PCILAR0 + no * 4); + pcic_writel(word, pcic, PCI_BASE_ADDRESS_1 + no * 4); +} + +static int sh7751_pci_probe(struct platform_device *pdev) +{ + struct resource *res, *bscres; + void __iomem *pcic; + void __iomem *bsc; + u32 memory[2]; + u16 vid, did; + u32 word; + + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) + return PTR_ERR(res); + pcic =3D (void __iomem *)res->start; + + bscres =3D platform_get_resource(pdev, IORESOURCE_MEM, 1); + bsc =3D devm_ioremap_resource(&pdev->dev, bscres); + if (IS_ERR(bsc)) + return PTR_ERR(bsc); + + if (of_property_read_u32_array(pdev->dev.of_node, + "renesas,memory", memory, 2) < 0) { + /* + * If no memory range is specified, + * the entire main memory will be targeted for DMA. + */ + memory[0] =3D memory_start; + memory[1] =3D memory_end - memory_start; + } + + /* check for SH7751/SH7751R hardware */ + word =3D pcic_readl(pcic, PCI_VENDOR_ID); + vid =3D word & 0xffff; + did =3D word >> 16; + if ((vid !=3D PCI_VENDOR_ID_HITACHI) || + ((did !=3D PCI_DEVICE_ID_SH7751) && + (did !=3D PCI_DEVICE_ID_SH7751R))) { + dev_warn(&pdev->dev, "PCI: This is not an SH7751(R)\n"); + return -ENODEV; + } + dev_info(&pdev->dev, "PCI core found at %pR\n", res); + + /* Set the BCR's to enable PCI access */ + word =3D __raw_readl(bsc + BSC_BCR1); + word |=3D BSC_BCR1_BRQEN; + __raw_writel(word, bsc + BSC_BCR1); + + /* Turn the clocks back on (not done in reset)*/ + pcic_writel(PCIC_WE_KEY | 0, pcic, PCIC_PCICLKR); + /* Clear Powerdown IRQ's (not done in reset) */ + word =3D PCIC_PCIPINT_D3 | PCIC_PCIPINT_D0; + pcic_writel(word, pcic, PCIC_PCIPINT); + + /* set the command/status bits to: + * Wait Cycle Control + Parity Enable + Bus Master + + * Mem space enable + */ + word =3D PCI_COMMAND_WAIT | PCI_COMMAND_PARITY | + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pcic_writel(word, pcic, PCI_COMMAND); + + /* define this host as the host bridge */ + word =3D PCI_BASE_CLASS_BRIDGE << 24; + pcic_writel(word, pcic, PCI_CLASS_REVISION); + + /* Set IO and Mem windows to local address + * Make PCI and local address the same for easy 1 to 1 mapping + */ + set_pci_window(pcic, 0, memory); + pcic_writel(0, pcic, PCIC_PCIIOBR); + + /* check BCR for SDRAM in specified area. And setup PCI BSC. */ + setup_pci_bsc(&pdev->dev, pcic, bsc, (memory[0] >> 26) & 0x07, + did =3D=3D PCI_DEVICE_ID_SH7751R); + + /* configure the wait control registers */ + word =3D __raw_readl(bsc + BSC_WCR1); + pcic_writel(word, pcic, PCIC_PCIWCR1); + word =3D __raw_readl(bsc + BSC_WCR2); + pcic_writel(word, pcic, PCIC_PCIWCR2); + word =3D __raw_readl(bsc + BSC_WCR3); + pcic_writel(word, pcic, PCIC_PCIWCR3); + word =3D __raw_readl(bsc + BSC_MCR); + pcic_writel(word, pcic, PCIC_PCIMCR); + + /* Override register setting */ + pcic_fixups(pdev->dev.of_node, pcic, bsc); + + /* SH7751 init done, set central function init complete */ + /* use round robin mode to stop a device starving/overrunning */ + word =3D PCIC_PCICR_CFIN | PCIC_PCICR_ARBM; + pcic_writel(PCIC_WE_KEY | word, pcic, PCIC_PCICR); + + return pci_host_common_probe(pdev); +} + +/* + * Direct access to PCI hardware... + */ +#define CONFIG_CMD(bus, devfn, where) \ + (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) + +static void __iomem *sh4_pci_map_bus(struct pci_bus *bus, + unsigned int devfn, int where) +{ + struct pci_config_window *cfg =3D bus->sysdata; + void __iomem *pcic =3D (void __iomem *)cfg->res.start; + + pcic_writel(CONFIG_CMD(bus, devfn, where), pcic, PCIC_PCIPAR); + return pcic + PCIC_PCIPDR; +} + +static const struct pci_ecam_ops pci_sh7751_bus_ops =3D { + .pci_ops =3D { + .map_bus =3D sh4_pci_map_bus, + .read =3D pci_generic_config_read32, + .write =3D pci_generic_config_write32, + } +}; + +static const struct of_device_id sh7751_pci_of_match[] =3D { + { .compatible =3D "renesas,sh7751-pci", + .data =3D &pci_sh7751_bus_ops }, + { } +}; +MODULE_DEVICE_TABLE(of, sh7751_pci_of_match); + +static struct platform_driver sh7751_pci_driver =3D { + .driver =3D { + .name =3D "sh7751-pci", + .of_match_table =3D sh7751_pci_of_match, + }, + .probe =3D sh7751_pci_probe, +}; +module_platform_driver(sh7751_pci_driver); + +MODULE_DESCRIPTION("SH7751 PCI driver"); diff --git a/drivers/pci/controller/pci-sh7751.h b/drivers/pci/controller/p= ci-sh7751.h new file mode 100644 index 000000000000..540cee7095c6 --- /dev/null +++ b/drivers/pci/controller/pci-sh7751.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * SH7751 PCI driver define + * Copyright (C) 2023 Yoshinori Sato + */ + +#ifndef _PCI_SH7751_H_ +#define _PCI_SH7751_H_ + +/* PCICR and PCICLKCR write enable magic key */ +#define PCIC_WE_KEY (0xa5 << 24) + +/* PCIC registers */ +/* 0x0000 - 0x00ff mapped to PCI device configuration space */ +#define PCIC_PCICR 0x100 /* PCI Control Register */ +#define PCIC_PCICR_TRSB BIT(9) /* Target Read Single */ +#define PCIC_PCICR_BSWP BIT(8) /* Target Byte Swap */ +#define PCIC_PCICR_PLUP BIT(7) /* Enable PCI Pullup */ +#define PCIC_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */ +#define PCIC_PCICR_MD10 BIT(5) /* MD10 status */ +#define PCIC_PCICR_MD9 BIT(4) /* MD9 status */ +#define PCIC_PCICR_SERR BIT(3) /* SERR output assert */ +#define PCIC_PCICR_INTA BIT(2) /* INTA output assert */ +#define PCIC_PCICR_PRST BIT(1) /* PCI Reset Assert */ +#define PCIC_PCICR_CFIN BIT(0) /* Central Fun. Init Done */ + +#define PCIC_PCILSR0 0x104 /* PCI Local Space Register0 */ +#define PCIC_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define PCIC_PCILAR0 0x10c /* PCI Local Addr Register1 */ +#define PCIC_PCILAR1 0x110 /* PCI Local Addr Register1 */ +#define PCIC_PCIINT 0x114 /* PCI Interrupt Register */ +#define PCIC_PCIINTM 0x118 /* PCI Interrupt Mask */ +#define PCIC_PCIALR 0x11c /* Error Address Register */ +#define PCIC_PCICLR 0x120 /* Error Command/Data */ +#define PCIC_PCIAINT 0x130 /* Arbiter Interrupt Register */ +#define PCIC_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define PCIC_PCIBMLR 0x138 /* Error Bus Master Register */ +#define PCIC_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ +#define PCIC_PCIPAR 0x1c0 /* PIO Address Register */ +#define PCIC_PCIMBR 0x1c4 /* Memory Base Address */ +#define PCIC_PCIIOBR 0x1c8 /* I/O Base Address Register */ + +#define PCIC_PCIPINT 0x1cc /* Power Mgmnt Int. Register */ +#define PCIC_PCIPINT_D3 BIT(1) /* D3 Pwr Mgmt. Interrupt */ +#define PCIC_PCIPINT_D0 BIT(0) /* D0 Pwr Mgmt. Interrupt */ + +#define PCIC_PCIPINTM 0x1d0 /* Power Mgmnt Mask Register */ +#define PCIC_PCICLKR 0x1d4 /* Clock Ctrl. Register */ +#define PCIC_PCIBCR1 0x1e0 /* Memory BCR1 Register */ +#define PCIC_PCIBCR2 0x1e4 /* Memory BCR2 Register */ +#define PCIC_PCIWCR1 0x1e8 /* Wait Control 1 Register */ +#define PCIC_PCIWCR2 0x1ec /* Wait Control 2 Register */ +#define PCIC_PCIWCR3 0x1f0 /* Wait Control 3 Register */ +#define PCIC_PCIMCR 0x1f4 /* Memory Control Register */ +#define PCIC_PCIBCR3 0x1f8 /* Memory BCR3 Register */ +#define PCIC_PCIPDR 0x220 /* Port IO Data Register */ + +/* PCI IDs */ +/* Hitachi is the company that led to Renesas. */ +/* The SH7751 was designed by Hitachi, so it has a Hitachi ID. */ +#define PCI_VENDOR_ID_HITACHI 0x1054 +#define PCI_DEVICE_ID_SH7751 0x3505 +#define PCI_DEVICE_ID_SH7751R 0x350e + +/* BSC registers */ +/* Copy BSC setting to PCI BSC */ +#define BSC_BCR1 0x0000 +#define BSC_BCR1_BRQEN BIT(19) +#define BSC_BCR2 0x0004 +#define BSC_BCR3 0x0050 +#define BSC_WCR1 0x0008 +#define BSC_WCR2 0x000c +#define BSC_WCR3 0x0010 +#define BSC_MCR 0x0014 + +#endif /* _PCI_SH7751_H_ */ --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4753C46CA3 for ; Tue, 5 Dec 2023 10:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346814AbjLEJ4Y (ORCPT ); Tue, 5 Dec 2023 04:56:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344921AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 0F143129; Tue, 5 Dec 2023 01:55:35 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 50F1B1C058A; Tue, 5 Dec 2023 18:46:25 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 12/37] dt-bindings: pci: pci-sh7751: Add SH7751 PCI Date: Tue, 5 Dec 2023 18:45:31 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 PCI Controller json-schema. Signed-off-by: Yoshinori Sato --- .../bindings/pci/renesas,sh7751-pci.yaml | 128 ++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pc= i.yaml diff --git a/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml = b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml new file mode 100644 index 000000000000..c71ed56b7210 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/renesas,sh7751-pci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 PCI Host controller + +maintainers: + - Yoshinori Sato + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + items: + - enum: + - renesas,sh7751-pci + + reg: + minItems: 2 + maxItems: 2 + + "#interrupt-cells": + const: 1 + + "#address-cells": + const: 3 + + "#size-cells": + const: 2 + + ranges: true + + interrupt-controller: true + + renesas,memory: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + PCI BMDMA src/dst memory area. + + renesas,bcr1: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIBCR1 value. This value makes add the value of BSC's B= CR1. + + renesas,mcrmask: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIMCR value. This value makes clear bit in the value of= BSC's MCR. + + renesas,intm: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIINTM value. + + renesas,aintm: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIIANTM value. + + renesas,lsr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCILSR0 and PCILSR1 values. + First word is PCILSR0, Second word is PCILSR1. + + renesas,lar: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCILSA0 and PCILAR1 values. + First word is PCILAR0, Second word is PCILAR1. + + renesas,dmabt: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIDMABT value. + + renesas,pintm: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SH7751 PCIC PCIPINTM value. + + renesas,config: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + SH7751 PCIC PCICONFIG values array. Register Number and value pair l= ist. + +required: + - compatible + - reg + - "#interrupt-cells" + - "#address-cells" + - "#size-cells" + - ranges + - interrupt-map + - interrupt-map-mask + +unevaluatedProperties: false + +examples: + - | + pci@fe200000 { + compatible =3D "renesas,sh7751-pci"; + #address-cells =3D <3>; + #size-cells =3D <2>; + #interrupt-cells =3D <1>; + device_type =3D "pci"; + bus-range =3D <0 0>; + ranges =3D <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + reg =3D <0xfe200000 0x0400>, + <0xff800000 0x0100>; + interrupt-map =3D <0x0000 0 0 1 &julianintc 5>, + <0x0000 0 0 2 &julianintc 6>, + <0x0000 0 0 3 &julianintc 7>, + <0x0000 0 0 4 &julianintc 8>, + <0x0800 0 0 1 &julianintc 6>, + <0x0800 0 0 2 &julianintc 7>, + <0x0800 0 0 3 &julianintc 8>, + <0x0800 0 0 4 &julianintc 5>, + <0x1000 0 0 1 &julianintc 7>, + <0x1000 0 0 2 &julianintc 8>, + <0x1000 0 0 3 &julianintc 5>, + <0x1000 0 0 4 &julianintc 6>; + interrupt-map-mask =3D <0x1800 0 0 7>; + }; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04B21C4167B for ; Tue, 5 Dec 2023 09:56:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346541AbjLEJ4P (ORCPT ); Tue, 5 Dec 2023 04:56:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344903AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 73BA79E; Tue, 5 Dec 2023 01:55:35 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 4CCF91C05B8; Tue, 5 Dec 2023 18:46:27 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 13/37] dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header. Date: Tue, 5 Dec 2023 18:45:32 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" SH7750 CPG Clock output define. Signed-off-by: Yoshinori Sato --- .../bindings/clock/renesas,sh7750-cpg.yaml | 103 ++++++++++++++++++ include/dt-bindings/clock/sh7750-cpg.h | 26 +++++ 2 files changed, 129 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-= cpg.yaml create mode 100644 include/dt-bindings/clock/sh7750-cpg.h diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yam= l b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml new file mode 100644 index 000000000000..da0b837c1123 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,sh7750-cpg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7750/7751 Clock Pulse Generator (CPG) + +maintainers: + - Yoshinori Sato + +description: + The Clock Pulse Generator (CPG) generates core clocks for the SoC. It + includes PLLs, and variable ratio dividers. + + The CPG may also provide a Clock Domain for SoC devices, in combination = with + the CPG Module Stop (MSTP) Clocks. + +properties: + compatible: + enum: + - renesas,sh7750-cpg # SH7750 + - renesas,sh7750s-cpg # SH775S + - renesas,sh7750r-cpg # SH7750R + - renesas,sh7751-cpg # SH7751 + - renesas,sh7751r-cpg # SH7751R + + reg: true + + reg-names: true + + clocks: true + + clock-names: true + + '#clock-cells': + const: 1 + + renesas,mode: + description: Board-specific settings of the MD[0-2] pins on SoC + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + '#power-domain-cells': + const: 0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - '#clock-cells' + +allOf: + - if: + properties: + compatible: + contains: + enum: + - renesas,sh7750-cpg + - renesas,sh7750s-cpg + then: + properties: + reg: + maxItems: 1 + reg-names: + items: + - const: FRQCR + + - if: + properties: + compatible: + contains: + enum: + - renesas,sh7750r-cpg + - renesas,sh7751-cpg + - renesas,sh7751r-cpg + then: + properties: + reg: + maxItems: 2 + reg-names: + items: + - const: FRQCR + - const: CLKSTP00 + +additionalProperties: false + +examples: + - | + #include + cpg: clock-controller@ffc00000 { + #clock-cells =3D <1>; + #power-domain-cells =3D <0>; + compatible =3D "renesas,sh7751r-cpg"; + clocks =3D <&xtal>; + clock-names =3D "xtal"; + reg =3D <0xffc00000 20>, <0xfe0a0000 16>; + reg-names =3D "FRQCR", "CLKSTP00"; + renesas,mode =3D <0>; + }; diff --git a/include/dt-bindings/clock/sh7750-cpg.h b/include/dt-bindings/c= lock/sh7750-cpg.h new file mode 100644 index 000000000000..17d5a8076aac --- /dev/null +++ b/include/dt-bindings/clock/sh7750-cpg.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright 2023 Yoshinori Sato + */ + +#ifndef __DT_BINDINGS_CLOCK_SH7750_H__ +#define __DT_BINDINGS_CLOCK_SH7750_H__ + +#define SH7750_CPG_PLLOUT 0 + +#define SH7750_CPG_FCK 1 +#define SH7750_CPG_BCK 2 +#define SH7750_CPG_ICK 3 + +#define SH7750_MSTP_SCI 4 +#define SH7750_MSTP_RTC 5 +#define SH7750_MSTP_TMU012 6 +#define SH7750_MSTP_SCIF 7 +#define SH7750_MSTP_DMAC 8 +#define SH7750_MSTP_UBC 9 +#define SH7750_MSTP_SQ 10 +#define SH7750_CSTP_INTC 11 +#define SH7750_CSTP_TMU34 12 +#define SH7750_CSTP_PCIC 13 + +#endif --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01B06C10F05 for ; Tue, 5 Dec 2023 10:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346847AbjLEJ41 (ORCPT ); Tue, 5 Dec 2023 04:56:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344929AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 97EA910F; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 8CF331C05D3; Tue, 5 Dec 2023 18:46:29 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 14/37] clk: Compatible with narrow registers Date: Tue, 5 Dec 2023 18:45:33 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" divider and gate only support 32-bit registers. Older hardware uses narrower registers, so I want to be able to handle 8-bit and 16-bit wide registers. Signed-off-by: Yoshinori Sato --- drivers/clk/clk-divider.c | 56 ++++++++++++++++++++++++------------ drivers/clk/clk-gate.c | 56 +++++++++++++++++++++++++++--------- include/linux/clk-provider.h | 22 ++++++++++---- 3 files changed, 97 insertions(+), 37 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index a2c2b5203b0a..a1b5187cd63d 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -26,20 +26,38 @@ * parent - fixed parent. No clk_set_parent support */ =20 -static inline u32 clk_div_readl(struct clk_divider *divider) -{ - if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) - return ioread32be(divider->reg); - - return readl(divider->reg); +static inline u32 clk_div_read(struct clk_divider *divider) +{ + if (divider->flags & CLK_DIVIDER_REG_8BIT) + return readb(divider->reg); + else if (divider->flags & CLK_DIVIDER_REG_16BIT) { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) + return ioread16be(divider->reg); + else + return readw(divider->reg); + } else { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) + return ioread32be(divider->reg); + else + return readl(divider->reg); + } } =20 -static inline void clk_div_writel(struct clk_divider *divider, u32 val) +static inline void clk_div_write(struct clk_divider *divider, u32 val) { - if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) - iowrite32be(val, divider->reg); - else - writel(val, divider->reg); + if (divider->flags & CLK_DIVIDER_REG_8BIT) + writeb(val, divider->reg); + else if (divider->flags & CLK_DIVIDER_REG_16BIT) { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) + iowrite16be(val, divider->reg); + else + writew(val, divider->reg); + } else { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) + iowrite32be(val, divider->reg); + else + writel(val, divider->reg); + } } =20 static unsigned int _get_table_maxdiv(const struct clk_div_table *table, @@ -152,7 +170,7 @@ static unsigned long clk_divider_recalc_rate(struct clk= _hw *hw, struct clk_divider *divider =3D to_clk_divider(hw); unsigned int val; =20 - val =3D clk_div_readl(divider) >> divider->shift; + val =3D clk_div_read(divider) >> divider->shift; val &=3D clk_div_mask(divider->width); =20 return divider_recalc_rate(hw, parent_rate, val, divider->table, @@ -434,7 +452,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, u= nsigned long rate, if (divider->flags & CLK_DIVIDER_READ_ONLY) { u32 val; =20 - val =3D clk_div_readl(divider) >> divider->shift; + val =3D clk_div_read(divider) >> divider->shift; val &=3D clk_div_mask(divider->width); =20 return divider_ro_round_rate(hw, rate, prate, divider->table, @@ -455,7 +473,7 @@ static int clk_divider_determine_rate(struct clk_hw *hw, if (divider->flags & CLK_DIVIDER_READ_ONLY) { u32 val; =20 - val =3D clk_div_readl(divider) >> divider->shift; + val =3D clk_div_read(divider) >> divider->shift; val &=3D clk_div_mask(divider->width); =20 return divider_ro_determine_rate(hw, req, divider->table, @@ -505,11 +523,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, un= signed long rate, if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { val =3D clk_div_mask(divider->width) << (divider->shift + 16); } else { - val =3D clk_div_readl(divider); + val =3D clk_div_read(divider); val &=3D ~(clk_div_mask(divider->width) << divider->shift); } val |=3D (u32)value << divider->shift; - clk_div_writel(divider, val); + clk_div_write(divider, val); =20 if (divider->lock) spin_unlock_irqrestore(divider->lock, flags); @@ -538,7 +556,7 @@ struct clk_hw *__clk_hw_register_divider(struct device = *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_divider *div; @@ -610,7 +628,7 @@ EXPORT_SYMBOL_GPL(__clk_hw_register_divider); struct clk *clk_register_divider_table(struct device *dev, const char *nam= e, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, + u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_hw *hw; @@ -664,7 +682,7 @@ struct clk_hw *__devm_clk_hw_register_divider(struct de= vice *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_hw **ptr, *hw; diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 68e585a02fd9..8a7e97e8dc73 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -24,20 +24,38 @@ * parent - fixed parent. No clk_set_parent support */ =20 -static inline u32 clk_gate_readl(struct clk_gate *gate) +static inline u32 clk_gate_read(struct clk_gate *gate) { - if (gate->flags & CLK_GATE_BIG_ENDIAN) - return ioread32be(gate->reg); - - return readl(gate->reg); + if (gate->flags & CLK_GATE_REG_8BIT) + return readb(gate->reg); + else if (gate->flags & CLK_GATE_REG_16BIT) { + if (gate->flags & CLK_GATE_BIG_ENDIAN) + return ioread16be(gate->reg); + else + return readw(gate->reg); + } else { + if (gate->flags & CLK_GATE_BIG_ENDIAN) + return ioread32be(gate->reg); + else + return readl(gate->reg); + } } =20 -static inline void clk_gate_writel(struct clk_gate *gate, u32 val) +static inline void clk_gate_write(struct clk_gate *gate, u32 val) { - if (gate->flags & CLK_GATE_BIG_ENDIAN) - iowrite32be(val, gate->reg); - else - writel(val, gate->reg); + if (gate->flags & CLK_GATE_REG_8BIT) + writeb(val, gate->reg); + else if (gate->flags & CLK_GATE_REG_16BIT) { + if (gate->flags & CLK_GATE_BIG_ENDIAN) + iowrite16be(val, gate->reg); + else + writew(val, gate->reg); + } else { + if (gate->flags & CLK_GATE_BIG_ENDIAN) + iowrite32be(val, gate->reg); + else + writel(val, gate->reg); + } } =20 /* @@ -72,7 +90,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int ena= ble) if (set) reg |=3D BIT(gate->bit_idx); } else { - reg =3D clk_gate_readl(gate); + reg =3D clk_gate_read(gate); =20 if (set) reg |=3D BIT(gate->bit_idx); @@ -80,7 +98,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int ena= ble) reg &=3D ~BIT(gate->bit_idx); } =20 - clk_gate_writel(gate, reg); + clk_gate_write(gate, reg); =20 if (gate->lock) spin_unlock_irqrestore(gate->lock, flags); @@ -105,7 +123,7 @@ int clk_gate_is_enabled(struct clk_hw *hw) u32 reg; struct clk_gate *gate =3D to_clk_gate(hw); =20 - reg =3D clk_gate_readl(gate); + reg =3D clk_gate_read(gate); =20 /* if a set bit disables this clk, flip it before masking */ if (gate->flags & CLK_GATE_SET_TO_DISABLE) @@ -143,6 +161,18 @@ struct clk_hw *__clk_hw_register_gate(struct device *d= ev, return ERR_PTR(-EINVAL); } } + if (clk_gate_flags & CLK_GATE_REG_16BIT) { + if (bit_idx > 15) { + pr_err("gate bit exceeds 16 bits\n"); + return ERR_PTR(-EINVAL); + } + } + if (clk_gate_flags & CLK_GATE_REG_8BIT) { + if (bit_idx > 7) { + pr_err("gate bit exceeds 8 bits\n"); + return ERR_PTR(-EINVAL); + } + } =20 /* allocate the gate */ gate =3D kzalloc(sizeof(*gate), GFP_KERNEL); diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index ace3a4ce2fc9..d9ae66caa3b7 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -508,12 +508,16 @@ void of_fixed_clk_setup(struct device_node *np); * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are us= ed for * the gate register. Setting this flag makes the register accesses big * endian. + * CLK_GATE_REG_8BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 8bit. + * CLK_GATE_REG_16BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 16bit. */ struct clk_gate { struct clk_hw hw; void __iomem *reg; u8 bit_idx; - u8 flags; + u32 flags; spinlock_t *lock; }; =20 @@ -522,6 +526,8 @@ struct clk_gate { #define CLK_GATE_SET_TO_DISABLE BIT(0) #define CLK_GATE_HIWORD_MASK BIT(1) #define CLK_GATE_BIG_ENDIAN BIT(2) +#define CLK_GATE_REG_8BIT BIT(3) +#define CLK_GATE_REG_16BIT BIT(4) =20 extern const struct clk_ops clk_gate_ops; struct clk_hw *__clk_hw_register_gate(struct device *dev, @@ -675,13 +681,17 @@ struct clk_div_table { * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are= used * for the divider register. Setting this flag makes the register accesses * big endian. + * CLK_DIVIDER_REG_8BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 8bit. + * CLK_DIVIDER_REG_16BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 16bit. */ struct clk_divider { struct clk_hw hw; void __iomem *reg; u8 shift; u8 width; - u8 flags; + u32 flags; const struct clk_div_table *table; spinlock_t *lock; }; @@ -697,6 +707,8 @@ struct clk_divider { #define CLK_DIVIDER_READ_ONLY BIT(5) #define CLK_DIVIDER_MAX_AT_ZERO BIT(6) #define CLK_DIVIDER_BIG_ENDIAN BIT(7) +#define CLK_DIVIDER_REG_8BIT BIT(8) +#define CLK_DIVIDER_REG_16BIT BIT(9) =20 extern const struct clk_ops clk_divider_ops; extern const struct clk_ops clk_divider_ro_ops; @@ -726,18 +738,18 @@ struct clk_hw *__clk_hw_register_divider(struct devic= e *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); struct clk_hw *__devm_clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); struct clk *clk_register_divider_table(struct device *dev, const char *nam= e, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, + u32 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); /** * clk_register_divider - register a divider clock with the clock framework --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47DB6C4167B for ; Tue, 5 Dec 2023 10:13:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235095AbjLEKNV (ORCPT ); Tue, 5 Dec 2023 05:13:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346488AbjLEJzo (ORCPT ); Tue, 5 Dec 2023 04:55:44 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 46630188; Tue, 5 Dec 2023 01:55:37 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 9AAAE1C05F8; Tue, 5 Dec 2023 18:46:31 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 15/37] clk: renesas: Add SH7750/7751 CPG Driver Date: Tue, 5 Dec 2023 18:45:34 +0900 Message-Id: <423773d9ae04d24c66d8b8b1a62804a6c288c7f0.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7750 and SH7751 series CPG driver. This driver supported frequency control and clock gating. Signed-off-by: Yoshinori Sato --- drivers/clk/renesas/Kconfig | 16 +- drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/clk-sh7750.c | 498 +++++++++++++++++++++++++++++++ 3 files changed, 513 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/renesas/clk-sh7750.c diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index 69396e197959..b1350cda7ade 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 =20 config CLK_RENESAS - bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS - default y if ARCH_RENESAS + bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS && !SUP= ERH + default y if ARCH_RENESAS || SUPERH select CLK_EMEV2 if ARCH_EMEV2 select CLK_RZA1 if ARCH_R7S72100 select CLK_R7S9210 if ARCH_R7S9210 @@ -40,6 +40,9 @@ config CLK_RENESAS select CLK_R9A08G045 if ARCH_R9A08G045 select CLK_R9A09G011 if ARCH_R9A09G011 select CLK_SH73A0 if ARCH_SH73A0 + select CLK_SH7750 if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7750S || \ + CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751 || \ + CPU_SUBTYPE_SH7751R =20 if CLK_RENESAS =20 @@ -193,6 +196,10 @@ config CLK_SH73A0 select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 =20 +config CLK_SH7750 + bool "SH7750/7751 family clock support" if COMPILE_TEST + help + This is a driver for SH7750 / SH7751 CPG. =20 # Family config CLK_RCAR_CPG_LIB @@ -223,6 +230,11 @@ config CLK_RZG2L bool "Renesas RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST select RESET_CONTROLLER =20 +config CLK_SH7750 + bool "Renesas SH7750/7751 family clock support" if COMPILE_TEST + help + This is a driver for SH7750 / SH7751 CPG. + # Generic config CLK_RENESAS_CPG_MSSR bool "CPG/MSSR clock support" if COMPILE_TEST diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index 879a07d445f9..233e029fcd54 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_CLK_R9A07G054) +=3D r9a07g044-cpg.o obj-$(CONFIG_CLK_R9A08G045) +=3D r9a08g045-cpg.o obj-$(CONFIG_CLK_R9A09G011) +=3D r9a09g011-cpg.o obj-$(CONFIG_CLK_SH73A0) +=3D clk-sh73a0.o +obj-$(CONFIG_CLK_SH7750) +=3D clk-sh7750.o =20 # Family obj-$(CONFIG_CLK_RCAR_CPG_LIB) +=3D rcar-cpg-lib.o diff --git a/drivers/clk/renesas/clk-sh7750.c b/drivers/clk/renesas/clk-sh7= 750.c new file mode 100644 index 000000000000..bd971e9a8869 --- /dev/null +++ b/drivers/clk/renesas/clk-sh7750.c @@ -0,0 +1,498 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas SH7750/51 CPG driver + * + * Copyright 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include + +/* PCLK divide rate selector */ +static const struct clk_div_table pdiv_table[] =3D { + { .val =3D 0, .div =3D 2, }, + { .val =3D 1, .div =3D 3, }, + { .val =3D 2, .div =3D 4, }, + { .val =3D 3, .div =3D 6, }, + { .val =3D 4, .div =3D 8, }, + { } +}; + +/* ICLK and BCLK divide rate selector */ +static const struct clk_div_table div_table[] =3D { + { .val =3D 0, .div =3D 1, }, + { .val =3D 1, .div =3D 2, }, + { .val =3D 2, .div =3D 3, }, + { .val =3D 3, .div =3D 4, }, + { .val =3D 4, .div =3D 6, }, + { .val =3D 5, .div =3D 8, }, + { } +}; + +struct cpg_priv { + struct clk_hw hw; + spinlock_t clklock; + void __iomem *frqcr; + void __iomem *clkstp00; + u32 mode; + u32 feat; +}; + +/* CPG feature flag */ +#define CPG_DIV1 BIT(0) /* 7750, 7750S, 7751 */ +#define MSTP_CR2 BIT(1) /* 7750S, 7750R, 7751, 7751R */ +#define MSTP_CLKSTP BIT(2) /* 7750R, 7751, 7751R */ +#define MSTP_CSTP2 BIT(3) /* 7751, 7751R */ + +enum { + CPG_SH7750, + CPG_SH7750S, + CPG_SH7750R, + CPG_SH7751, + CPG_SH7751R, +}; + +static const u32 cpg_feature[] =3D { + [CPG_SH7750] =3D CPG_DIV1, + [CPG_SH7750S] =3D CPG_DIV1 | MSTP_CR2, + [CPG_SH7750R] =3D MSTP_CR2 | MSTP_CLKSTP, + [CPG_SH7751] =3D CPG_DIV1 | MSTP_CR2 | MSTP_CLKSTP | MSTP_CSTP2, + [CPG_SH7751R] =3D MSTP_CR2 | MSTP_CLKSTP | MSTP_CSTP2, +}; + +enum clk_type {CLK_DIV, CLK_STBCR, CLK_STBCR2, CLK_CLKSTP00}; + +enum { + FRQCR =3D 0, + STBCR =3D 4, + WTCNT =3D 8, + WTCSR =3D 12, + STBCR2 =3D 16, + CLKSTP00 =3D 0, + CLKSTPCLR00 =3D 8, +}; + +static struct cpg_priv *cpg_data; + +#define to_priv(_hw) container_of(_hw, struct cpg_priv, hw) + +#define FRQCR_PLL1EN BIT(10) +static const unsigned int pll1mult[] =3D { 12, 12, 6, 12, 6, 12, 1}; + +static unsigned long pll_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct cpg_priv *cpg =3D to_priv(hw); + unsigned long rate =3D parent_rate; + u16 frqcr; + + frqcr =3D ioread16(cpg->frqcr); + if (frqcr & FRQCR_PLL1EN) { + rate *=3D pll1mult[cpg->mode]; + if (cpg->mode < 6 && (cpg->feat & CPG_DIV1)) + rate /=3D 2; + } + return rate; +} + +static void get_round_rate(struct cpg_priv *cpg, + unsigned long *out, bool *pllen, + unsigned long rate, unsigned long prate) +{ + long pllout, res; + bool pll; + + if (cpg->mode < 6 && (cpg->feat & CPG_DIV1)) + prate /=3D 2; + + pllout =3D prate * pll1mult[cpg->mode]; + if (abs(pllout - rate) > abs(prate - rate)) { + res =3D prate; + pll =3D false; + } else { + res =3D pllout; + pll =3D true; + } + if (out) + *out =3D res; + if (pllen) + *pllen =3D pll; +} + +static int pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *= req) +{ + struct cpg_priv *cpg =3D to_priv(hw); + + get_round_rate(cpg, &req->rate, NULL, req->rate, req->best_parent_rate); + return 0; +} + +static int pll_set_rate(struct clk_hw *hw, + unsigned long rate, unsigned long prate) +{ + struct cpg_priv *cpg =3D to_priv(hw); + bool oldpll, newpll; + u16 frqcr; + + frqcr =3D ioread16(cpg->frqcr); + get_round_rate(cpg, NULL, &newpll, rate, prate); + oldpll =3D frqcr & FRQCR_PLL1EN; + frqcr &=3D ~FRQCR_PLL1EN; + + if (newpll) { + frqcr |=3D FRQCR_PLL1EN; + if (!oldpll) { + /* set PLL wakeup delay time */ + iowrite16(0xa500, cpg->frqcr + WTCNT); + iowrite16(0xa507, cpg->frqcr + WTCNT); + iowrite16(0x5a00, cpg->frqcr + WTCSR); + } + } + iowrite16(frqcr, cpg->frqcr); + + /* Test for new PLL state */ + frqcr =3D ioread16(cpg->frqcr); + oldpll =3D frqcr & FRQCR_PLL1EN; + return !(oldpll =3D=3D newpll); +} + +static const struct clk_ops pll_ops =3D { + .recalc_rate =3D pll_recalc_rate, + .determine_rate =3D pll_determine_rate, + .set_rate =3D pll_set_rate, +}; + +#define PLLOUT "pllout" + +static int register_pll(struct device_node *node, struct cpg_priv *cpg) +{ + const char *clk_name =3D node->name; + const char *parent_name; + struct clk_init_data init =3D { + .name =3D PLLOUT, + .ops =3D &pll_ops, + .flags =3D 0, + .num_parents =3D 1, + }; + int ret; + + parent_name =3D of_clk_get_parent_name(node, 0); + init.parent_names =3D &parent_name; + cpg->hw.init =3D &init; + + ret =3D of_clk_hw_register(node, &cpg->hw); + if (ret < 0) { + pr_err("%s: failed to register %s pll clock (%d)\n", + __func__, clk_name, ret); + return ret; + } + if (ret < 0) + pr_err("%s: failed to add provider %s (%d)\n", + __func__, clk_name, ret); + return ret; +} + +static void clkstp00_sw(struct clk_hw *hw, bool on) +{ + u32 val; + struct clk_gate *gate =3D to_clk_gate(hw); + + val =3D BIT(gate->bit_idx); + if (on) + writel(val, gate->reg + CLKSTPCLR00); + else + writel(val, gate->reg); +} + +static int clkstp00_enable(struct clk_hw *hw) +{ + clkstp00_sw(hw, true); + return 0; +} + +static void clkstp00_disable(struct clk_hw *hw) +{ + clkstp00_sw(hw, false); +} + +static int clkstp00_is_enabled(struct clk_hw *hw) +{ + u8 val; + struct clk_gate *gate =3D to_clk_gate(hw); + + val =3D readb(gate->reg); + val &=3D 1 << gate->bit_idx; + return val =3D=3D 0; +} + +static const struct clk_ops gate_clkstp00_ops =3D { + .enable =3D clkstp00_enable, + .disable =3D clkstp00_disable, + .is_enabled =3D clkstp00_is_enabled, +}; + +static struct clk_hw *clk_hw_register_clkstp(struct device_node *node, + const char *name, + const char *parent, + void __iomem *reg, int bit, + spinlock_t *lock) +{ + struct clk_gate *gate; + struct clk_init_data init =3D { + .name =3D name, + .ops =3D &gate_clkstp00_ops, + .flags =3D 0, + .parent_names =3D &parent, + .num_parents =3D 1, + }; + struct clk_hw *hw; + int ret; + + gate =3D kzalloc(sizeof(*gate), GFP_KERNEL); + if (gate =3D=3D NULL) + goto error; + gate->reg =3D reg; + gate->bit_idx =3D bit; + gate->flags =3D 0; + gate->lock =3D lock; + gate->hw.init =3D &init; + hw =3D &gate->hw; + ret =3D of_clk_hw_register(node, hw); + if (ret < 0) + goto error; + return hw; +error: + kfree(gate); + return ERR_PTR(ret); +} + +static int register_div(struct device_node *node, struct cpg_priv *cpg) +{ + static const char * const divout[] =3D { + "fck", "bck", "ick", + }; + static const char * const stbcrout[] =3D { + "sci_clk", "rtc_clk", "tmu012_clk", /* STBCR */ + "scif_clk", "dmac_clk", /* STBCR */ + "ubc_clk", "sq_clk", /* STBCR2 */ + }; + static const char * const clkstpout[] =3D { + "intc_clk", "tmu34_clk", "pcic_clk", /* CLKSTP00 */ + }; + + unsigned int i; + int ret; + struct clk_hw_onecell_data *data; + struct clk_hw *reg_hw; + int num_clk =3D ARRAY_SIZE(divout) + ARRAY_SIZE(stbcrout) + ARRAY_SIZE(cl= kstpout); + + data =3D kzalloc(struct_size(data, hws, num_clk + 1), GFP_KERNEL); + if (!data) + return -ENOMEM; + + num_clk =3D 0; + for (i =3D 0; i < ARRAY_SIZE(divout); i++) { + reg_hw =3D __clk_hw_register_divider(NULL, node, divout[i], + PLLOUT, NULL, NULL, + 0, cpg->frqcr, i * 3, 3, + CLK_DIVIDER_REG_16BIT, + (i =3D=3D 0) ? pdiv_table : div_table, + &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret =3D PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] =3D reg_hw; + } + for (i =3D 0; i < ARRAY_SIZE(stbcrout); i++) { + u32 off =3D (i < 5) ? STBCR : STBCR2; + + if (i >=3D 5 && !(cpg->feat & MSTP_CR2)) + break; + reg_hw =3D __clk_hw_register_gate(NULL, node, stbcrout[i], + divout[0], NULL, NULL, + 0, cpg->frqcr + off, i % 5, + CLK_GATE_REG_8BIT | CLK_GATE_SET_TO_DISABLE, + &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret =3D PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] =3D reg_hw; + } + if (cpg->feat & MSTP_CLKSTP) { + for (i =3D 0; i < ARRAY_SIZE(clkstpout); i++) { + if (i =3D=3D 2 && !(cpg->feat & MSTP_CSTP2)) + continue; + reg_hw =3D clk_hw_register_clkstp(node, clkstpout[i], + divout[0], cpg->clkstp00, + i, &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret =3D PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] =3D reg_hw; + } + } + data->num =3D num_clk; + ret =3D of_clk_add_hw_provider(node, of_clk_hw_onecell_get, data); + if (ret < 0) + goto error; + return 0; + +error: + pr_err("%pOF: failed to register clock (%d)\n", + node, ret); + for (num_clk--; num_clk >=3D 0; num_clk--) + kfree(data->hws[num_clk]); + kfree(data); + return ret; +} + +static struct cpg_priv *sh7750_cpg_setup(struct device_node *node, u32 fea= t) +{ + unsigned int num_parents; + u32 mode; + struct cpg_priv *cpg; + int ret =3D 0; + + num_parents =3D of_clk_get_parent_count(node); + if (num_parents < 1) { + pr_err("%s: no parent found", node->name); + return ERR_PTR(-ENODEV); + } + + of_property_read_u32_index(node, "renesas,mode", 0, &mode); + if (mode >=3D 7) { + pr_err("%s: Invalid clock mode setting (%u)\n", + node->name, mode); + return ERR_PTR(-EINVAL); + } + + cpg =3D kzalloc(sizeof(struct cpg_priv), GFP_KERNEL); + if (!cpg) + return ERR_PTR(-ENOMEM); + + cpg->frqcr =3D of_iomap(node, 0); + if (cpg->frqcr =3D=3D NULL) { + pr_err("%pOF: failed to map divide register", node); + ret =3D -ENODEV; + goto cpg_free; + } + + if (feat & MSTP_CLKSTP) { + cpg->clkstp00 =3D of_iomap(node, 1); + if (cpg->clkstp00 =3D=3D NULL) { + pr_err("%pOF: failed to map clkstp00 register", node); + ret =3D -ENODEV; + goto unmap_frqcr; + } + } + cpg->feat =3D feat; + cpg->mode =3D mode; + + ret =3D register_pll(node, cpg); + if (ret < 0) + goto unmap_clkstp00; + + ret =3D register_div(node, cpg); + if (ret < 0) + goto unmap_clkstp00; + + return cpg; + +unmap_clkstp00: + iounmap(cpg->clkstp00); +unmap_frqcr: + iounmap(cpg->frqcr); +cpg_free: + kfree(cpg); + return ERR_PTR(ret); +} + +static void __init sh7750_cpg_init(struct device_node *node) +{ + cpg_data =3D sh7750_cpg_setup(node, cpg_feature[CPG_SH7750]); + if (IS_ERR(cpg_data)) + cpg_data =3D NULL; +} + +static void __init sh7750s_cpg_init(struct device_node *node) +{ + cpg_data =3D sh7750_cpg_setup(node, cpg_feature[CPG_SH7750S]); + if (IS_ERR(cpg_data)) + cpg_data =3D NULL; +} + +static void __init sh7750r_cpg_init(struct device_node *node) +{ + cpg_data =3D sh7750_cpg_setup(node, cpg_feature[CPG_SH7750R]); + if (IS_ERR(cpg_data)) + cpg_data =3D NULL; +} + +static void __init sh7751_cpg_init(struct device_node *node) +{ + cpg_data =3D sh7750_cpg_setup(node, cpg_feature[CPG_SH7751]); + if (IS_ERR(cpg_data)) + cpg_data =3D NULL; +} + +static void __init sh7751r_cpg_init(struct device_node *node) +{ + cpg_data =3D sh7750_cpg_setup(node, cpg_feature[CPG_SH7751R]); + if (IS_ERR(cpg_data)) + cpg_data =3D NULL; +} + +CLK_OF_DECLARE_DRIVER(sh7750_cpg, "renesas,sh7750-cpg", + sh7750_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7750s_cpg, "renesas,sh7750s-cpg", + sh7750s_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7750r_cpg, "renesas,sh7750r-cpg", + sh7750r_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7751_cpg, "renesas,sh7751-cpg", + sh7751_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7751r_cpg, "renesas,sh7751r-cpg", + sh7751r_cpg_init); + +static int sh7750_cpg_probe(struct platform_device *pdev) +{ + u32 feature; + + if (cpg_data) + return 0; + feature =3D *(u32 *)of_device_get_match_data(&pdev->dev); + cpg_data =3D sh7750_cpg_setup(pdev->dev.of_node, feature); + if (IS_ERR(cpg_data)) + return PTR_ERR(cpg_data); + return 0; +} + +static const struct of_device_id sh7750_cpg_of_match[] =3D { + { .compatible =3D "renesas,sh7750-cpg", + .data =3D &cpg_feature[CPG_SH7750] }, + { .compatible =3D "renesas,sh7750s-cpg", + .data =3D &cpg_feature[CPG_SH7750S] }, + { .compatible =3D "renesas,sh7750r-cpg", + .data =3D &cpg_feature[CPG_SH7750R] }, + { .compatible =3D "renesas,sh7751-cpg", + .data =3D &cpg_feature[CPG_SH7751] }, + { .compatible =3D "renesas,sh7751r-cpg", + .data =3D &cpg_feature[CPG_SH7751R] }, + { } +}; + +static struct platform_driver sh7750_cpg_driver =3D { + .probe =3D sh7750_cpg_probe, + .driver =3D { + .name =3D "sh7750-cpg", + .of_match_table =3D sh7750_cpg_of_match, + }, +}; +builtin_platform_driver(sh7750_cpg_driver); --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 184E7C4167B for ; Tue, 5 Dec 2023 10:13:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346600AbjLEKNH (ORCPT ); Tue, 5 Dec 2023 05:13:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346471AbjLEJzn (ORCPT ); Tue, 5 Dec 2023 04:55:43 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id BB523A0; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 982C11C0642; Tue, 5 Dec 2023 18:46:33 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 16/37] irqchip: Add SH7751 INTC driver Date: Tue, 5 Dec 2023 18:45:35 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 Internal interrupt controller driver. Signed-off-by: Yoshinori Sato --- drivers/irqchip/Kconfig | 8 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-renesas-sh7751.c | 290 +++++++++++++++++++++++++++ 3 files changed, 299 insertions(+) create mode 100644 drivers/irqchip/irq-renesas-sh7751.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index f7149d0f3d45..658523f65b1d 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -679,4 +679,12 @@ config SUNPLUS_SP7021_INTC chained controller, routing all interrupt source in P-Chip to the primary controller on C-Chip. =20 +config RENESAS_SH7751_INTC + bool "Renesas SH7751 Interrupt Controller" + depends on SH_DEVICE_TREE || COMPILE_TEST + select IRQ_DOMAIN_HIERARCHY + help + Support for the Renesas SH7751 On-chip interrupt controller. + And external interrupt encoder for some targets. + endmenu diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index ffd945fe71aa..26c91d075e25 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -120,3 +120,4 @@ obj-$(CONFIG_IRQ_IDT3243X) +=3D irq-idt3243x.o obj-$(CONFIG_APPLE_AIC) +=3D irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) +=3D irq-mchp-eic.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) +=3D irq-sp7021-intc.o +obj-$(CONFIG_RENESAS_SH7751_INTC) +=3D irq-renesas-sh7751.o diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-ren= esas-sh7751.c new file mode 100644 index 000000000000..2a5cb2444d99 --- /dev/null +++ b/drivers/irqchip/irq-renesas-sh7751.c @@ -0,0 +1,290 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas SH7751 interrupt controller driver + * + * Copyright 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include + +struct ipr { + unsigned int off; + unsigned int idx; +}; + +struct sh7751_intc_priv { + void __iomem *base; + void __iomem *intpri00; + struct ipr *iprmap[2]; + bool irlm; +}; + +enum { + R_ICR =3D 0x00, + R_IPR =3D 0x04, + R_INTPRI00 =3D 0x00, + R_INTREQ00 =3D 0x20, + R_INTMSK00 =3D 0x40, + R_INTMSKCLR00 =3D 0x60, +}; + +#define ICR_IRLM BIT(7) + +/* + * SH7751 IRQ mapping + * IRQ16 - 63: Group0 - IPRA to IPRD + * IRQ16 - 31: external IRL input (ICR.IRLM is 0) + * IRQ80 - 92: Group1 - INTPRI00 + */ +#define IRQ_START 16 +#define MAX_IRL (IRQ_START + NR_IRL) +#define GRP0_IRQ_END 63 +#define GRP1_IRQ_START 80 +#define IRQ_END 92 + +#define NR_IPRMAP0 (GRP0_IRQ_END - IRQ_START + 1) +#define NR_IPRMAP1 (IRQ_END - GRP1_IRQ_START) +#define IPR_PRI_MASK 0x000f + +/* + * IPR registers have 4bit priority x 4 entry (16bits) + * Interrupts can be masked by setting pri to 0. + */ +static void update_ipr(struct sh7751_intc_priv *priv, unsigned int irq, u1= 6 pri) +{ + struct ipr *ipr =3D NULL; + void __iomem *ipr_base; + unsigned int offset; + u16 mask; + + if (irq < GRP1_IRQ_START) { + /* Group0 */ + ipr =3D priv->iprmap[0]; + ipr +=3D irq - IRQ_START; + ipr_base =3D priv->base + R_IPR; + offset =3D ipr->off; + } else { + /* Group1 */ + ipr =3D priv->iprmap[1]; + ipr +=3D irq - GRP1_IRQ_START; + ipr_base =3D priv->intpri00; + offset =3D ipr->off - INTPRI00; + } + if (ipr->off !=3D ~0) { + mask =3D ~(IPR_PRI_MASK << ipr->idx); + pri =3D (pri & IPR_PRI_MASK) << ipr->idx; + mask &=3D __raw_readw(ipr_base + offset); + __raw_writew(mask | pri, ipr_base + offset); + } else { + pr_warn_once("%s: undefined IPR in irq %u\n", __FILE__, irq); + } +} + +static inline bool is_valid_irq(unsigned int irq) +{ + /* IRQ16 - 63 */ + if (irq >=3D IRQ_START && irq < IRQ_START + NR_IPRMAP0) + return true; + /* IRQ80 - 92 */ + if (irq >=3D GRP1_IRQ_START && irq <=3D IRQ_END) + return true; + return false; +} + +static inline struct sh7751_intc_priv *irq_data_to_priv(struct irq_data *d= ata) +{ + return data->domain->host_data; +} + +static void endisable_irq(struct irq_data *data, int enable) +{ + struct sh7751_intc_priv *priv; + unsigned int irq; + + priv =3D irq_data_to_priv(data); + + irq =3D irqd_to_hwirq(data); + if (!is_valid_irq(irq)) { + /* IRQ out of range */ + pr_warn_once("%s: IRQ %u is out of range\n", __FILE__, irq); + return; + } + + if (irq <=3D MAX_IRL && !priv->irlm) + /* IRL encoded external interrupt */ + /* disable for SR.IMASK */ + update_sr_imask(irq - IRQ_START, enable); + else + /* Internal peripheral interrupt */ + /* mask for IPR priority 0 */ + update_ipr(priv, irq, enable); +} + +static void sh7751_mask_irq(struct irq_data *data) +{ + endisable_irq(data, 0); +} + +static void sh7751_unmask_irq(struct irq_data *data) +{ + endisable_irq(data, 1); +} + +static const struct irq_chip sh7751_irq_chip =3D { + .name =3D "SH7751-INTC", + .irq_unmask =3D sh7751_unmask_irq, + .irq_mask =3D sh7751_mask_irq, +}; + +static int irq_sh7751_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw_irq_num) +{ + irq_set_chip_and_handler(virq, &sh7751_irq_chip, handle_level_irq); + irq_get_irq_data(virq)->chip_data =3D h->host_data; + irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE); + return 0; +} +static const struct irq_domain_ops irq_ops =3D { + .map =3D irq_sh7751_map, + .xlate =3D irq_domain_xlate_onecell, +}; + +static int __init load_ipr_map(struct device_node *intc, + struct sh7751_intc_priv *priv) +{ + struct property *ipr_map; + unsigned int num_ipr, i; + struct ipr *ipr; + const __be32 *p; + u32 irq; + + ipr_map =3D of_find_property(intc, "renesas,ipr-map", &num_ipr); + if (IS_ERR(ipr_map)) + return PTR_ERR(ipr_map); + num_ipr /=3D sizeof(u32); + /* 3words per entry. */ + if (num_ipr % 3) + goto error1; + num_ipr /=3D 3; + if (num_ipr >=3D NR_IPRMAP0 + NR_IPRMAP1) + goto error1; + + /* Allocate map array and fill in unassigned */ + priv->iprmap[0] =3D kmalloc_array(NR_IPRMAP0, sizeof(struct ipr), GFP_KER= NEL); + if (priv->iprmap[0] =3D=3D NULL) + return -ENOMEM; + memset(priv->iprmap[0], ~0, NR_IPRMAP0 * sizeof(struct ipr)); + priv->iprmap[1] =3D kmalloc_array(NR_IPRMAP1, sizeof(struct ipr), GFP_KER= NEL); + if (priv->iprmap[1] =3D=3D NULL) { + kfree(priv->iprmap[0]); + return -ENOMEM; + } + memset(priv->iprmap[1], ~0, NR_IPRMAP1 * sizeof(struct ipr)); + + p =3D NULL; + for (; num_ipr > 0; num_ipr--) { + /* 1st word - INTEVT code */ + p =3D of_prop_next_u32(ipr_map, p, &irq); + if (!p) + goto error; + irq =3D evt2irq(irq); + if (!is_valid_irq(irq)) + goto error; + if (irq < GRP1_IRQ_START) { + ipr =3D priv->iprmap[0]; + irq -=3D IRQ_START; + } else { + ipr =3D priv->iprmap[1]; + irq -=3D GRP1_IRQ_START; + } + ipr +=3D irq; + /* 2nd word - IPR register offset */ + p =3D of_prop_next_u32(ipr_map, p, &ipr->off); + /* 3rd word - IPR register bit indx */ + p =3D of_prop_next_u32(ipr_map, p, &ipr->idx); + + if ((ipr->off !=3D INTPRI00 && ipr->off > IPRD) || + ipr->idx > IPR_B12) + goto error; + } + + for (ipr =3D priv->iprmap[0], i =3D 0; i < NR_IPRMAP0; ipr++, i++) { + if (ipr->off !=3D ~0) { + pr_debug("INTEVT=3D%04x (%u) reg=3DIPR%c idx=3D%u\n", + irq2evt(i + IRQ_START), i + IRQ_START, + 'A' + ipr->off / 4, ipr->idx); + } + } + for (ipr =3D priv->iprmap[1], i =3D 0; i < NR_IPRMAP1; ipr++, i++) { + if (ipr->off !=3D ~0) { + pr_debug("INTEVT=3D%04x (%u) reg=3DINTPRI00 idx=3D%u\n", + irq2evt(i + GRP1_IRQ_START), i + GRP1_IRQ_START, + ipr->idx); + } + } + return 0; +error: + kfree(priv->iprmap[0]); + kfree(priv->iprmap[1]); +error1: + pr_err("%pOFP: Failed to load renesas,ipr-map\n", intc); + return -EINVAL; +} + +static int __init sh7751_intc_of_init(struct device_node *intc, + struct device_node *parent) +{ + struct sh7751_intc_priv *priv; + void __iomem *base, *base2; + struct irq_domain *domain; + u16 icr; + int ret; + + base =3D of_iomap(intc, 0); + base2 =3D of_iomap(intc, 1); + if (!base || !base2) { + pr_err("%pOFP: Invalid register definition\n", intc); + return -EINVAL; + } + + priv =3D kzalloc(sizeof(struct sh7751_intc_priv), GFP_KERNEL); + if (priv =3D=3D NULL) + return -ENOMEM; + + ret =3D load_ipr_map(intc, priv); + if (ret < 0) { + kfree(priv); + return ret; + } + + priv->base =3D base; + priv->intpri00 =3D base2; + + if (of_property_read_bool(intc, "renesas,irlm")) { + priv->irlm =3D true; + icr =3D __raw_readw(priv->base + R_ICR); + icr |=3D ICR_IRLM; + __raw_writew(icr, priv->base + R_ICR); + } + + domain =3D irq_domain_add_linear(intc, NR_IRQS, &irq_ops, priv); + if (domain =3D=3D NULL) { + pr_err("%pOFP: cannot initialize irq domain\n", intc); + kfree(priv); + return -ENOMEM; + } + + irq_set_default_host(domain); + pr_info("%pOFP: SH7751 Interrupt controller (%s external IRQ)", + intc, priv->irlm ? "4 lines" : "15 level"); + return 0; +} + +IRQCHIP_DECLARE(sh_7751_intc, + "renesas,sh7751-intc", sh7751_intc_of_init); --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB482C4167B for ; Tue, 5 Dec 2023 10:12:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235026AbjLEKMp (ORCPT ); Tue, 5 Dec 2023 05:12:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344941AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 36193135; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id C45C01C05EE; Tue, 5 Dec 2023 18:46:35 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 17/37] dt-bindings: interrupt-controller: renesas,sh7751-intc: Add json-schema Date: Tue, 5 Dec 2023 18:45:36 +0900 Message-Id: <1fafcf1c70ee4e38847bac1379bcb4555a237505.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 INTC json-schema. Signed-off-by: Yoshinori Sato --- .../renesas,sh7751-intc.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= renesas,sh7751-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas= ,sh7751-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/= renesas,sh7751-intc.yaml new file mode 100644 index 000000000000..9d05c10f5c32 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751= -intc.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-int= c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 Interrupt Controller + +maintainers: + - Yoshinori Sato + +properties: + compatible: + items: + - const: renesas,sh7751-intc + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + reg: + maxItems: 2 + + reg-names: + items: + - const: ICR + - const: INTPRI00 + + renesas,icr-irlm: + type: boolean + description: If true ICR.IRLM=3D1 + + renesas,ipr-map: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + IRQ to IPR mapping definition. + 1st - INTEVT + 2nd - Register + 3rd - bit index + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + - reg + - reg-names + - renesas,ipr-map + +additionalProperties: false + +examples: + - | + #include + shintc: interrupt-controller@ffd00000 { + compatible =3D "renesas,sh7751-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + reg =3D <0xffd00000 14>, <0xfe080000 128>; + reg-names =3D "ICR", "INTPRI00"; + renesas,ipr-map =3D <0x240 IPRD IPR_B12>, /* IRL0 */ + <0x2a0 IPRD IPR_B8>, /* IRL1 */ + <0x300 IPRD IPR_B4>, /* IRL2 */ + <0x360 IPRD IPR_B0>, /* IRL3 */ + <0x400 IPRA IPR_B12>, /* TMU0 */ + <0x420 IPRA IPR_B8>, /* TMU1 */ + <0x440 IPRA IPR_B4>, /* TMU2 TNUI */ + <0x460 IPRA IPR_B4>, /* TMU2 TICPI */ + <0x480 IPRA IPR_B0>, /* RTC ATI */ + <0x4a0 IPRA IPR_B0>, /* RTC PRI */ + <0x4c0 IPRA IPR_B0>, /* RTC CUI */ + <0x4e0 IPRB IPR_B4>, /* SCI ERI */ + <0x500 IPRB IPR_B4>, /* SCI RXI */ + <0x520 IPRB IPR_B4>, /* SCI TXI */ + <0x540 IPRB IPR_B4>, /* SCI TEI */ + <0x560 IPRB IPR_B12>, /* WDT */ + <0x580 IPRB IPR_B8>, /* REF RCMI */ + <0x5a0 IPRB IPR_B4>, /* REF ROVI */ + <0x600 IPRC IPR_B0>, /* H-UDI */ + <0x620 IPRC IPR_B12>, /* GPIO */ + <0x640 IPRC IPR_B8>, /* DMAC DMTE0 */ + <0x660 IPRC IPR_B8>, /* DMAC DMTE1 */ + <0x680 IPRC IPR_B8>, /* DMAC DMTE2 */ + <0x6a0 IPRC IPR_B8>, /* DMAC DMTE3 */ + <0x6c0 IPRC IPR_B8>, /* DMAC DMAE */ + <0x700 IPRC IPR_B4>, /* SCIF ERI */ + <0x720 IPRC IPR_B4>, /* SCIF RXI */ + <0x740 IPRC IPR_B4>, /* SCIF BRI */ + <0x760 IPRC IPR_B4>, /* SCIF TXI */ + <0x780 IPRC IPR_B8>, /* DMAC DMTE4 */ + <0x7a0 IPRC IPR_B8>, /* DMAC DMTE5 */ + <0x7c0 IPRC IPR_B8>, /* DMAC DMTE6 */ + <0x7e0 IPRC IPR_B8>, /* DMAC DMTE7 */ + <0xa00 INTPRI00 IPR_B0>, /* PCIC PCISER= R */ + <0xa20 INTPRI00 IPR_B4>, /* PCIC PCIDMA= 3 */ + <0xa40 INTPRI00 IPR_B4>, /* PCIC PCIDMA= 2 */ + <0xa60 INTPRI00 IPR_B4>, /* PCIC PCIDMA= 1 */ + <0xa80 INTPRI00 IPR_B4>, /* PCIC PCIDMA= 0 */ + <0xaa0 INTPRI00 IPR_B4>, /* PCIC PCIPWO= N */ + <0xac0 INTPRI00 IPR_B4>, /* PCIC PCIPWD= WN */ + <0xae0 INTPRI00 IPR_B4>, /* PCIC PCIERR= */ + <0xb00 INTPRI00 IPR_B8>, /* TMU3 */ + <0xb80 INTPRI00 IPR_B12>; /* TMU4 */ + }; +... --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 288AFC4167B for ; Tue, 5 Dec 2023 10:13:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346535AbjLEKNE (ORCPT ); Tue, 5 Dec 2023 05:13:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344954AbjLEJzb (ORCPT ); Tue, 5 Dec 2023 04:55:31 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 362BA181; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id CD2461C058F; Tue, 5 Dec 2023 18:46:37 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 18/37] irqchip: SH7751 IRL external encoder with enable gate. Date: Tue, 5 Dec 2023 18:45:37 +0900 Message-Id: <16941383a95369b239f7e913cf00ccd0c2e5c954.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" SH7751 have 15 level external interrupt. It is typically connected to the CPU through a priority encoder that can suppress requests. This driver provides a way to control those hardware with irqchip. Signed-off-by: Yoshinori Sato --- drivers/irqchip/Kconfig | 7 + drivers/irqchip/Makefile | 2 + drivers/irqchip/irq-renesas-sh7751irl.c | 227 ++++++++++++++++++++++++ 3 files changed, 236 insertions(+) create mode 100644 drivers/irqchip/irq-renesas-sh7751irl.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 658523f65b1d..2a061c01f381 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -687,4 +687,11 @@ config RENESAS_SH7751_INTC Support for the Renesas SH7751 On-chip interrupt controller. And external interrupt encoder for some targets. =20 +config RENESAS_SH7751IRL_INTC + bool "Renesas SH7751 based target IRL encoder support." + depends on RENESAS_SH7751_INTC + help + Support for External Interrupt encoder + on the some Renesas SH7751 based target. + endmenu diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 26c91d075e25..91df16726b1f 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -121,3 +121,5 @@ obj-$(CONFIG_APPLE_AIC) +=3D irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) +=3D irq-mchp-eic.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) +=3D irq-sp7021-intc.o obj-$(CONFIG_RENESAS_SH7751_INTC) +=3D irq-renesas-sh7751.o +obj-$(CONFIG_RENESAS_SH7751IRL_INTC) +=3D irq-renesas-sh7751irl.o + diff --git a/drivers/irqchip/irq-renesas-sh7751irl.c b/drivers/irqchip/irq-= renesas-sh7751irl.c new file mode 100644 index 000000000000..99ee5bf9fb1e --- /dev/null +++ b/drivers/irqchip/irq-renesas-sh7751irl.c @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SH7751 based board IRL encoder driver + * (Renesas RTS7751R2D / IO DATA DEVICE LANDISK, USL-5P) + * + * Copyright (C) 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct sh7751irl_intc_priv { + struct irq_domain *irq_domain; + void __iomem *base; + unsigned int width; + bool invert; + u32 enable_bit[NR_IRL]; +}; + +static inline unsigned long get_reg(void __iomem *addr, unsigned int w) +{ + switch (w) { + case 8: + return __raw_readb(addr); + case 16: + return __raw_readw(addr); + case 32: + return __raw_readl(addr); + default: + /* The size is checked when reading the properties. */ + pr_err("%s: Invalid width %d", __FILE__, w); + return 0; + } +} + +static inline void set_reg(void __iomem *addr, unsigned int w, unsigned lo= ng val) +{ + switch (w) { + case 8: + __raw_writeb(val, addr); + break; + case 16: + __raw_writew(val, addr); + break; + case 32: + __raw_writel(val, addr); + break; + default: + pr_err("%s: Invalid width %d", __FILE__, w); + } +} + +static inline struct sh7751irl_intc_priv *irq_data_to_priv(struct irq_data= *data) +{ + return data->domain->host_data; +} + +static void irl_endisable(struct irq_data *data, unsigned int enable) +{ + struct sh7751irl_intc_priv *priv; + unsigned long val; + unsigned int irl; + + priv =3D irq_data_to_priv(data); + irl =3D irqd_to_hwirq(data) - IRL_BASE_IRQ; + + if (irl < NR_IRL && priv->enable_bit[irl] < priv->width) { + if (priv->invert) + enable =3D !enable; + + val =3D get_reg(priv->base, priv->width); + if (enable) + set_bit(priv->enable_bit[irl], &val); + else + clear_bit(priv->enable_bit[irl], &val); + set_reg(priv->base, priv->width, val); + } else { + pr_err("%s: Invalid register define in IRL %u", __FILE__, irl); + } +} + +static void sh7751irl_intc_disable_irq(struct irq_data *data) +{ + irl_endisable(data, 0); +} + +static void sh7751irl_intc_enable_irq(struct irq_data *data) +{ + irl_endisable(data, 1); +} + +static struct irq_chip sh7751irl_intc_chip =3D { + .name =3D "SH7751IRL-INTC", + .irq_enable =3D sh7751irl_intc_enable_irq, + .irq_disable =3D sh7751irl_intc_disable_irq, +}; + +static int sh7751irl_intc_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw_irq_num) +{ + irq_set_chip_and_handler(virq, &sh7751irl_intc_chip, handle_level_irq); + irq_get_irq_data(virq)->chip_data =3D h->host_data; + irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE); + return 0; +} + +static int sh7751irl_intc_translate(struct irq_domain *domain, + struct irq_fwspec *fwspec, unsigned long *hwirq, + unsigned int *type) +{ + if (fwspec->param[0] > NR_IRL) + return -EINVAL; + + switch (fwspec->param_count) { + case 2: + *type =3D fwspec->param[1]; + fallthrough; + case 1: + *hwirq =3D fwspec->param[0] + IRL_BASE_IRQ; + break; + default: + return -EINVAL; + } + return 0; +} + +static const struct irq_domain_ops sh7751irl_intc_domain_ops =3D { + .map =3D sh7751irl_intc_map, + .translate =3D sh7751irl_intc_translate, +}; + +static int __init load_irq_bit(struct device_node *node, struct sh7751irl_= intc_priv *priv) +{ + struct property *enable_map; + const __be32 *p; + u32 nr_bits; + u32 irl; + int ret; + + /* Fill in unused */ + memset(priv->enable_bit, ~0, sizeof(priv->enable_bit)); + + enable_map =3D of_find_property(node, "renesas,enable-bit", &nr_bits); + if (IS_ERR(enable_map)) + return PTR_ERR(enable_map); + + nr_bits /=3D sizeof(u32); + /* 2words per entry. */ + if (nr_bits % 2) + return -EINVAL; + nr_bits /=3D 2; + if (nr_bits > NR_IRL) + return -EINVAL; + + ret =3D nr_bits; + p =3D NULL; + for (; nr_bits > 0; nr_bits--) { + /* 1st word - IRL */ + p =3D of_prop_next_u32(enable_map, p, &irl); + if (!p || irl > NR_IRL) + return -EINVAL; + /* 2nd word - enable bit index */ + p =3D of_prop_next_u32(enable_map, p, &priv->enable_bit[irl]); + if (priv->enable_bit[irl] >=3D priv->width) + return -EINVAL; + } + return ret; +} + +static int __init sh7751irl_init(struct device_node *node, struct device_n= ode *parent) +{ + struct sh7751irl_intc_priv *priv; + struct irq_domain *d; + void __iomem *base; + int ret =3D 0; + + base =3D of_iomap(node, 0); + if (!base) + ret =3D -EINVAL; + + priv =3D kzalloc(sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base =3D base; + of_property_read_u32(node, "renesas,width", &priv->width); + if (priv->width !=3D 8 && priv->width !=3D 16 && priv->width !=3D 32) { + pr_err("%pOFP: Invalid register width.\n", node); + ret =3D -EINVAL; + goto error; + } + + priv->invert =3D of_property_read_bool(node, "renesas,set-to-disable"); + + ret =3D load_irq_bit(node, priv); + if (ret < 0) { + pr_err("%pOFP: Invalid register define.\n", node); + goto error; + } + + d =3D irq_domain_add_tree(node, &sh7751irl_intc_domain_ops, priv); + if (d =3D=3D NULL) { + pr_err("%pOFP: cannot initialize irq domain\n", node); + ret =3D -ENOMEM; + goto error; + } + + priv->irq_domain =3D d; + irq_domain_update_bus_token(d, DOMAIN_BUS_WIRED); + pr_info("%pOFP: SH7751 External Interrupt encoder (input=3D%d)", node, re= t); + return 0; +error: + kfree(priv); + return ret; +} + +IRQCHIP_DECLARE(renesas_sh7751_irl, "renesas,sh7751-irl-ext", sh7751irl_in= it); --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84CDEC10DCE for ; Tue, 5 Dec 2023 10:13:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346632AbjLEKNK (ORCPT ); Tue, 5 Dec 2023 05:13:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346468AbjLEJzn (ORCPT ); Tue, 5 Dec 2023 04:55:43 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D24E0C6; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id CAF801C04D0; Tue, 5 Dec 2023 18:46:39 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 19/37] dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add json-schema Date: Tue, 5 Dec 2023 18:45:38 +0900 Message-Id: <1623383c89532994218795cd3755c37819be426b.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH7751 external interrupt encoder json-schema. Signed-off-by: Yoshinori Sato --- .../renesas,sh7751-irl-ext.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= renesas,sh7751-irl-ext.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas= ,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controll= er/renesas,sh7751-irl-ext.yaml new file mode 100644 index 000000000000..ba4fe2e4d749 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751= -irl-ext.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl= -ext.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 IRL external encoder with enable regs. + +maintainers: + - Yoshinori Sato + +description: | + This is the generally used external interrupt encoder on SH7751 based bo= ards. + +properties: + compatible: + items: + - const: renesas,sh7751-irl-ext + + reg: + minItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + + '#address-cells': + const: 0 + + '#size-cells': + const: 0 + + renesas,width: + description: Enable register width + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16, 32] + + renesas,set-to-disable: + $ref: /schemas/types.yaml#/definitions/flag + description: Setting this flag to 1 disables it. + + renesas,enable-bit: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + IRL enable register bit mapping + 1st word IRL + 2nd word bit index of enable register + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - renesas,width + - renesas,enable-bit + +additionalProperties: false + +examples: + - | + r2dintc: sh7751irl_encoder@a4000000 { + compatible =3D "renesas,sh7751-irl-ext"; + reg =3D <0xa4000000 0x02>; + interrupt-controller; + #address-cells =3D <0>; + #size-cells =3D <0>; + #interrupt-cells =3D <1>; + renesas,width =3D <16>; + renesas,enable-bit =3D <0 11>, /* PCI INTD */ + <1 9>, /* CF IDE */ + <2 8>, /* CF CD */ + <3 12>, /* PCI INTC */ + <4 10>, /* SM501 */ + <5 6>, /* KEY */ + <6 5>, /* RTC ALARM */ + <7 4>, /* RTC T */ + <8 7>, /* SDCARD */ + <9 14>, /* PCI INTA */ + <10 13>, /* PCI INTB */ + <11 0>, /* EXT */ + <12 15>; /* TP */ + }; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69B07C4167B for ; Tue, 5 Dec 2023 09:56:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376925AbjLEJ4H (ORCPT ); Tue, 5 Dec 2023 04:56:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344933AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E5527124; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 0C17A1C056D; Tue, 5 Dec 2023 18:46:42 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 20/37] serial: sh-sci: fix SH4 OF support. Date: Tue, 5 Dec 2023 18:45:39 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" - fix earlycon name. - fix earlyprintk hung (NULL pointer reference). Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/sh-sci.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 732c893c8d16..56d635371fd3 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -658,7 +658,7 @@ config SERIAL_SH_SCI_EARLYCON depends on SERIAL_SH_SCI=3Dy select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON - default ARCH_RENESAS + default ARCH_RENESAS || SUPERH =20 config SERIAL_SH_SCI_DMA bool "DMA support" if EXPERT diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 84ab434c94ba..0a33581be08b 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2720,7 +2720,7 @@ static int sci_remap_port(struct uart_port *port) if (port->membase) return 0; =20 - if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { + if ((port->dev && port->dev->of_node) || (port->flags & UPF_IOREMAP)) { port->membase =3D ioremap(port->mapbase, sport->reg_size); if (unlikely(!port->membase)) { dev_err(port->dev, "can't remap port#%d\n", port->line); @@ -3555,8 +3555,8 @@ static int __init hscif_early_console_setup(struct ea= rlycon_device *device, =20 OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup); OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup); -OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_se= tup); -OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a07g044", rzscifa_early_console_= setup); +OF_EARLYCON_DECLARE(rzscifa, "renesas,scif-r7s9210", rzscifa_early_console= _setup); +OF_EARLYCON_DECLARE(rzscifa, "renesas,scif-r9a07g044", rzscifa_early_conso= le_setup); OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup); OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup); OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup); --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8832C10DCE for ; Tue, 5 Dec 2023 10:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376969AbjLEJ4L (ORCPT ); Tue, 5 Dec 2023 04:56:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344936AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 97E33FA; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 0714B1C0527; Tue, 5 Dec 2023 18:46:44 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 21/37] dt-bindings: serial: renesas,scif: Add scif-sh7751. Date: Tue, 5 Dec 2023 18:45:40 +0900 Message-Id: <9f1485220fbfaba9b30bf2d9352640f988f35b04.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add Renesas SH7751 SCIF. Signed-off-by: Yoshinori Sato --- Documentation/devicetree/bindings/serial/renesas,scif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/D= ocumentation/devicetree/bindings/serial/renesas,scif.yaml index 4610a5bd580c..a774f16400c2 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -17,6 +17,7 @@ properties: oneOf: - items: - enum: + - renesas,scif-sh7751 # SH7751 - renesas,scif-r7s72100 # RZ/A1H - const: renesas,scif # generic SCIF compatible UART =20 --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76419C4167B for ; Tue, 5 Dec 2023 10:13:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346445AbjLEKM5 (ORCPT ); Tue, 5 Dec 2023 05:12:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344981AbjLEJzb (ORCPT ); Tue, 5 Dec 2023 04:55:31 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D399A116; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 33C531C0509; Tue, 5 Dec 2023 18:46:46 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 22/37] dt-bindings: display: smi,sm501: SMI SM501 binding json-schema Date: Tue, 5 Dec 2023 18:45:41 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Define SM501 functions and modes. Signed-off-by: Yoshinori Sato --- .../bindings/display/smi,sm501.yaml | 134 ++++++++++++++++++ include/dt-bindings/display/sm501.h | 25 ++++ 2 files changed, 159 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/smi,sm501.yaml create mode 100644 include/dt-bindings/display/sm501.h diff --git a/Documentation/devicetree/bindings/display/smi,sm501.yaml b/Doc= umentation/devicetree/bindings/display/smi,sm501.yaml new file mode 100644 index 000000000000..df46600b8d4a --- /dev/null +++ b/Documentation/devicetree/bindings/display/smi,sm501.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/smi,sm501.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Motion SM501 Mobile Multimedia Companion Chip + +maintainers: + - Yoshinori Sato + +description: | + These DT bindings describe the SM501. + +properties: + compatible: + const: + smi,sm501 + + reg: + maxItems: 2 + description: | + First entry: System Configuration register + Second entry: IO space (Display Controller register) + + interrupts: + description: SM501 interrupt to the cpu should be described here. + + interrupt-name: true + + mode: + $ref: /schemas/types.yaml#/definitions/string + description: select a video mode + + edid: + description: | + verbatim EDID data block describing attached display. + Data from the detailed timing descriptor will be used to + program the display controller. + + little-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: available on big endian systems, to set different foreign= endian. + big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: available on little endian systems, to set different fore= ign endian. + + swap-fb-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: swap framebuffer byteorder. + + route-crt-panel: + $ref: /schemas/types.yaml#/definitions/flag + description: Panel output merge to CRT. + + crt: + description: CRT output control + + panel: + description: Panel output control + + bpp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Color depth + + smi,flags: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Display control flags. + + smi,devices: + $ref: /schemas/types.yaml#/definitions/uint32 + description: SM501 device function select. + + smi,mclk: + $ref: /schemas/types.yaml#/definitions/uint32 + description: mclk frequency. + + smi,m1xclk: + $ref: /schemas/types.yaml#/definitions/uint32 + description: m1xclk frequency. + + smi,misc-timing: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Miscellaneous Timing reg value. + + smi,misc-control: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Miscellaneous Control reg value. + + smi,gpio-low: + $ref: /schemas/types.yaml#/definitions/uint32 + description: GPIO0 to 31 Control reg value. + + smi,gpio-high: + $ref: /schemas/types.yaml#/definitions/uint32 + description: GPIO32 to 63 Control reg value. + + smi,gpio-i2c: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 5 + description: | + GPIO I2C bus number + 1st field - I2C bus number + 2nd Field - GPIO SDA + 3rd Field - GPIO SCL + 4th Field - Timeout + 5th Field - udelay + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + + +examples: + # MPC5200 + - | + display@1,0 { + compatible =3D "smi,sm501"; + reg =3D <0x00000000 0x00800000 + 0x03e00000 0x00200000>; + interrupts =3D <1 1 3>; + mode =3D "640x480-32@60"; + edid =3D [00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 + 00 00 01 04 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 f0 0a 80 fb 20 e0 25 10 32 60 + 02 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 bd]; + }; diff --git a/include/dt-bindings/display/sm501.h b/include/dt-bindings/disp= lay/sm501.h new file mode 100644 index 000000000000..1be8490d7635 --- /dev/null +++ b/include/dt-bindings/display/sm501.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ + +/* Platform data definitions */ + +#define SM501FB_FLAG_USE_INIT_MODE (1<<0) +#define SM501FB_FLAG_DISABLE_AT_EXIT (1<<1) +#define SM501FB_FLAG_USE_HWCURSOR (1<<2) +#define SM501FB_FLAG_USE_HWACCEL (1<<3) +#define SM501FB_FLAG_PANEL_NO_FPEN (1<<4) +#define SM501FB_FLAG_PANEL_NO_VBIASEN (1<<5) +#define SM501FB_FLAG_PANEL_INV_FPEN (1<<6) +#define SM501FB_FLAG_PANEL_INV_VBIASEN (1<<7) + +#define SM501_USE_USB_HOST (1<<0) +#define SM501_USE_USB_SLAVE (1<<1) +#define SM501_USE_SSP0 (1<<2) +#define SM501_USE_SSP1 (1<<3) +#define SM501_USE_UART0 (1<<4) +#define SM501_USE_UART1 (1<<5) +#define SM501_USE_FBACCEL (1<<6) +#define SM501_USE_AC97 (1<<7) +#define SM501_USE_I2S (1<<8) +#define SM501_USE_GPIO (1<<9) + +#define SM501_USE_ALL (0xffffffff) --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1BC3C4167B for ; Tue, 5 Dec 2023 09:55:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344937AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229971AbjLEJz0 (ORCPT ); Tue, 5 Dec 2023 04:55:26 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 10E2BA0; Tue, 5 Dec 2023 01:55:32 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 2DA221C066B; Tue, 5 Dec 2023 18:46:48 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 23/37] mfd: sm501: Convert platform_data to OF property Date: Tue, 5 Dec 2023 18:45:42 +0900 Message-Id: <68532082074b0c8fe9945b481678aab77520f517.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Various parameters of SM501 can be set using platform_data, so parameters cannot be passed in the DeviceTree target. Expands the parameters set in platform_data so that they can be specified using DeviceTree properties. Signed-off-by: Yoshinori Sato --- drivers/mfd/sm501.c | 99 +++++++++++++++++++++++++++++++++++ drivers/video/fbdev/sm501fb.c | 82 +++++++++++++++++++++++++++++ 2 files changed, 181 insertions(+) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index 28027982cf69..f0104fdf0f34 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -1370,6 +1370,99 @@ static int sm501_init_dev(struct sm501_devdata *sm) return 0; } =20 +static void sm501_of_read_reg_init(struct device_node *np, + const char *propname, struct sm501_reg_init *val) +{ + u32 u32_val[2]; + + if (!of_property_read_u32_array(np, propname, u32_val, sizeof(u32_val))) { + val->set =3D u32_val[0]; + val->mask =3D u32_val[1]; + } +} + +/* Read GPIO I2C configuration */ +static int sm501_parse_dt_gpio_i2c(struct device *dev, struct sm501_platda= ta *plat, + struct device_node *np) +{ + struct sm501_platdata_gpio_i2c *gpio_i2c_p; + struct property *prop; + u32 gpio_i2c[5]; + const __be32 *p; + unsigned int i; + u32 i2c_nr; + + prop =3D of_find_property(np, "smi,gpio-i2c", NULL); + if (!prop) + return 0; + + i2c_nr =3D of_property_count_u32_elems(np, "smi,gpio-i2c"); + + /* GPIO I2C define 5 words per channel. */ + if (i2c_nr % 5) + return -EINVAL; + i2c_nr /=3D 5; + plat->gpio_i2c =3D devm_kzalloc(dev, sizeof(*plat->gpio_i2c) * i2c_nr, + GFP_KERNEL); + if (!plat->gpio_i2c) + return -ENOMEM; + + plat->gpio_i2c_nr =3D i2c_nr; + gpio_i2c_p =3D plat->gpio_i2c; + + for (; i2c_nr > 0; i2c_nr--) { + for (i =3D 0; i < ARRAY_SIZE(gpio_i2c); i++) { + p =3D of_prop_next_u32(prop, p, &gpio_i2c[i]); + if (!p) + return -EINVAL; + } + gpio_i2c_p->bus_num =3D gpio_i2c[0]; + gpio_i2c_p->pin_sda =3D gpio_i2c[1]; + gpio_i2c_p->pin_scl =3D gpio_i2c[2]; + gpio_i2c_p->udelay =3D gpio_i2c[3]; + gpio_i2c_p->timeout =3D gpio_i2c[4]; + gpio_i2c_p++; + } + return 0; +} + +/* Build platform_data from OF property */ +static int sm501_parse_dt(struct sm501_devdata *sm, struct device_node *np) +{ + struct sm501_platdata *plat; + u32 u32_val; + int ret; + + plat =3D devm_kzalloc(sm->dev, sizeof(*plat), GFP_KERNEL); + if (!plat) + return -ENOMEM; + + plat->init =3D devm_kzalloc(sm->dev, sizeof(*plat->init), GFP_KERNEL); + if (!plat->init) + return -ENOMEM; + + if (!of_property_read_u32(np, "smi,devices", &u32_val)) + plat->init->devices =3D u32_val; + if (!of_property_read_u32(np, "smi,mclk", &u32_val)) + plat->init->mclk =3D u32_val; + if (!of_property_read_u32(np, "smi,m1xclk", &u32_val)) + plat->init->m1xclk =3D u32_val; + + sm501_of_read_reg_init(np, "smi,misc-timing", &plat->init->misc_timing); + sm501_of_read_reg_init(np, "smi,misc-control", &plat->init->misc_control); + sm501_of_read_reg_init(np, "smi,gpio-low", &plat->init->gpio_low); + sm501_of_read_reg_init(np, "smi,gpio-high", &plat->init->gpio_high); + + if (IS_ENABLED(CONFIG_MFD_SM501_GPIO) && + (plat->init->devices & SM501_USE_GPIO)) { + ret =3D sm501_parse_dt_gpio_i2c(sm->dev, plat, np); + if (ret) + return ret; + } + sm->platdata =3D plat; + return 0; +} + static int sm501_plat_probe(struct platform_device *dev) { struct sm501_devdata *sm; @@ -1406,6 +1499,12 @@ static int sm501_plat_probe(struct platform_device *= dev) goto err_res; } =20 + if (IS_ENABLED(CONFIG_OF) && dev->dev.of_node) { + ret =3D sm501_parse_dt(sm, dev->dev.of_node); + if (ret) + goto err_res; + } + platform_set_drvdata(dev, sm); =20 sm->regs =3D ioremap(sm->io_res->start, resource_size(sm->io_res)); diff --git a/drivers/video/fbdev/sm501fb.c b/drivers/video/fbdev/sm501fb.c index d6fdc1737cd2..d35285819d28 100644 --- a/drivers/video/fbdev/sm501fb.c +++ b/drivers/video/fbdev/sm501fb.c @@ -1932,6 +1932,82 @@ static int sm501fb_start_one(struct sm501fb_info *in= fo, return 0; } =20 +#if defined(CONFIG_OF) +/* parse CRT / panel configuration */ +static struct sm501_platdata_fbsub *dt_fbsub(struct device *dev, + struct device_node *np, + const char *name) +{ + struct sm501_platdata_fbsub *fbsub =3D NULL; + struct fb_videomode *def_mode =3D NULL; + struct device_node *child; + const void *p_edid; + u32 flags =3D 0; + u32 bpp =3D 0; + int len; + + child =3D of_get_child_by_name(np, name); + if (child =3D=3D NULL) + return NULL; + + p_edid =3D of_get_property(child, "edid", &len); + if (p_edid && len =3D=3D EDID_LENGTH) { + struct fb_monspecs *specs; + u8 *edid; + + edid =3D kmemdup(p_edid, EDID_LENGTH, GFP_KERNEL); + if (edid) { + specs =3D kzalloc(sizeof(*specs), GFP_KERNEL); + if (specs) { + fb_edid_to_monspecs(edid, specs); + def_mode =3D specs->modedb; + } + } + kfree(edid); + } + + of_property_read_u32(child, "bpp", &bpp); + + /* If flags property is obtained, fbsub is returned. */ + if (!of_property_read_u32(child, "smi,flags", &flags)) { + fbsub =3D devm_kzalloc(dev, sizeof(*fbsub), GFP_KERNEL); + if (fbsub) { + fbsub->def_mode =3D def_mode; + fbsub->def_bpp =3D bpp; + fbsub->flags =3D flags; + } + } + return fbsub; +} + +/* Build platform_data from OF property */ +static struct sm501_platdata_fb *pdata_from_dt(struct device *dev, struct = device_node *np) +{ + enum sm501_fb_routing fb_route =3D SM501_FB_OWN; + struct sm501_platdata_fb *pdata =3D NULL; + struct sm501_platdata_fbsub *fb_crt; + struct sm501_platdata_fbsub *fb_pnl; + unsigned int flags =3D 0; + + if (of_property_read_bool(np, "route-crt-panel")) + fb_route =3D SM501_FB_CRT_PANEL; + if (of_property_read_bool(np, "swap-fb-endian")) + flags =3D SM501_FBPD_SWAP_FB_ENDIAN; + fb_crt =3D dt_fbsub(dev, np, "crt"); + fb_pnl =3D dt_fbsub(dev, np, "panel"); + if (fb_crt || fb_pnl) { + pdata =3D devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (pdata) { + pdata->fb_route =3D fb_route; + pdata->flags =3D flags; + pdata->fb_crt =3D fb_crt; + pdata->fb_pnl =3D fb_pnl; + } + } + return pdata; +} +#endif + static int sm501fb_probe(struct platform_device *pdev) { struct sm501fb_info *info; @@ -1974,6 +2050,12 @@ static int sm501fb_probe(struct platform_device *pde= v) if (info->edid_data) found =3D 1; } + /* Get platform data compatible configuration */ + if (!found) { + info->pdata =3D pdata_from_dt(dev, np); + if (info->pdata) + found =3D 1; + } } #endif if (!found) { --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7B58C4167B for ; Tue, 5 Dec 2023 10:12:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346547AbjLEJzp (ORCPT ); Tue, 5 Dec 2023 04:55:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234872AbjLEJz1 (ORCPT ); Tue, 5 Dec 2023 04:55:27 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4ECA49E; Tue, 5 Dec 2023 01:55:32 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 2A0FC1C06F4; Tue, 5 Dec 2023 18:46:50 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 24/37] dt-binding: sh: cpus: Add SH CPUs json-schema Date: Tue, 5 Dec 2023 18:45:43 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas SH series and compatible ISA CPUs. Signed-off-by: Yoshinori Sato --- .../devicetree/bindings/sh/cpus.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml diff --git a/Documentation/devicetree/bindings/sh/cpus.yaml b/Documentation= /devicetree/bindings/sh/cpus.yaml new file mode 100644 index 000000000000..eb57e76e2aa2 --- /dev/null +++ b/Documentation/devicetree/bindings/sh/cpus.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sh/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH CPUs + +maintainers: + - Yoshinori Sato + +description: |+ + The device tree allows to describe the layout of CPUs in a system through + the "cpus" node, which in turn contains a number of subnodes (ie "cpu") + defining properties for every cpu. + + Bindings for CPU nodes follow the Devicetree Specification, available fr= om: + + https://www.devicetree.org/specifications/ + +properties: + compatible: + items: + - enum: + - renesas,sh2a + - renesas,sh3 + - renesas,sh4 + - renesas,sh4a + - jcore,j2 + - const: renesas,sh2 + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + CPU core clock freqency. + + clocks: true + + clock-names: true + + reg: + $ref: /schemas/types.yaml#/definitions/uint32 + const: 0 + + device_type: true + +required: + - compatible + - reg + - device_type + +additionalProperties: true + +examples: + - | + #include + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu: cpu@0 { + compatible =3D "renesas,sh4", "renesas,sh2"; + device_type =3D "cpu"; + reg =3D <0>; + clocks =3D <&cpg SH7750_CPG_ICK>; + clock-names =3D "ick"; + icache-size =3D <16384>; + icache-line-size =3D <32>; + dcache-size =3D <32768>; + dcache-line-size =3D <32>; + }; + }; +... --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6379C46CA0 for ; Tue, 5 Dec 2023 09:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376865AbjLEJz7 (ORCPT ); Tue, 5 Dec 2023 04:55:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344907AbjLEJz2 (ORCPT ); Tue, 5 Dec 2023 04:55:28 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 88CB1C9; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 66F381C05DE; Tue, 5 Dec 2023 18:46:52 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 25/37] dt-bindings: vendor-prefixes: Add iodata Date: Tue, 5 Dec 2023 18:45:44 +0900 Message-Id: <3e216003a768e06981cfda842d8fcf185f4ea9b7.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add IO DATA DEVICE INC. https://www.iodata.com/ Signed-off-by: Yoshinori Sato --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 309b94c328c8..94ed63d9f7de 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -671,6 +671,8 @@ patternProperties: description: Inventec "^inversepath,.*": description: Inverse Path + "^iodata,.*": + description: IO DATA DEVICE Inc. "^iom,.*": description: Iomega Corporation "^irondevice,.*": --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D25D3C07E97 for ; Tue, 5 Dec 2023 10:12:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346718AbjLEJ4V (ORCPT ); Tue, 5 Dec 2023 04:56:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229710AbjLEJz3 (ORCPT ); Tue, 5 Dec 2023 04:55:29 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 97CC2D3; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 605131C069C; Tue, 5 Dec 2023 18:46:54 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 26/37] dt-bindings: vendor-prefixes: Add smi Date: Tue, 5 Dec 2023 18:45:45 +0900 Message-Id: <2dc1fcd6596f78de4197aea04a26252f5f365595.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add Silicon Mortion Technology Corporation https://www.siliconmotion.com/ Signed-off-by: Yoshinori Sato --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 94ed63d9f7de..a338bdd743ab 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1283,6 +1283,8 @@ patternProperties: description: Skyworks Solutions, Inc. "^smartlabs,.*": description: SmartLabs LLC + "^smi,.*": + description: Silicon Motion Technology Corporation "^smsc,.*": description: Standard Microsystems Corporation "^snps,.*": --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A275C4167B for ; Tue, 5 Dec 2023 10:13:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235068AbjLEKMw (ORCPT ); Tue, 5 Dec 2023 05:12:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344949AbjLEJza (ORCPT ); Tue, 5 Dec 2023 04:55:30 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 65443184; Tue, 5 Dec 2023 01:55:36 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 591EB1C075D; Tue, 5 Dec 2023 18:46:56 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 27/37] dt-bindings: ata: ata-generic: Add new targets Date: Tue, 5 Dec 2023 18:45:46 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Added new ata-generic target. - iodata,usl-5p-ata - renesas,rts7751r2d-ata Each boards have simple IDE Interface. Use ATA generic driver. Signed-off-by: Yoshinori Sato --- Documentation/devicetree/bindings/ata/ata-generic.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ata-generic.yaml b/Docum= entation/devicetree/bindings/ata/ata-generic.yaml index 0697927f3d7e..1025b3b351d0 100644 --- a/Documentation/devicetree/bindings/ata/ata-generic.yaml +++ b/Documentation/devicetree/bindings/ata/ata-generic.yaml @@ -18,6 +18,8 @@ properties: - enum: - arm,vexpress-cf - fsl,mpc8349emitx-pata + - iodata,usl-5p-ata + - renesas,rts7751r2d-ata - const: ata-generic =20 reg: --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C33E2C10DCE for ; Tue, 5 Dec 2023 09:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376622AbjLEJzy (ORCPT ); Tue, 5 Dec 2023 04:55:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57948 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344899AbjLEJz2 (ORCPT ); Tue, 5 Dec 2023 04:55:28 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5B957B2; Tue, 5 Dec 2023 01:55:34 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 8F90A1C077B; Tue, 5 Dec 2023 18:46:58 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 28/37] dt-bindings: soc: renesas: sh: Add SH7751 based target Date: Tue, 5 Dec 2023 18:45:47 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Yoshinori Sato --- .../devicetree/bindings/soc/renesas/sh.yaml | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/renesas/sh.yaml diff --git a/Documentation/devicetree/bindings/soc/renesas/sh.yaml b/Docume= ntation/devicetree/bindings/soc/renesas/sh.yaml new file mode 100644 index 000000000000..3fbff2532ad3 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/renesas/sh.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/renesas/sh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH Platform + +maintainers: + - Yoshinori Sato + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: RTS7751R2D Plus + items: + - enum: + - renesas,rts7751r2d # Renesas SH4 2D graphics board + - const: renesas,sh7751r + + - description: Julian board + items: + - enum: + - iodata,landisk # LANDISK HDL-U + - iodata,usl-5p # USL-5P + - const: renesas,sh7751r + +additionalProperties: true + +... --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D451EC10F05 for ; Tue, 5 Dec 2023 09:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376709AbjLEJz4 (ORCPT ); Tue, 5 Dec 2023 04:55:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344893AbjLEJz2 (ORCPT ); Tue, 5 Dec 2023 04:55:28 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 01F03AF; Tue, 5 Dec 2023 01:55:33 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 8AD121C0781; Tue, 5 Dec 2023 18:47:00 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 29/37] sh: SH7751R SoC Internal peripheral definition dtsi. Date: Tue, 5 Dec 2023 18:45:48 +0900 Message-Id: <635f3b8c4a9063346bf40332c53d3e134f67fb1c.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" SH7751R internal peripherals device tree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/sh7751r.dtsi | 150 ++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 arch/sh/boot/dts/sh7751r.dtsi diff --git a/arch/sh/boot/dts/sh7751r.dtsi b/arch/sh/boot/dts/sh7751r.dtsi new file mode 100644 index 000000000000..0db5a7005a2d --- /dev/null +++ b/arch/sh/boot/dts/sh7751r.dtsi @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the SH7751R SoC + */ + +#include +#include + +/ { + #address-cells =3D <1>; + #size-cells =3D <1>; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu@0 { + compatible =3D "renesas,sh4", "renesas,sh2"; + device_type =3D "cpu"; + reg =3D <0>; + clocks =3D <&cpg SH7750_CPG_ICK>; + clock-names =3D "ick"; + icache-size =3D <16384>; + icache-line-size =3D <32>; + dcache-size =3D <32768>; + dcache-line-size =3D <32>; + }; + }; + + xtal: oscillator { + #clock-cells =3D <0>; + compatible =3D "fixed-clock"; + clock-frequency =3D <0>; + clock-output-names =3D "xtal"; + }; + + soc { + compatible =3D "simple-bus"; + interrupt-parent =3D <&shintc>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + cpg: clock-controller@ffc00000 { + #clock-cells =3D <1>; + #power-domain-cells =3D <0>; + compatible =3D "renesas,sh7751r-cpg"; + clocks =3D <&xtal>; + clock-names =3D "xtal"; + reg =3D <0xffc00000 20>, <0xfe0a0000 16>; + reg-names =3D "FRQCR", "CLKSTP00"; + renesas,mode =3D <0>; + }; + + shintc: interrupt-controller@ffd00000 { + compatible =3D "renesas,sh7751-intc"; + #interrupt-cells =3D <1>; + interrupt-controller; + reg =3D <0xffd00000 20>, <0xfe080000 128>; + reg-names =3D "ICR", "INTPRI00"; + renesas,ipr-map =3D <0x240 IPRD IPR_B12>, /* IRL0 */ + <0x2a0 IPRD IPR_B8>, /* IRL1 */ + <0x300 IPRD IPR_B4>, /* IRL2 */ + <0x360 IPRD IPR_B0>, /* IRL3 */ + <0x400 IPRA IPR_B12>, /* TMU0 */ + <0x420 IPRA IPR_B8>, /* TMU1 */ + <0x440 IPRA IPR_B4>, /* TMU2 TNUI */ + <0x460 IPRA IPR_B4>, /* TMU2 TICPI */ + <0x480 IPRA IPR_B0>, /* RTC ATI */ + <0x4a0 IPRA IPR_B0>, /* RTC PRI */ + <0x4c0 IPRA IPR_B0>, /* RTC CUI */ + <0x4e0 IPRB IPR_B4>, /* SCI ERI */ + <0x500 IPRB IPR_B4>, /* SCI RXI */ + <0x520 IPRB IPR_B4>, /* SCI TXI */ + <0x540 IPRB IPR_B4>, /* SCI TEI */ + <0x560 IPRB IPR_B12>, /* WDT */ + <0x580 IPRB IPR_B8>, /* REF RCMI */ + <0x5a0 IPRB IPR_B4>, /* REF ROVI */ + <0x600 IPRC IPR_B0>, /* H-UDI */ + <0x620 IPRC IPR_B12>, /* GPIO */ + <0x640 IPRC IPR_B8>, /* DMAC DMTE0 */ + <0x660 IPRC IPR_B8>, /* DMAC DMTE1 */ + <0x680 IPRC IPR_B8>, /* DMAC DMTE2 */ + <0x6a0 IPRC IPR_B8>, /* DMAC DMTE3 */ + <0x6c0 IPRC IPR_B8>, /* DMAC DMAE */ + <0x700 IPRC IPR_B4>, /* SCIF ERI */ + <0x720 IPRC IPR_B4>, /* SCIF RXI */ + <0x740 IPRC IPR_B4>, /* SCIF BRI */ + <0x760 IPRC IPR_B4>, /* SCIF TXI */ + <0x780 IPRC IPR_B8>, /* DMAC DMTE4 */ + <0x7a0 IPRC IPR_B8>, /* DMAC DMTE5 */ + <0x7c0 IPRC IPR_B8>, /* DMAC DMTE6 */ + <0x7e0 IPRC IPR_B8>, /* DMAC DMTE7 */ + <0xa00 INTPRI00 IPR_B0>, /* PCIC PCISERR */ + <0xa20 INTPRI00 IPR_B4>, /* PCIC PCIDMA3 */ + <0xa40 INTPRI00 IPR_B4>, /* PCIC PCIDMA2 */ + <0xa60 INTPRI00 IPR_B4>, /* PCIC PCIDMA1 */ + <0xa80 INTPRI00 IPR_B4>, /* PCIC PCIDMA0 */ + <0xaa0 INTPRI00 IPR_B4>, /* PCIC PCIPWON */ + <0xac0 INTPRI00 IPR_B4>, /* PCIC PCIPWDWN */ + <0xae0 INTPRI00 IPR_B4>, /* PCIC PCIERR */ + <0xb00 INTPRI00 IPR_B8>, /* TMU3 */ + <0xb80 INTPRI00 IPR_B12>; /* TMU4 */ + }; + + /* sci0 is rarely used, so it is not defined here. */ + scif1: serial@ffe80000 { + compatible =3D "renesas,scif-sh7751", "renesas,scif"; + reg =3D <0xffe80000 0x100>; + interrupts =3D , + , + , + ; + interrupt-names =3D "eri", "rxi", "txi", "bri"; + clocks =3D <&cpg SH7750_MSTP_SCIF>; + clock-names =3D "fck"; + power-domains =3D <&cpg>; + status =3D "disabled"; + }; + + /* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */ + tmu0: timer@ffd80000 { + compatible =3D "renesas,tmu-sh7750", "renesas,tmu"; + reg =3D <0xffd80000 12>; + interrupts =3D , + , + , + ; + interrupt-names =3D "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks =3D <&cpg SH7750_MSTP_TMU012>; + clock-names =3D "fck"; + power-domains =3D <&cpg>; + #renesas,channels =3D <3>; + }; + + pcic: pci@fe200000 { + compatible =3D "renesas,sh7751-pci"; + #address-cells =3D <3>; + #size-cells =3D <2>; + #interrupt-cells =3D <1>; + device_type =3D "pci"; + bus-range =3D <0 0>; + ranges =3D <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + reg =3D <0xfe200000 0x0400>, + <0xff800000 0x0100>; + status =3D "disabled"; + }; + }; +}; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1829DC4167B for ; Tue, 5 Dec 2023 09:47:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344895AbjLEJrC (ORCPT ); Tue, 5 Dec 2023 04:47:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbjLEJq7 (ORCPT ); Tue, 5 Dec 2023 04:46:59 -0500 X-Greylist: delayed 61 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 05 Dec 2023 01:47:05 PST Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1ED059A; Tue, 5 Dec 2023 01:47:05 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 8A2C81C0868; Tue, 5 Dec 2023 18:47:02 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 30/37] sh: add RTS7751R2D Plus DTS Date: Tue, 5 Dec 2023 18:45:49 +0900 Message-Id: <9a32654249d357d3147e824a8c56321b7a486326.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Renesas RTS7751R2D Plus devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/rts7751r2dplus.dts | 157 ++++++++++++++++++++++++++++ 1 file changed, 157 insertions(+) create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts diff --git a/arch/sh/boot/dts/rts7751r2dplus.dts b/arch/sh/boot/dts/rts7751= r2dplus.dts new file mode 100644 index 000000000000..4fb75e814615 --- /dev/null +++ b/arch/sh/boot/dts/rts7751r2dplus.dts @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Renesas RTS7751R2D Plus + */ + +/dts-v1/; + +#include "sh7751r.dtsi" +#include + +/ { + model =3D "Renesas RTS7715R2D Plus"; + compatible =3D "renesas,rts7751r2d", "renesas,sh7751r"; + + aliases { + serial0 =3D &scif1; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@c000000 { + device_type =3D "memory"; + reg =3D <0x0c000000 0x4000000>; + }; + + r2dintc: interrupt_controller@a4000000 { + compatible =3D "renesas,sh7751-irl-ext"; + reg =3D <0xa4000000 0x02>; + interrupt-controller; + #address-cells =3D <0>; + #size-cells =3D <0>; + #interrupt-cells =3D <1>; + renesas,width =3D <16>; + renesas,enable-bit =3D <0 11>, /* PCI INTD */ + <1 9>, /* CF IDE */ + <2 8>, /* CF CD */ + <3 12>, /* PCI INTC */ + <4 10>, /* SM501 */ + <5 6>, /* KEY */ + <6 5>, /* RTC ALARM */ + <7 4>, /* RTC T */ + <8 7>, /* SDCARD */ + <9 14>, /* PCI INTA */ + <10 13>, /* PCI INTB */ + <11 0>, /* EXT */ + <12 15>; /* TP */ + }; + + display@0 { + compatible =3D "smi,sm501"; + reg =3D <0x10000000 0x03e00000 + 0x13e00000 0x00200000>; + interrupt-parent =3D <&r2dintc>; + interrupts =3D <4>; + mode =3D "640x480-16@60"; + little-endian; + smi,devices =3D <(SM501_USE_USB_HOST | SM501_USE_UART0)>; + interrupt-name =3D "sm501"; + swap-fb-endian; + + crt { + smi,flags =3D <(SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_DISABLE_AT_EXIT | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL)>; + }; + + panel { + bpp =3D <16>; + edid =3D [00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 + 00 00 01 04 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 f0 0a 80 fb 20 e0 25 10 32 60 + 02 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 bd]; + smi,flags =3D <(SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_DISABLE_AT_EXIT | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL)>; + }; + }; + + compact-flash@b4001000 { + compatible =3D "renesas,rts7751r2d-ata", "ata-generic"; + reg =3D <0xb4001000 0x0e>, <0xb400080c 2>; + reg-shift =3D <1>; + interrupt-parent =3D <&r2dintc>; + interrupts =3D <1>; + }; + + flash@0 { + compatible =3D "cfi-flash"; + reg =3D <0x00000000 0x02000000>; + device-width =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + partition@0 { + label =3D "U-Boot"; + reg =3D <0x00000000 0x00040000>; + }; + + partition@1 { + label =3D "Environemt"; + reg =3D <0x00040000 0x00040000>; + }; + + partition@2 { + label =3D "Kernel"; + reg =3D <0x00080000 0x001c0000>; + }; + + partition@3 { + label =3D "Flash_FS"; + reg =3D <0x00240000 0x00dc0000>; + }; + }; +}; + +&xtal { + clock-frequency =3D <22222222>; +}; + +&cpg { + renesas,mode =3D <5>; +}; + +&scif1 { + status =3D "okay"; +}; + +&pcic { + renesas,bcr1 =3D <0x40080000>; + renesas,intm =3D <0x0000c3ff>; + renesas,aintm =3D <0x0000380f>; + renesas,config =3D <1 0xfb900047>, <4 0xab000001>; + renesas,mcrmask =3D <0x40000004>; + + interrupt-map =3D <0x0000 0 0 1 &r2dintc 9>, + <0x0000 0 0 2 &r2dintc 10>, + <0x0000 0 0 3 &r2dintc 3>, + <0x0000 0 0 4 &r2dintc 0>, + <0x0800 0 0 1 &r2dintc 10>, + <0x0800 0 0 2 &r2dintc 3>, + <0x0800 0 0 3 &r2dintc 0>, + <0x0800 0 0 4 &r2dintc 9>, + <0x1000 0 0 1 &r2dintc 3>, + <0x1000 0 0 2 &r2dintc 0>, + <0x1000 0 0 3 &r2dintc 9>, + <0x1000 0 0 4 &r2dintc 10>; + interrupt-map-mask =3D <0x1800 0 0 7>; + status =3D "okay"; +}; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E967C4167B for ; Tue, 5 Dec 2023 09:47:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344967AbjLEJrG (ORCPT ); Tue, 5 Dec 2023 04:47:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231778AbjLEJrA (ORCPT ); Tue, 5 Dec 2023 04:47:00 -0500 X-Greylist: delayed 61 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 05 Dec 2023 01:47:07 PST Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2226DA7; Tue, 5 Dec 2023 01:47:07 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id A8F061C08F9; Tue, 5 Dec 2023 18:47:04 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 31/37] sh: Add IO DATA LANDISK dts Date: Tue, 5 Dec 2023 18:45:50 +0900 Message-Id: <78327dd2b5000f01461edb7861eee0c1ac0bb6fd.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" IO DATA DEVICE Inc. LANDISK HDL-U devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/landisk.dts | 74 ++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 arch/sh/boot/dts/landisk.dts diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts new file mode 100644 index 000000000000..62e8e48c35ef --- /dev/null +++ b/arch/sh/boot/dts/landisk.dts @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the IO DATA DEVICE LANDISK + */ + +/dts-v1/; + +#include "sh7751r.dtsi" + +/ { + model =3D "IO DATA Device LANDISK"; + compatible =3D "iodata,landisk", "renesas,sh7751r"; + + aliases { + serial0 =3D &scif1; + }; + + chosen { + stdout-path =3D "serial0:9600n8"; + }; + + memory@c000000 { + device_type =3D "memory"; + reg =3D <0x0c000000 0x4000000>; + }; + + julianintc: interrupt-controller@b0000005 { + compatible =3D "renesas,sh7751-irl-ext"; + reg =3D <0xb0000005 0x01>; + interrupt-controller; + #interrupt-cells =3D <1>; + renesas,width =3D <8>; + renesas,enable-bit =3D <5 0>, /* PCI INTA */ + <6 1>, /* PCI INTB */ + <7 2>, /* PCI INTC */ + <8 3>, /* PCI INTD */ + <9 4>, /* ATA */ + <10 5>, /* CF */ + <11 6>, /* Power Switch */ + <12 7>; /* Button */ + }; +}; + +&xtal { + clock-frequency =3D <22222222>; +}; + +&cpg { + renesas,mode =3D <5>; +}; + +&scif1 { + status =3D "okay"; +}; + +&pcic { + renesas,bcr1 =3D <0x00080000>; + renesas,config =3D <6 0xd0000000>; + renesas,mcrmask =3D <0x40000004>; + interrupt-map =3D <0x0000 0 0 1 &julianintc 5>, + <0x0000 0 0 2 &julianintc 6>, + <0x0000 0 0 3 &julianintc 7>, + <0x0000 0 0 4 &julianintc 8>, + <0x0800 0 0 1 &julianintc 6>, + <0x0800 0 0 2 &julianintc 7>, + <0x0800 0 0 3 &julianintc 8>, + <0x0800 0 0 4 &julianintc 5>, + <0x1000 0 0 1 &julianintc 7>, + <0x1000 0 0 2 &julianintc 8>, + <0x1000 0 0 3 &julianintc 5>, + <0x1000 0 0 4 &julianintc 6>; + interrupt-map-mask =3D <0x1800 0 0 7>; + status =3D "okay"; +}; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D881FC4167B for ; Tue, 5 Dec 2023 09:47:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344999AbjLEJrJ (ORCPT ); Tue, 5 Dec 2023 04:47:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbjLEJrC (ORCPT ); Tue, 5 Dec 2023 04:47:02 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2DFC49A; Tue, 5 Dec 2023 01:47:09 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id BA98C1C090B; Tue, 5 Dec 2023 18:47:06 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 32/37] sh: Add IO DATA USL-5P dts Date: Tue, 5 Dec 2023 18:45:51 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" IO DATA DEVICE Inc. USL-5P devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/usl-5p.dts | 84 +++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 arch/sh/boot/dts/usl-5p.dts diff --git a/arch/sh/boot/dts/usl-5p.dts b/arch/sh/boot/dts/usl-5p.dts new file mode 100644 index 000000000000..ec666c75db12 --- /dev/null +++ b/arch/sh/boot/dts/usl-5p.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the IO DATA DEVICE USL-5P + */ + +/dts-v1/; + +#include "sh7751r.dtsi" + +/ { + model =3D "IO-DATA Device USL-5P"; + compatible =3D "iodata,usl-5p", "renesas,sh7751r"; + + aliases { + serial0 =3D &scif1; + }; + + chosen { + stdout-path =3D "serial0:9600n8"; + }; + + memory@c000000 { + device_type =3D "memory"; + reg =3D <0x0c000000 0x4000000>; + }; + + julianintc: interrupt-controller@b0000005 { + compatible =3D "renesas,sh7751-irl-ext"; + reg =3D <0xb0000005 0x01>; + interrupt-controller; + #interrupt-cells =3D <1>; + #address-cells =3D <0>; + #size-cells =3D <0>; + renesas,width =3D <8>; + renesas,enable-bit =3D <5 0>, /* PCI INTA */ + <6 1>, /* PCI INTB */ + <7 2>, /* PCI INTC */ + <8 3>, /* PCI INTD */ + <9 4>, /* ATA */ + <10 5>, /* CF */ + <11 6>, /* Power Switch */ + <12 7>; /* Button */ + }; + + compact-flash@b4000040 { + compatible =3D "iodata,usl-5p-ata", "ata-generic"; + reg =3D <0xb4000040 0x0e>, <0xb400002c 2>; + reg-shift =3D <1>; + interrupt-parent =3D <&julianintc>; + interrupts =3D <10>; + }; +}; + +&xtal { + clock-frequency =3D <22222222>; +}; + +&cpg { + renesas,mode =3D <5>; +}; + +&scif1 { + status =3D "okay"; +}; + +&pcic { + renesas,bcr1 =3D <0x00080000>; + renesas,config =3D <6 0xd0000000>; + renesas,mcrmask =3D <0x40000004>; + interrupt-map =3D <0x0000 0 0 1 &julianintc 5>, + <0x0000 0 0 2 &julianintc 6>, + <0x0000 0 0 3 &julianintc 7>, + <0x0000 0 0 4 &julianintc 8>, + <0x0800 0 0 1 &julianintc 6>, + <0x0800 0 0 2 &julianintc 7>, + <0x0800 0 0 3 &julianintc 8>, + <0x0800 0 0 4 &julianintc 5>, + <0x1000 0 0 1 &julianintc 7>, + <0x1000 0 0 2 &julianintc 8>, + <0x1000 0 0 3 &julianintc 5>, + <0x1000 0 0 4 &julianintc 6>; + interrupt-map-mask =3D <0x1800 0 0 7>; + status =3D "okay"; +}; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19F97C10DCE for ; Tue, 5 Dec 2023 09:47:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346338AbjLEJrL (ORCPT ); Tue, 5 Dec 2023 04:47:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344907AbjLEJrE (ORCPT ); Tue, 5 Dec 2023 04:47:04 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 549C7A7; Tue, 5 Dec 2023 01:47:11 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id B25571C0936; Tue, 5 Dec 2023 18:47:08 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 33/37] sh: j2_mimas_v2.dts update Date: Tue, 5 Dec 2023 18:45:52 +0900 Message-Id: <42f550adbba8e18b0fd5c4f62602a6eed8f0b777.1701768028.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/j2_mimas_v2.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v= 2.dts index fa9562f78d53..5dfe20866a1c 100644 --- a/arch/sh/boot/dts/j2_mimas_v2.dts +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -16,7 +16,7 @@ cpus { =20 cpu@0 { device_type =3D "cpu"; - compatible =3D "jcore,j2"; + compatible =3D "jcore,j2", "renesas,sh2"; reg =3D <0>; clock-frequency =3D <50000000>; d-cache-size =3D <8192>; --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31B25C4167B for ; Tue, 5 Dec 2023 09:47:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346419AbjLEJrM (ORCPT ); Tue, 5 Dec 2023 04:47:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344971AbjLEJrH (ORCPT ); Tue, 5 Dec 2023 04:47:07 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 793F0AA; Tue, 5 Dec 2023 01:47:13 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id E790D1C0939; Tue, 5 Dec 2023 18:47:10 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 34/37] sh: Add dtbs target support. Date: Tue, 5 Dec 2023 18:45:53 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile index 4a6dec9714a9..e6b93360c213 100644 --- a/arch/sh/boot/dts/Makefile +++ b/arch/sh/boot/dts/Makefile @@ -1,2 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_USE_BUILTIN_DTB) +=3D $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DT= B_SOURCE)) + +dtb-$(CONFIG_CPU_J2) +=3D j2_mimas_v2.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) +=3D landisk.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) +=3D rts7751r2dplus.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) +=3D usl-5p.dtb --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 466EAC4167B for ; Tue, 5 Dec 2023 09:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346447AbjLEJrY (ORCPT ); Tue, 5 Dec 2023 04:47:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235013AbjLEJrT (ORCPT ); Tue, 5 Dec 2023 04:47:19 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 56ABA135; Tue, 5 Dec 2023 01:47:15 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id F27051C0943; Tue, 5 Dec 2023 18:47:12 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 35/37] sh: RTS7751R2D Plus OF defconfig Date: Tue, 5 Dec 2023 18:45:54 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Yoshinori Sato --- arch/sh/configs/rts7751r2dplus-of_defconfig | 93 +++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 arch/sh/configs/rts7751r2dplus-of_defconfig diff --git a/arch/sh/configs/rts7751r2dplus-of_defconfig b/arch/sh/configs/= rts7751r2dplus-of_defconfig new file mode 100644 index 000000000000..82019a233b6e --- /dev/null +++ b/arch/sh/configs/rts7751r2dplus-of_defconfig @@ -0,0 +1,93 @@ +CONFIG_SYSVIPC=3Dy +CONFIG_LOG_BUF_SHIFT=3D14 +CONFIG_NAMESPACES=3Dy +CONFIG_EXPERT=3Dy +CONFIG_PROFILING=3Dy +CONFIG_CPU_SUBTYPE_SH7751R=3Dy +CONFIG_MEMORY_START=3D0x0c000000 +CONFIG_SH_OF_BOARD=3Dy +CONFIG_HEARTBEAT=3Dy +CONFIG_ZERO_PAGE_OFFSET=3D0x00010000 +CONFIG_MODULES=3Dy +CONFIG_FLATMEM_MANUAL=3Dy +CONFIG_NET=3Dy +CONFIG_PACKET=3Dy +CONFIG_UNIX=3Dy +CONFIG_INET=3Dy +# CONFIG_IPV6 is not set +CONFIG_PCI=3Dy +CONFIG_HOTPLUG_PCI=3Dy +CONFIG_PCI_SH7751=3Dy +CONFIG_UEVENT_HELPER=3Dy +CONFIG_MTD=3Dy +CONFIG_MTD_CMDLINE_PARTS=3Dy +CONFIG_MTD_CFI=3Dy +CONFIG_MTD_CFI_AMDSTD=3Dy +CONFIG_MTD_PHYSMAP=3Dy +CONFIG_BLK_DEV_RAM=3Dy +CONFIG_BLK_DEV_SD=3Dy +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ATA=3Dy +CONFIG_PATA_OF_PLATFORM=3Dy +CONFIG_NETDEVICES=3Dy +CONFIG_8139CP=3Dy +CONFIG_8139TOO=3Dy +# CONFIG_8139TOO_PIO is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_SERIAL_8250=3Dy +CONFIG_SERIAL_SH_SCI=3Dy +CONFIG_SERIAL_SH_SCI_EARLYCON=3Dy +CONFIG_HW_RANDOM=3Dy +CONFIG_SPI=3Dy +CONFIG_SPI_SH_SCI=3Dy +CONFIG_MFD_SM501=3Dy +CONFIG_FB=3Dy +CONFIG_FB_SH_MOBILE_LCDC=3Dm +CONFIG_FB_SM501=3Dy +CONFIG_FB_MODE_HELPERS=3Dy +CONFIG_FRAMEBUFFER_CONSOLE=3Dy +CONFIG_LOGO=3Dy +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_LOGO_SUPERH_MONO is not set +# CONFIG_LOGO_SUPERH_VGA16 is not set +CONFIG_SOUND=3Dy +CONFIG_SND=3Dm +CONFIG_SND_YMFPCI=3Dm +CONFIG_HID_A4TECH=3Dy +CONFIG_HID_BELKIN=3Dy +CONFIG_HID_CHERRY=3Dy +CONFIG_HID_CHICONY=3Dy +CONFIG_HID_CYPRESS=3Dy +CONFIG_HID_EZKEY=3Dy +CONFIG_HID_GYRATION=3Dy +CONFIG_HID_ITE=3Dy +CONFIG_HID_KENSINGTON=3Dy +CONFIG_HID_REDRAGON=3Dy +CONFIG_HID_MICROSOFT=3Dy +CONFIG_HID_MONTEREY=3Dy +CONFIG_HID_PANTHERLORD=3Dy +CONFIG_HID_PETALYNX=3Dy +CONFIG_HID_SAMSUNG=3Dy +CONFIG_HID_SUNPLUS=3Dy +CONFIG_USB=3Dy +CONFIG_USB_ANNOUNCE_NEW_DEVICES=3Dy +CONFIG_USB_OHCI_HCD=3Dy +CONFIG_USB_STORAGE=3Dy +CONFIG_RTC_CLASS=3Dy +CONFIG_RTC_DRV_R9701=3Dy +CONFIG_RENESAS_SH7751_INTC=3Dy +CONFIG_RENESAS_SH7751IRL_INTC=3Dy +CONFIG_EXT2_FS=3Dy +CONFIG_MSDOS_FS=3Dy +CONFIG_VFAT_FS=3Dy +CONFIG_PROC_KCORE=3Dy +CONFIG_TMPFS=3Dy +CONFIG_MINIX_FS=3Dy +CONFIG_NLS_CODEPAGE_932=3Dy +CONFIG_CRC_T10DIF=3Dy +CONFIG_DEBUG_FS=3Dy +# CONFIG_FTRACE is not set --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92868C4167B for ; Tue, 5 Dec 2023 09:47:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346530AbjLEJr1 (ORCPT ); Tue, 5 Dec 2023 04:47:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235437AbjLEJrV (ORCPT ); Tue, 5 Dec 2023 04:47:21 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A7E5C18F; Tue, 5 Dec 2023 01:47:17 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id E9BD81C0952; Tue, 5 Dec 2023 18:47:14 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 36/37] sh: LANDISK OF defconfig Date: Tue, 5 Dec 2023 18:45:55 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Signed-off-by: Yoshinori Sato --- arch/sh/configs/landisk-of_defconfig | 111 +++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 arch/sh/configs/landisk-of_defconfig diff --git a/arch/sh/configs/landisk-of_defconfig b/arch/sh/configs/landisk= -of_defconfig new file mode 100644 index 000000000000..406de7d7b8a2 --- /dev/null +++ b/arch/sh/configs/landisk-of_defconfig @@ -0,0 +1,111 @@ +CONFIG_SYSVIPC=3Dy +CONFIG_LOG_BUF_SHIFT=3D14 +CONFIG_NAMESPACES=3Dy +CONFIG_EXPERT=3Dy +CONFIG_KEXEC=3Dy +CONFIG_CPU_SUBTYPE_SH7751R=3Dy +CONFIG_MEMORY_START=3D0x0c000000 +CONFIG_SH_OF_BOARD=3Dy +CONFIG_HEARTBEAT=3Dy +CONFIG_MODULES=3Dy +CONFIG_MODULE_UNLOAD=3Dy +CONFIG_MODULE_FORCE_UNLOAD=3Dy +CONFIG_FLATMEM_MANUAL=3Dy +CONFIG_NET=3Dy +CONFIG_PACKET=3Dy +CONFIG_UNIX=3Dy +CONFIG_INET=3Dy +CONFIG_IP_ADVANCED_ROUTER=3Dy +CONFIG_IP_PNP=3Dy +# CONFIG_IPV6 is not set +CONFIG_NETFILTER=3Dy +CONFIG_ATALK=3Dm +CONFIG_PCI=3Dy +CONFIG_PCI_SH7751=3Dy +CONFIG_PCCARD=3Dy +CONFIG_YENTA=3Dy +CONFIG_UEVENT_HELPER=3Dy +CONFIG_BLK_DEV_LOOP=3Dy +CONFIG_BLK_DEV_RAM=3Dy +CONFIG_BLK_DEV_SD=3Dy +CONFIG_BLK_DEV_SR=3Dy +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ATA=3Dy +CONFIG_PATA_ARTOP=3Dy +CONFIG_PATA_OF_PLATFORM=3Dy +CONFIG_ATA_GENERIC=3Dy +CONFIG_MD=3Dy +CONFIG_BLK_DEV_MD=3Dm +CONFIG_MD_LINEAR=3Dm +CONFIG_MD_RAID0=3Dm +CONFIG_MD_RAID1=3Dm +CONFIG_NETDEVICES=3Dy +CONFIG_TUN=3Dm +CONFIG_8139CP=3Dy +CONFIG_USB_PEGASUS=3Dm +CONFIG_USB_RTL8150=3Dm +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_SERIAL_SH_SCI=3Dy +CONFIG_SERIAL_SH_SCI_EARLYCON=3Dy +CONFIG_HW_RANDOM=3Dy +CONFIG_SOUND=3Dm +CONFIG_HID_A4TECH=3Dm +CONFIG_HID_BELKIN=3Dm +CONFIG_HID_CHERRY=3Dm +CONFIG_HID_CHICONY=3Dm +CONFIG_HID_CYPRESS=3Dm +CONFIG_HID_EZKEY=3Dm +CONFIG_HID_GYRATION=3Dm +CONFIG_HID_ITE=3Dy +CONFIG_HID_KENSINGTON=3Dy +CONFIG_HID_REDRAGON=3Dy +CONFIG_HID_MICROSOFT=3Dm +CONFIG_HID_MONTEREY=3Dm +CONFIG_HID_PANTHERLORD=3Dm +CONFIG_HID_PETALYNX=3Dm +CONFIG_HID_SAMSUNG=3Dm +CONFIG_HID_SUNPLUS=3Dm +CONFIG_USB_HID=3Dm +CONFIG_USB=3Dy +CONFIG_USB_MON=3Dy +CONFIG_USB_EHCI_HCD=3Dy +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_OHCI_HCD=3Dy +CONFIG_USB_PRINTER=3Dm +CONFIG_USB_STORAGE=3Dm +CONFIG_USB_STORAGE_DATAFAB=3Dm +CONFIG_USB_STORAGE_FREECOM=3Dm +CONFIG_USB_STORAGE_ISD200=3Dm +CONFIG_USB_STORAGE_SDDR09=3Dm +CONFIG_USB_STORAGE_SDDR55=3Dm +CONFIG_USB_STORAGE_JUMPSHOT=3Dm +CONFIG_USB_SERIAL=3Dm +CONFIG_USB_SERIAL_FTDI_SIO=3Dm +CONFIG_USB_SERIAL_PL2303=3Dm +CONFIG_USB_EMI62=3Dm +CONFIG_USB_EMI26=3Dm +CONFIG_USB_SISUSBVGA=3Dm +CONFIG_RENESAS_SH7751_INTC=3Dy +CONFIG_RENESAS_SH7751IRL_INTC=3Dy +CONFIG_EXT2_FS=3Dy +CONFIG_EXT3_FS=3Dy +CONFIG_REISERFS_FS=3Dy +CONFIG_ISO9660_FS=3Dm +CONFIG_MSDOS_FS=3Dy +CONFIG_VFAT_FS=3Dy +CONFIG_NTFS_FS=3Dm +CONFIG_NTFS_RW=3Dy +CONFIG_TMPFS=3Dy +CONFIG_ROMFS_FS=3Dy +CONFIG_UFS_FS=3Dm +CONFIG_NFS_FS=3Dm +CONFIG_NFSD=3Dm +CONFIG_NLS_CODEPAGE_437=3Dy +CONFIG_NLS_CODEPAGE_932=3Dy +CONFIG_INIT_STACK_NONE=3Dy +CONFIG_CRC_T10DIF=3Dy +CONFIG_DEBUG_MEMORY_INIT=3Dy +# CONFIG_FTRACE is not set +CONFIG_SH_STANDARD_BIOS=3Dy --=20 2.39.2 From nobody Sun Dec 28 21:15:26 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A74A9C4167B for ; Tue, 5 Dec 2023 09:47:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235035AbjLEJrb (ORCPT ); Tue, 5 Dec 2023 04:47:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235471AbjLEJrW (ORCPT ); Tue, 5 Dec 2023 04:47:22 -0500 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 673101A2; Tue, 5 Dec 2023 01:47:19 -0800 (PST) Received: from SIOS1075.ysato.name (ZM005235.ppp.dion.ne.jp [222.8.5.235]) by sakura.ysato.name (Postfix) with ESMTPSA id 0AC691C096F; Tue, 5 Dec 2023 18:47:17 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Jernej Skrabec , Chris Morgan , Linus Walleij , Randy Dunlap , Arnd Bergmann , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Vlastimil Babka , Baoquan He , Andrew Morton , Guenter Roeck , Stephen Rothwell , Guo Ren , Javier Martinez Canillas , Azeem Shaikh , Palmer Dabbelt , Bin Meng , Max Filippov , Tom Rix , Herve Codina , Jacky Huang , Lukas Bulwahn , Jonathan Corbet , Biju Das , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Sam Ravnborg , Michael Karcher , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v5 37/37] sh: j2_defconfig: update Date: Tue, 5 Dec 2023 18:45:56 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" I've changed some symbols related to DeviceTree, so let's take care of those changes. Signed-off-by: Yoshinori Sato --- arch/sh/configs/j2_defconfig | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/sh/configs/j2_defconfig b/arch/sh/configs/j2_defconfig index 2eb81ebe3888..cdc8ed244618 100644 --- a/arch/sh/configs/j2_defconfig +++ b/arch/sh/configs/j2_defconfig @@ -1,18 +1,15 @@ -CONFIG_SMP=3Dy CONFIG_SYSVIPC=3Dy CONFIG_POSIX_MQUEUE=3Dy CONFIG_NO_HZ=3Dy CONFIG_HIGH_RES_TIMERS=3Dy CONFIG_CPU_SUBTYPE_J2=3Dy CONFIG_MEMORY_START=3D0x10000000 -CONFIG_MEMORY_SIZE=3D0x04000000 CONFIG_CPU_BIG_ENDIAN=3Dy -CONFIG_SH_DEVICE_TREE=3Dy -CONFIG_SH_JCORE_SOC=3Dy +CONFIG_SH_OF_BOARD=3Dy CONFIG_HZ_100=3Dy +CONFIG_SMP=3Dy CONFIG_CMDLINE_OVERWRITE=3Dy CONFIG_CMDLINE=3D"console=3DttyUL0 earlycon" -CONFIG_BINFMT_ELF_FDPIC=3Dy CONFIG_BINFMT_FLAT=3Dy CONFIG_NET=3Dy CONFIG_PACKET=3Dy @@ -21,7 +18,6 @@ CONFIG_INET=3Dy CONFIG_DEVTMPFS=3Dy CONFIG_DEVTMPFS_MOUNT=3Dy CONFIG_NETDEVICES=3Dy -CONFIG_SERIAL_EARLYCON=3Dy CONFIG_SERIAL_UARTLITE=3Dy CONFIG_SERIAL_UARTLITE_CONSOLE=3Dy CONFIG_I2C=3Dy @@ -30,8 +26,6 @@ CONFIG_SPI_JCORE=3Dy CONFIG_WATCHDOG=3Dy CONFIG_MMC=3Dy CONFIG_MMC_SPI=3Dy -CONFIG_CLKSRC_JCORE_PIT=3Dy -CONFIG_JCORE_AIC=3Dy CONFIG_EXT4_FS=3Dy CONFIG_VFAT_FS=3Dy CONFIG_FAT_DEFAULT_IOCHARSET=3D"ascii" @@ -40,3 +34,4 @@ CONFIG_NLS_DEFAULT=3D"utf8" CONFIG_NLS_CODEPAGE_437=3Dy CONFIG_NLS_ASCII=3Dy CONFIG_NLS_UTF8=3Dy +CONFIG_INIT_STACK_NONE=3Dy --=20 2.39.2