From nobody Thu Dec 18 15:24:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B70E2C25B41 for ; Mon, 23 Oct 2023 14:44:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233701AbjJWOoD (ORCPT ); Mon, 23 Oct 2023 10:44:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233748AbjJWOnp (ORCPT ); Mon, 23 Oct 2023 10:43:45 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82C7C1FC6 for ; Mon, 23 Oct 2023 07:42:27 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id CEC842188E; Mon, 23 Oct 2023 14:42:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1698072145; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IgkfPdLL0JOTUwZlB8Z82NlYikR+ETv1lCssxJ5dRNw=; b=T4ANELya+7eZzKSrlrTqXHdbhHz9Q7GsrHbdikW7vFTLnq1CfFy0SF0z+7K2F8+Mpp9kG7 Kl73rR2m2g0NHJ+8Oq4BsDeZEZaXxTmmNXSo0+LiD20kd7xG30J2N1jEHs8EEdje2G9C91 LjNnETkVoyhH+3EPXwA8YMGp32MN7Vk= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id B673F139C2; Mon, 23 Oct 2023 14:42:25 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id GMlnK1GGNmW9dgAAMHmgww (envelope-from ); Mon, 23 Oct 2023 14:42:25 +0000 From: Andrea della Porta To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nik.borisov@suse.com, arnd@arndb.de, mark.rutland@arm.com, Andrea della Porta Subject: [PATCH v2 1/4] arm64: Introduce aarch32_enabled() Date: Mon, 23 Oct 2023 16:42:20 +0200 Message-ID: <1dec05cc8f54d0b85acffce69d929f13e6d81313.1698069331.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Authentication-Results: smtp-out1.suse.de; none X-Spamd-Result: default: False [-3.72 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_HAM(-1.02)[87.38%]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; REPLY(-4.00)[]; NEURAL_HAM_LONG(-3.00)[-1.000]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-1.00)[-1.000]; RCPT_COUNT_SEVEN(0.00)[8]; MID_CONTAINS_FROM(1.00)[]; FORGED_SENDER(0.30)[andrea.porta@suse.com,aporta@suse.de]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_NEQ_ENVFROM(0.10)[andrea.porta@suse.com,aporta@suse.de]; RCVD_TLS_ALL(0.00)[] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Aarch32 bit support on 64bit kernels depends on whether CONFIG_COMPAT is selected or not. As it is a compile time option it doesn't provide the flexibility to have distributions set their own policy for Aarch32 support and give the user the flexibility to override it. As a first step introduce aarch32_enabled() which abstracts whether 32 bit compat is turned on or off. Upcoming patches will implement the ability to set Aarch32 compat state at boot time. Signed-off-by: Andrea della Porta --- arch/arm64/include/asm/cpufeature.h | 15 +++++++++++++++ arch/arm64/kernel/entry-common.c | 2 ++ 2 files changed, 17 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/c= pufeature.h index 396af9b9c857..1180d68daaff 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -657,6 +657,21 @@ static inline bool supports_clearbhb(int scope) ID_AA64ISAR2_EL1_CLRBHB_SHIFT); } =20 +#ifdef CONFIG_COMPAT +extern bool __aarch32_enabled; + +static inline bool aarch32_enabled(void) +{ + return __aarch32_enabled; +} +#else /* !CONFIG_COMPAT */ + +static inline bool aarch32_enabled(void) +{ + return false; +} +#endif + const struct cpumask *system_32bit_el0_cpumask(void); DECLARE_STATIC_KEY_FALSE(arm64_mismatched_32bit_el0); =20 diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 0fc94207e69a..69ff9b8c0bde 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -877,6 +877,8 @@ asmlinkage void noinstr el0t_32_error_handler(struct pt= _regs *regs) { __el0_error_handler_common(regs); } + +bool __aarch32_enabled __ro_after_init =3D true; #else /* CONFIG_COMPAT */ UNHANDLED(el0t, 32, sync) UNHANDLED(el0t, 32, irq) --=20 2.35.3 From nobody Thu Dec 18 15:24:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30094C00A8F for ; Mon, 23 Oct 2023 14:44:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233749AbjJWOoJ (ORCPT ); Mon, 23 Oct 2023 10:44:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233807AbjJWOnq (ORCPT ); Mon, 23 Oct 2023 10:43:46 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [IPv6:2001:67c:2178:6::1c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C7CA1FD3 for ; Mon, 23 Oct 2023 07:42:28 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 9011B2188F; Mon, 23 Oct 2023 14:42:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1698072146; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ptLMqv6iaACOOpI3/GceNmmJmtBYsEsFiVZhrERtJcU=; b=HpFvhsGRqrkWuoKHGLQpCHaNEeX0hCZU8Ns5O630i2hGaSX8F5c1wRpCrav8t6nLksfcoJ 6UwowYxJJBXRuTNz7bgCFJuvAzm8bfwtOP5kEueXj2qutCxLwiu8lLt+JXWoyQv5JNT7nd +UVGsPwwPFbHAXjdujBBcGqmrw6XfvY= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 73BD2139C2; Mon, 23 Oct 2023 14:42:26 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id WPj+GVKGNmXBdgAAMHmgww (envelope-from ); Mon, 23 Oct 2023 14:42:26 +0000 From: Andrea della Porta To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nik.borisov@suse.com, arnd@arndb.de, mark.rutland@arm.com, Andrea della Porta Subject: [PATCH v2 2/4] arm64/process: Make loading of 32bit processes depend on aarch32_enabled() Date: Mon, 23 Oct 2023 16:42:21 +0200 Message-ID: <2d105c9d8184686fe5aadf646bea7f46ec68ff8b.1698069331.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Authentication-Results: smtp-out1.suse.de; none X-Spamd-Result: default: False [-2.70 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; REPLY(-4.00)[]; NEURAL_HAM_LONG(-3.00)[-1.000]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-1.00)[-1.000]; RCPT_COUNT_SEVEN(0.00)[8]; MID_CONTAINS_FROM(1.00)[]; FORGED_SENDER(0.30)[andrea.porta@suse.com,aporta@suse.de]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_NEQ_ENVFROM(0.10)[andrea.porta@suse.com,aporta@suse.de]; RCVD_TLS_ALL(0.00)[] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Major aspect of Aarch32 support is the ability to load 32bit processes. That's currently decided (among others) by compat_elf_check_arch() and system_supports_32bit_el0(). Make the macro use aarch32_enabled() to decide if Aarch32 compat is enabled before loading a 32bit process. Signed-off-by: Andrea della Porta --- arch/arm64/include/asm/cpufeature.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/c= pufeature.h index 1180d68daaff..778f2f3b2c7d 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -679,8 +679,9 @@ static inline bool system_supports_32bit_el0(void) { u64 pfr0 =3D read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1); =20 - return static_branch_unlikely(&arm64_mismatched_32bit_el0) || - id_aa64pfr0_32bit_el0(pfr0); + return (static_branch_unlikely(&arm64_mismatched_32bit_el0) || + id_aa64pfr0_32bit_el0(pfr0)) && + aarch32_enabled(); } =20 static inline bool system_supports_4kb_granule(void) --=20 2.35.3 From nobody Thu Dec 18 15:24:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BA33C004C0 for ; Mon, 23 Oct 2023 14:44:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233744AbjJWOoF (ORCPT ); Mon, 23 Oct 2023 10:44:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233693AbjJWOnq (ORCPT ); Mon, 23 Oct 2023 10:43:46 -0400 Received: from smtp-out2.suse.de (smtp-out2.suse.de [IPv6:2001:67c:2178:6::1d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 067721FD4 for ; Mon, 23 Oct 2023 07:42:28 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 548FD1FE25; Mon, 23 Oct 2023 14:42:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1698072147; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+I9ud1Xuz1QVsjjSIfjL5lCnrVLHZ6fU43dq2sdHnMY=; b=ZnpY4uBkNksiRZIcuaIZLNFna9sII/TYaINRsWSXNc6OdlfhvABzLZ16+G+q94Tzm7blpJ PMeCt0I7PQHC2/G80z3PJUEFkVOvR8qTtss5N2SydDmRGdI871w6Ja15+iK+hQjWSXzKJn h+cGzSpnfJzOfDwOp68ksqiZVoAEzZo= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 39BE5139C2; Mon, 23 Oct 2023 14:42:27 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id zHHgC1OGNmXFdgAAMHmgww (envelope-from ); Mon, 23 Oct 2023 14:42:27 +0000 From: Andrea della Porta To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nik.borisov@suse.com, arnd@arndb.de, mark.rutland@arm.com, Andrea della Porta Subject: [PATCH v2 3/4] arm64/entry-common: Make Aarch32 exceptions' availability depend on aarch32_enabled() Date: Mon, 23 Oct 2023 16:42:22 +0200 Message-ID: X-Mailer: git-send-email 2.41.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Authentication-Results: smtp-out2.suse.de; none X-Spamd-Result: default: False [-5.70 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_HAM(-3.00)[100.00%]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; REPLY(-4.00)[]; NEURAL_HAM_LONG(-3.00)[-1.000]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-1.00)[-1.000]; RCPT_COUNT_SEVEN(0.00)[8]; MID_CONTAINS_FROM(1.00)[]; FORGED_SENDER(0.30)[andrea.porta@suse.com,aporta@suse.de]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_NEQ_ENVFROM(0.10)[andrea.porta@suse.com,aporta@suse.de]; RCVD_TLS_ALL(0.00)[] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Another major aspect of supporting running of 32bit processes is the ability to access 32bit syscalls and exceptions. Syscalls, in particular, can be invoked by using the svc instruction. If Aarch32 support is disabled ensure that calling svc (or any exceptions) from 32bit context results in the same behavior as if CONFIG_COMPAT has not been enabled (i.e. a kernel panic). Signed-off-by: Andrea della Porta --- arch/arm64/include/asm/exception.h | 7 +++++++ arch/arm64/kernel/entry-common.c | 25 ++++++++++++++++++++++--- 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/ex= ception.h index ad688e157c9b..ccb41ba8d86c 100644 --- a/arch/arm64/include/asm/exception.h +++ b/arch/arm64/include/asm/exception.h @@ -48,6 +48,13 @@ asmlinkage void el0t_32_irq_handler(struct pt_regs *regs= ); asmlinkage void el0t_32_fiq_handler(struct pt_regs *regs); asmlinkage void el0t_32_error_handler(struct pt_regs *regs); =20 +#ifdef CONFIG_COMPAT +asmlinkage void el0t_32_sync_ni_handler(struct pt_regs *regs); +asmlinkage void el0t_32_irq_ni_handler(struct pt_regs *regs); +asmlinkage void el0t_32_fiq_ni_handler(struct pt_regs *regs); +asmlinkage void el0t_32_error_ni_handler(struct pt_regs *regs); +#endif + asmlinkage void call_on_irq_stack(struct pt_regs *regs, void (*func)(struct pt_regs *)); asmlinkage void asm_exit_to_user_mode(struct pt_regs *regs); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 69ff9b8c0bde..32761760d9dd 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -802,6 +802,11 @@ asmlinkage void noinstr el0t_64_error_handler(struct p= t_regs *regs) } =20 #ifdef CONFIG_COMPAT +UNHANDLED(el0t, 32, sync_ni) +UNHANDLED(el0t, 32, irq_ni) +UNHANDLED(el0t, 32, fiq_ni) +UNHANDLED(el0t, 32, error_ni) + static void noinstr el0_cp15(struct pt_regs *regs, unsigned long esr) { enter_from_user_mode(regs); @@ -821,6 +826,11 @@ static void noinstr el0_svc_compat(struct pt_regs *reg= s) =20 asmlinkage void noinstr el0t_32_sync_handler(struct pt_regs *regs) { + if (!aarch32_enabled()) { + el0t_32_sync_ni_handler(regs); + return; + } + unsigned long esr =3D read_sysreg(esr_el1); =20 switch (ESR_ELx_EC(esr)) { @@ -865,17 +875,26 @@ asmlinkage void noinstr el0t_32_sync_handler(struct p= t_regs *regs) =20 asmlinkage void noinstr el0t_32_irq_handler(struct pt_regs *regs) { - __el0_irq_handler_common(regs); + if (!aarch32_enabled()) + el0t_32_irq_ni_handler(regs); + else + __el0_irq_handler_common(regs); } =20 asmlinkage void noinstr el0t_32_fiq_handler(struct pt_regs *regs) { - __el0_fiq_handler_common(regs); + if (!aarch32_enabled()) + el0t_32_fiq_ni_handler(regs); + else + __el0_fiq_handler_common(regs); } =20 asmlinkage void noinstr el0t_32_error_handler(struct pt_regs *regs) { - __el0_error_handler_common(regs); + if (!aarch32_enabled()) + el0t_32_error_ni_handler(regs); + else + __el0_error_handler_common(regs); } =20 bool __aarch32_enabled __ro_after_init =3D true; --=20 2.35.3 From nobody Thu Dec 18 15:24:22 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71FEEC001E0 for ; Mon, 23 Oct 2023 14:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233801AbjJWOoO (ORCPT ); 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bh=iKEUG9SHB6x+trsiRcHBTizDjwB2rC51Fj16Z+SAh18=; b=ZiOCAb8terQeWFu0Gp5FoprPiJsiQ3xSPzR2zvqOyloHHkz2+BgO9CTMpDQIG8xptvpcl6 AUUi8sw6p9HMOn+Szbj2g/ggFZcMNFQ+9rqo6xDw69lSkJ4N7zQDTF0IrZs0Es9DXdDyBN hIO56oQg5WXvA4kFIATudttPc18+x+Y= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id E62B5139C2; Mon, 23 Oct 2023 14:42:27 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id mLeKNlOGNmXLdgAAMHmgww (envelope-from ); Mon, 23 Oct 2023 14:42:27 +0000 From: Andrea della Porta To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: nik.borisov@suse.com, arnd@arndb.de, mark.rutland@arm.com, Andrea della Porta Subject: [PATCH v2 4/4] arm64: Make Aarch32 support boot time configurable Date: Mon, 23 Oct 2023 16:42:23 +0200 Message-ID: X-Mailer: git-send-email 2.41.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Authentication-Results: smtp-out2.suse.de; none X-Spamd-Result: default: False [-5.70 / 50.00]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; BAYES_HAM(-3.00)[100.00%]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; R_MISSING_CHARSET(2.50)[]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; REPLY(-4.00)[]; NEURAL_HAM_LONG(-3.00)[-1.000]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-1.00)[-1.000]; RCPT_COUNT_SEVEN(0.00)[8]; MID_CONTAINS_FROM(1.00)[]; FORGED_SENDER(0.30)[andrea.porta@suse.com,aporta@suse.de]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_NEQ_ENVFROM(0.10)[andrea.porta@suse.com,aporta@suse.de]; RCVD_TLS_ALL(0.00)[] Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Distributions would like to reduce their attack surface as much as possible but at the same time they'd want to retain flexibility to cater to a variety of legacy software. This stems from the conjecture that compat layer is likely rarely tested and could have latent security bugs. Ideally distributions will set their default policy and also give users the ability to override it as appropriate. To enable this use case, introduce CONFIG_AARCH32_SUPPORT_DEFAULT_DISABLED compile time option, which controls whether 32bit processes/exceptions should be allowed or not. This option is aimed mainly at distributions to set their preferred default behavior in their kernels. To allow users to override the distro's policy, introduce the 'allow_32bit_el0' parameter which allows overriding CONFIG_AARCH32_SUPPORT_DEFAULT_DISABLED state at boot time. Signed-off-by: Andrea della Porta --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ arch/arm64/Kconfig | 9 +++++++++ arch/arm64/kernel/entry-common.c | 8 +++++++- 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentatio= n/admin-guide/kernel-parameters.txt index 0a1731a0f0ef..9752c4640bd7 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1,3 +1,10 @@ + allow_32bit_el0=3D [ARM64] + Format: + When true, allows loading 32-bit programs and executing + 32-bit syscalls and exceptions, essentially overriding + AARCH32_SUPPORT_DEFAULT_DISABLED at boot time. when false, + unconditionally disables AARCH32 support. + acpi=3D [HW,ACPI,X86,ARM64,RISCV64] Advanced Configuration and Power Interface Format: { force | on | off | strict | noirq | rsdt | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index b10515c0200b..c8e1b3535018 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1725,6 +1725,15 @@ config SETEND_EMULATION If unsure, say Y endif # ARMV8_DEPRECATED =20 +config AARCH32_SUPPORT_DEFAULT_DISABLED + bool "Aarch32 support disabled by default" + default n + depends on COMPAT + help + Make Aarch32 support disabled by default. This prevents loading 32-bit + processes and access to 32-bit syscalls and exceptions. + + If unsure, leave it to its default value. endif # COMPAT =20 menu "ARMv8.1 architectural features" diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index 32761760d9dd..7698057ef4ce 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -897,7 +897,13 @@ asmlinkage void noinstr el0t_32_error_handler(struct p= t_regs *regs) __el0_error_handler_common(regs); } =20 -bool __aarch32_enabled __ro_after_init =3D true; +bool __aarch32_enabled __ro_after_init =3D !IS_ENABLED(CONFIG_AARCH32_SUPP= ORT_DEFAULT_DISABLED); + +static int aarch32_support_override_cmdline(char *arg) +{ + return kstrtobool(arg, &__aarch32_enabled); +} +early_param("allow_32bit_el0", aarch32_support_override_cmdline); #else /* CONFIG_COMPAT */ UNHANDLED(el0t, 32, sync) UNHANDLED(el0t, 32, irq) --=20 2.35.3