From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7120DC64ED8 for ; Mon, 27 Feb 2023 16:54:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230254AbjB0Qy2 (ORCPT ); Mon, 27 Feb 2023 11:54:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230235AbjB0QyZ (ORCPT ); Mon, 27 Feb 2023 11:54:25 -0500 Received: from mail-qv1-xf31.google.com (mail-qv1-xf31.google.com [IPv6:2607:f8b0:4864:20::f31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5924AE060 for ; Mon, 27 Feb 2023 08:54:24 -0800 (PST) Received: by mail-qv1-xf31.google.com with SMTP id nv15so4845650qvb.7 for ; Mon, 27 Feb 2023 08:54:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wzM1FyAgchik+Dup/9deHHYpfXbDm5/FZoytx5b+K08=; b=P3B1CjO7qxyvgQxciO8LtZPx0qQ7K7ufxl/u3qOJDYVbZUKF/qBizuKzBZUJDtsVNH O4p120fia7Hq8Y5zVkTXDvJKdIsszlX6C2ddx+pg1PdIblSgCuvi/w37L11SG0g1Mjpn I18BQIC67zKRlGj9n/gBk+kdqj3l8heqLwbzIEVP85poUcGT3sKBBtdzCecVXT18vGD7 ZW6kVzSpoSHhxdrB6uO3hTTE10JHop/JsxtRHGWd85/3tRjkOuegWw3GSNdF5ExoI0Lj s7QbsV1RpPxFN5nydD8Ni+mp6jsL3+lTMTVOtJNF3p4HO+uTSdj5S1y7ao8tI9eLdvXv jBgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wzM1FyAgchik+Dup/9deHHYpfXbDm5/FZoytx5b+K08=; b=jXuKI5GSAaLHOy0fkXVi1hkDESY6Sv5KjS0hFJHhpfncOVjmKBaKtaFq73HMsezdg4 3EEywIvkj2FTFXqemOk+IzyoQ1ABGFeebAmCvm2rvyJBqJ4yRhC1fSuYI6QqPnhCXQ7W dotKZeEdiJC+v2S4H+WtKX0zOAIu5IW/xH+JqsHYqWI58Z5OflzhCzhH+Qp1FV3lH14s lGIOBOib4B8Dcz2b8HgcKrnWZTIiQYMThlJNuiJQUpZ7R2vz6HJ4aVSz+Vt9JfMmVK8H +X5Dspyo4ZdP3q4x29ngnni7BLl8VFychnrBgpCV6jOHH+zZw5CZY7auFi/mgawywXV4 NSzw== X-Gm-Message-State: AO0yUKVBsXRVWsgW8g/RaYObAx0oyQHe4Sis9nzFGgdUjjJdUxDiq7jn +ML9IBk7klmGZUYlFY1dFwaUjg== X-Google-Smtp-Source: AK7set+wTzIvkGOdefHpA+JETrYPiVIYbUJHm8fXQx13Fj4p8cwr3eY0I0JtnJOs9XM4PR3wZIMDZA== X-Received: by 2002:a05:6214:f09:b0:570:bf43:48e with SMTP id gw9-20020a0562140f0900b00570bf43048emr182116qvb.30.1677516863465; Mon, 27 Feb 2023 08:54:23 -0800 (PST) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:23 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 1/6] regmap-irq: Add no_status support Date: Mon, 27 Feb 2023 11:45:22 -0500 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some devices lack status registers, yet expect to handle interrupts. Introduce a no_status flag to indicate such a configuration, where rather than read a status register to verify, all interrupts received are assumed to be active. Cc: Mark Brown Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- Changes in v2: - Utilize memset32() to set status_buf for no_status case - Utilize GENMASK() to generate status_buf mask - Move no_status kernel doc line under runtime_pm line drivers/base/regmap/regmap-irq.c | 22 +++++++++++++++------- include/linux/regmap.h | 2 ++ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-= irq.c index a8f185430a07..290e26664a21 100644 --- a/drivers/base/regmap/regmap-irq.c +++ b/drivers/base/regmap/regmap-irq.c @@ -437,7 +437,10 @@ static irqreturn_t regmap_irq_thread(int irq, void *d) * possible in order to reduce the I/O overheads. */ =20 - if (chip->num_main_regs) { + if (chip->no_status) { + /* no status register so default to all active */ + memset32(data->status_buf, GENMASK(31, 0), chip->num_regs); + } else if (chip->num_main_regs) { unsigned int max_main_bits; unsigned long size; =20 @@ -967,12 +970,17 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *= fwnode, continue; =20 /* Ack masked but set interrupts */ - reg =3D d->get_irq_reg(d, d->chip->status_base, i); - ret =3D regmap_read(map, reg, &d->status_buf[i]); - if (ret !=3D 0) { - dev_err(map->dev, "Failed to read IRQ status: %d\n", - ret); - goto err_alloc; + if (d->chip->no_status) { + /* no status register so default to all active */ + d->status_buf[i] =3D GENMASK(31, 0); + } else { + reg =3D d->get_irq_reg(d, d->chip->status_base, i); + ret =3D regmap_read(map, reg, &d->status_buf[i]); + if (ret !=3D 0) { + dev_err(map->dev, "Failed to read IRQ status: %d\n", + ret); + goto err_alloc; + } } =20 if (chip->status_invert) diff --git a/include/linux/regmap.h b/include/linux/regmap.h index a3bc695bcca0..c6d80d4e73de 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -1564,6 +1564,7 @@ struct regmap_irq_chip_data; * the need for a @sub_reg_offsets table. * @status_invert: Inverted status register: cleared bits are active inter= rupts. * @runtime_pm: Hold a runtime PM lock on the device when accessing it. + * @no_status: No status register: all interrupts assumed generated by dev= ice. * * @num_regs: Number of registers in each control bank. * @irqs: Descriptors for individual IRQs. Interrupt numbers are @@ -1630,6 +1631,7 @@ struct regmap_irq_chip { unsigned int clear_on_unmask:1; unsigned int not_fixed_stride:1; unsigned int status_invert:1; + unsigned int no_status:1; =20 int num_regs; =20 --=20 2.39.2 From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F0C8C7EE30 for ; Mon, 27 Feb 2023 16:54:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230282AbjB0Qyb (ORCPT ); Mon, 27 Feb 2023 11:54:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230242AbjB0Qy0 (ORCPT ); Mon, 27 Feb 2023 11:54:26 -0500 Received: from mail-qv1-xf29.google.com (mail-qv1-xf29.google.com [IPv6:2607:f8b0:4864:20::f29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6522816AED for ; Mon, 27 Feb 2023 08:54:25 -0800 (PST) Received: by mail-qv1-xf29.google.com with SMTP id ev13so4836358qvb.10 for ; Mon, 27 Feb 2023 08:54:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aL8rTLnPI0v/Bf06uo5tSLz64haWBpxVRoB2gA76eRA=; b=VKAf7oy0X5iS4amGN3vs+O8lZCfYImCXu71dohaP3yvGeZE7rx+FWjJiffiXUV7KR1 9fGoTzG1OmxvLWGvDNme/zf9aUe46VXBFNfDGcJDVK7zLbCioJOn0RQvEsmTM3FAvBaC 5+JE+fQebeux8d5lGccVEeInYnY/3YCrilCxa9XQSPDJ1Pd7NQiApFjmNWvkOH1FR/Dz s2BDQV1bOlF1YAI3svRVXt+p9CntMHufYFIsdSwt57q9ZU9dz+3MTStgzvf2zIY84Kbu si6w2CyGLXfoBzbzIV8LhlhtvbWEk6cuJoHNQO8Cq1OMXsGMKhDHlDR6NhBLKgR2nkiv J7wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aL8rTLnPI0v/Bf06uo5tSLz64haWBpxVRoB2gA76eRA=; b=veqO25riz30BHlV5rxOqUMYmrSeMvnYxcMQi+kAsoVVo7K+lCWUGGncLYTgsZcDv7Z LtexML26pJHxMpkohaxDYyEm+3aO1DnAinr3R8bVjnXCJRO+IrlGMbCQt7wb9fR51kw9 qBxti9Sc59t8HvRNOCwYzTfvBi9wcX34US8YNEx77um3OZUynMZdS7ejm5ZfsQ4gvHy9 qiupMiPBXsKKG4PBbYEKjMbNdUnvOlsZPLO7NLde4XkcexQjOr5uNT1+O1ABl1aVrite fBA8dYhSf8iaEmk4dc0SLWak7FzcubuIDM9rrgEeMPgrT17v7FaRkmWEH/8dodiMzXFh 8AWQ== X-Gm-Message-State: AO0yUKW57o0kbgmZCm4LJxLEhhy1kJmSx+rZK0mXJbp2G/+QTHDomGRV adtoLRdX6/6CZh/WJiVUTSEWJw== X-Google-Smtp-Source: AK7set8zLN1AA1N7+2q0wTgldIqfC342d5e7Pg8O4fzHJgoAE8tAxTig4vC3K43uw2zmIJDFNojFQw== X-Received: by 2002:ad4:5d68:0:b0:56e:b251:a8e7 with SMTP id fn8-20020ad45d68000000b0056eb251a8e7mr401934qvb.2.1677516864521; Mon, 27 Feb 2023 08:54:24 -0800 (PST) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:24 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 2/6] gpio: 104-dio-48e: Utilize no_status regmap-irq flag Date: Mon, 27 Feb 2023 11:45:23 -0500 Message-Id: <06fd817ac5549d039e9d04b227ca7b310f36aedb.1677515341.git.william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The 104-DIO-48E lacks an IRQ status register. Rather than use the Clear Interrupt register as the status register, set the no_status flag to true and thus avoid such a hack. Reviewed-by: Andy Shevchenko Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- drivers/gpio/gpio-104-dio-48e.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48= e.c index a3846faf3780..fe3c93bfe4bd 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -195,13 +195,9 @@ static int dio48e_probe(struct device *dev, unsigned i= nt id) return -ENOMEM; =20 chip->name =3D name; - /* No IRQ status register so use CLEAR_INTERRUPT register instead */ - chip->status_base =3D DIO48E_CLEAR_INTERRUPT; chip->mask_base =3D DIO48E_ENABLE_INTERRUPT; chip->ack_base =3D DIO48E_CLEAR_INTERRUPT; - /* CLEAR_INTERRUPT doubles as status register so we need it cleared */ - chip->clear_ack =3D true; - chip->status_invert =3D true; + chip->no_status =3D true; chip->num_regs =3D 1; chip->irqs =3D dio48e_regmap_irqs; chip->num_irqs =3D ARRAY_SIZE(dio48e_regmap_irqs); --=20 2.39.2 From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDCE6C64ED6 for ; Mon, 27 Feb 2023 16:54:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230292AbjB0Qyd (ORCPT ); Mon, 27 Feb 2023 11:54:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230256AbjB0Qy2 (ORCPT ); Mon, 27 Feb 2023 11:54:28 -0500 Received: from mail-qt1-x836.google.com (mail-qt1-x836.google.com [IPv6:2607:f8b0:4864:20::836]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8220AF76E for ; Mon, 27 Feb 2023 08:54:26 -0800 (PST) Received: by mail-qt1-x836.google.com with SMTP id r5so7385011qtp.4 for ; Mon, 27 Feb 2023 08:54:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wqZbck9k7lqa+7lxepbNe41g6KFQ2hdxPmRTuBbTpdU=; b=lEh61KKJK1xYRrtDRyxw2eXbiU3wDGZUIAhYWbgBaNrMz+g5o67m0EtWZr/qT8M1iB sLCL7F8zbx1T7sj9+UKtHw88B9+9kIzl1dB46lZVTBX9+RN5UhJ6CloJK7HHTTDr/2bJ 9FlWsiIlkvywzby7wzstQcIfZT6vn5sm49bz8GOFSuU9wr8ByubQthRdCINrAvxdqbHq NwfVGgHo7Zj1DX1MmwzOpUfuUyCE9bOQ0td3ZenNY4ZaPhGGI5fWQBVzE5A8GXL3DN0J jTlFiv7ysGOcBphAxdV9UosvuE0K3d5FOcS/4r7CeqGhNx9GRGsng2ZUZdglh9NVHaN3 QiAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wqZbck9k7lqa+7lxepbNe41g6KFQ2hdxPmRTuBbTpdU=; b=SpVLNQ9Vn1Md0TDViEo3AL7b8iTd8RmMddCubluzh+q+gzTWSFWlJqmtFM2Ea3WwEF lb/JhSQ1GcD9vPtFldBmwfTnqB0GvySI51+jV5C5Lc2vl7+VOShd1jPMUI+YS1EQf4Gr W08ZI96Pvef/Ldphpbl8GW4slSDjv7Z1KyJ9jNSGJ9HJdM+2IB6Qxc3nvDqIKoVDqUo6 sgWgXBahDl4GyU9S74mRHl+q23b+++k5VT3zkBiZtuo+G7qqK87SHHIUIUrikfKy9INz 7Sk7aOUEh3N4w0Ioekg9NfQnd/13KbeUhu31t2UuV1dOyxCSMKSWMmyDG0r2fEh98sny MB7g== X-Gm-Message-State: AO0yUKUqEZ5VyVJAuA7hmV7cyGy8c8KS2QPGCf7Qn4vhabRQWISrfga9 /R5afuqQ4EyN5nzQ1mQmp9YRhQ== X-Google-Smtp-Source: AK7set+2MAGqnyjzk/Qd4y1RKr3YPZQnEXJu6ICcEeayx25KNgc4QzVSIDRA0gpLZS1t/Ib9BvOSZA== X-Received: by 2002:ac8:4e4d:0:b0:3bd:1728:8881 with SMTP id e13-20020ac84e4d000000b003bd17288881mr34812279qtw.19.1677516865562; Mon, 27 Feb 2023 08:54:25 -0800 (PST) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:25 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 3/6] gpio: idio-16: Migrate to the regmap API Date: Mon, 27 Feb 2023 11:45:24 -0500 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. By leveraging the regmap API, the idio-16 library is reduced to simply a devm_idio_16_regmap_register() function and a configuration structure struct idio_16_regmap_config. Legacy functions and code will be removed once all consumers have migrated to the new idio-16 library interface. For IDIO-16 devices we have the following IRQ registers: Base Address +1 (Write): Clear Interrupt Base Address +2 (Read): Enable Interrupt Base Address +2 (Write): Disable Interrupt An interrupt is asserted whenever a change-of-state is detected on any of the inputs. Any write to 0x2 will disable interrupts, while any read will enable interrupts. Interrupts are cleared by a write to 0x1. For 104-IDIO-16 devices, there is no IRQ status register, so software has to assume that if an interrupt is raised then it was for the 104-IDIO-16 device. For PCI-IDIO-16 devices, there is an additional IRQ register: Base Address +6 (Read): Interrupt Status Interrupt status can be read from 0x6 where bit 2 set indicates that an IRQ has been generated. Reviewed-by: Andy Shevchenko Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- Changes in v2: - Add comma to end of idio_16_names initialization list drivers/gpio/Kconfig | 3 + drivers/gpio/gpio-idio-16.c | 158 ++++++++++++++++++++++++++++++++++++ drivers/gpio/gpio-idio-16.h | 28 +++++++ 3 files changed, 189 insertions(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 406e8bda487f..b4de83a3616d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -111,6 +111,9 @@ config GPIO_MAX730X =20 config GPIO_IDIO_16 tristate + select REGMAP_IRQ + select GPIOLIB_IRQCHIP + select GPIO_REGMAP help Enables support for the idio-16 library functions. The idio-16 library provides functions to facilitate communication with devices within the diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c index 13315242d220..13e35d1ef658 100644 --- a/drivers/gpio/gpio-idio-16.c +++ b/drivers/gpio/gpio-idio-16.c @@ -4,9 +4,13 @@ * Copyright (C) 2022 William Breathitt Gray */ #include +#include +#include #include +#include #include #include +#include #include #include =20 @@ -14,6 +18,160 @@ =20 #define DEFAULT_SYMBOL_NAMESPACE GPIO_IDIO_16 =20 +#define IDIO_16_DAT_BASE 0x0 +#define IDIO_16_OUT_BASE IDIO_16_DAT_BASE +#define IDIO_16_IN_BASE (IDIO_16_DAT_BASE + 1) +#define IDIO_16_CLEAR_INTERRUPT 0x1 +#define IDIO_16_ENABLE_IRQ 0x2 +#define IDIO_16_DEACTIVATE_INPUT_FILTERS 0x3 +#define IDIO_16_DISABLE_IRQ IDIO_16_ENABLE_IRQ +#define IDIO_16_INTERRUPT_STATUS 0x6 + +#define IDIO_16_NGPIO 32 +#define IDIO_16_NGPIO_PER_REG 8 +#define IDIO_16_REG_STRIDE 4 + +static int idio_16_handle_mask_sync(struct regmap *const map, const int in= dex, + const unsigned int mask_buf_def, + const unsigned int mask_buf, + void *const irq_drv_data) +{ + unsigned int *const irq_mask =3D irq_drv_data; + const unsigned int prev_mask =3D *irq_mask; + int err; + unsigned int val; + + /* exit early if no change since the previous mask */ + if (mask_buf =3D=3D prev_mask) + return 0; + + /* remember the current mask for the next mask sync */ + *irq_mask =3D mask_buf; + + /* if all previously masked, enable interrupts when unmasking */ + if (prev_mask =3D=3D mask_buf_def) { + err =3D regmap_write(map, IDIO_16_CLEAR_INTERRUPT, 0x00); + if (err) + return err; + return regmap_read(map, IDIO_16_ENABLE_IRQ, &val); + } + + /* if all are currently masked, disable interrupts */ + if (mask_buf =3D=3D mask_buf_def) + return regmap_write(map, IDIO_16_DISABLE_IRQ, 0x00); + + return 0; +} + +static int idio_16_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int b= ase, + unsigned int offset, unsigned int *reg, + unsigned int *mask) +{ + unsigned int stride; + + if (base !=3D IDIO_16_DAT_BASE) { + /* Should never reach this path */ + return -EINVAL; + } + + /* Input lines start at GPIO 16 */ + if (offset < 16) { + stride =3D offset / IDIO_16_NGPIO_PER_REG; + *reg =3D IDIO_16_OUT_BASE + stride * IDIO_16_REG_STRIDE; + } else { + stride =3D (offset - 16) / IDIO_16_NGPIO_PER_REG; + *reg =3D IDIO_16_IN_BASE + stride * IDIO_16_REG_STRIDE; + } + + *mask =3D BIT(offset % IDIO_16_NGPIO_PER_REG); + + return 0; +} + +static const char *idio_16_names[IDIO_16_NGPIO] =3D { + "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", + "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", + "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", + "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15", +}; + +/** + * devm_idio_16_regmap_register - Register an IDIO-16 GPIO device + * @dev: device that is registering this IDIO-16 GPIO device + * @config: configuration for idio_16_regmap_config + * + * Registers an IDIO-16 GPIO device. Returns 0 on success and negative err= or + * number on failure. + */ +int devm_idio_16_regmap_register(struct device *const dev, + const struct idio_16_regmap_config *const config) +{ + struct gpio_regmap_config gpio_config =3D {}; + int err; + struct regmap_irq_chip *chip; + unsigned int irq_mask; + struct regmap_irq_chip_data *chip_data; + + if (!config->parent) + return -EINVAL; + + if (!config->map) + return -EINVAL; + + if (!config->regmap_irqs) + return -EINVAL; + + chip =3D devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->irq_drv_data =3D devm_kzalloc(dev, sizeof(irq_mask), GFP_KERNEL); + if (!chip->irq_drv_data) + return -ENOMEM; + + chip->name =3D dev_name(dev); + chip->status_base =3D IDIO_16_INTERRUPT_STATUS; + chip->mask_base =3D IDIO_16_ENABLE_IRQ; + chip->ack_base =3D IDIO_16_CLEAR_INTERRUPT; + chip->no_status =3D config->no_status; + chip->num_regs =3D 1; + chip->irqs =3D config->regmap_irqs; + chip->num_irqs =3D config->num_regmap_irqs; + chip->handle_mask_sync =3D idio_16_handle_mask_sync; + + /* Disable IRQ to prevent spurious interrupts before we're ready */ + err =3D regmap_write(config->map, IDIO_16_DISABLE_IRQ, 0x00); + if (err) + return err; + + err =3D devm_regmap_add_irq_chip(dev, config->map, config->irq, 0, 0, + chip, &chip_data); + if (err) + return dev_err_probe(dev, err, "IRQ registration failed\n"); + + if (config->filters) { + /* Deactivate input filters */ + err =3D regmap_write(config->map, + IDIO_16_DEACTIVATE_INPUT_FILTERS, 0x00); + if (err) + return err; + } + + gpio_config.parent =3D config->parent; + gpio_config.regmap =3D config->map; + gpio_config.ngpio =3D IDIO_16_NGPIO; + gpio_config.names =3D idio_16_names; + gpio_config.reg_dat_base =3D GPIO_REGMAP_ADDR(IDIO_16_DAT_BASE); + gpio_config.reg_set_base =3D GPIO_REGMAP_ADDR(IDIO_16_DAT_BASE); + gpio_config.ngpio_per_reg =3D IDIO_16_NGPIO_PER_REG; + gpio_config.reg_stride =3D IDIO_16_REG_STRIDE; + gpio_config.irq_domain =3D regmap_irq_get_domain(chip_data); + gpio_config.reg_mask_xlate =3D idio_16_reg_mask_xlate; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); +} +EXPORT_SYMBOL_GPL(devm_idio_16_regmap_register); + /** * idio_16_get - get signal value at signal offset * @reg: ACCES IDIO-16 device registers diff --git a/drivers/gpio/gpio-idio-16.h b/drivers/gpio/gpio-idio-16.h index 928f8251a2bd..22bb591b4ec0 100644 --- a/drivers/gpio/gpio-idio-16.h +++ b/drivers/gpio/gpio-idio-16.h @@ -6,6 +6,30 @@ #include #include =20 +struct device; +struct regmap; +struct regmap_irq; + +/** + * struct idio_16_regmap_config - Configuration for the IDIO-16 register m= ap + * @parent: parent device + * @map: regmap for the IDIO-16 device + * @regmap_irqs: descriptors for individual IRQs + * @num_regmap_irqs: number of IRQ descriptors + * @irq: IRQ number for the IDIO-16 device + * @no_status: device has no status register + * @filters: device has input filters + */ +struct idio_16_regmap_config { + struct device *parent; + struct regmap *map; + const struct regmap_irq *regmap_irqs; + int num_regmap_irqs; + unsigned int irq; + bool no_status; + bool filters; +}; + /** * struct idio_16 - IDIO-16 registers structure * @out0_7: Read: FET Drive Outputs 0-7 @@ -39,6 +63,7 @@ struct idio_16 { * struct idio_16_state - IDIO-16 state structure * @lock: synchronization lock for accessing device state * @out_state: output signals state + * @irq_mask: IRQ mask state */ struct idio_16_state { spinlock_t lock; @@ -68,4 +93,7 @@ void idio_16_set_multiple(struct idio_16 __iomem *reg, const unsigned long *mask, const unsigned long *bits); void idio_16_state_init(struct idio_16_state *state); =20 +int devm_idio_16_regmap_register(struct device *dev, + const struct idio_16_regmap_config *config); + #endif /* _IDIO_16_H_ */ --=20 2.39.2 From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBDF9C7EE2E for ; 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:26 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 4/6] gpio: 104-idio-16: Migrate to the regmap API Date: Mon, 27 Feb 2023 11:45:25 -0500 Message-Id: <4df4bbdd404b27eafd6e76b44ec46375fb76ef79.1677515341.git.william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. Migrate the 104-idio-16 module to the new idio-16 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-104-idio-16.c | 294 ++++++++------------------------ 2 files changed, 72 insertions(+), 224 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b4de83a3616d..8eb1f21c019e 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -863,7 +863,7 @@ config GPIO_104_IDIO_16 tristate "ACCES 104-IDIO-16 GPIO support" depends on PC104 select ISA_BUS_API - select GPIOLIB_IRQCHIP + select REGMAP_MMIO select GPIO_IDIO_16 help Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16, diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-1= 6.c index 098fbefdbe22..79d3a089061e 100644 --- a/drivers/gpio/gpio-104-idio-16.c +++ b/drivers/gpio/gpio-104-idio-16.c @@ -6,19 +6,16 @@ * This driver supports the following ACCES devices: 104-IDIO-16, * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8. */ -#include +#include #include -#include -#include -#include +#include #include -#include -#include +#include #include #include #include #include -#include +#include #include =20 #include "gpio-idio-16.h" @@ -36,187 +33,69 @@ static unsigned int num_irq; module_param_hw_array(irq, uint, irq, &num_irq, 0); MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers"); =20 -/** - * struct idio_16_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip - * @lock: synchronization lock to prevent I/O race conditions - * @irq_mask: I/O bits affected by interrupts - * @reg: I/O address offset for the device registers - * @state: ACCES IDIO-16 device state - */ -struct idio_16_gpio { - struct gpio_chip chip; - raw_spinlock_t lock; - unsigned long irq_mask; - struct idio_16 __iomem *reg; - struct idio_16_state state; +static const struct regmap_range idio_16_wr_ranges[] =3D { + regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x4), }; - -static int idio_16_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) -{ - if (idio_16_get_direction(offset)) - return GPIO_LINE_DIRECTION_IN; - - return GPIO_LINE_DIRECTION_OUT; -} - -static int idio_16_gpio_direction_input(struct gpio_chip *chip, - unsigned int offset) -{ - return 0; -} - -static int idio_16_gpio_direction_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - chip->set(chip, offset, value); - return 0; -} - -static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset); -} - -static int idio_16_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); - - return 0; -} - -static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); -} - -static void idio_16_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); -} - -static void idio_16_irq_ack(struct irq_data *data) -{ -} - -static void idio_16_irq_mask(struct irq_data *data) -{ - struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned long offset =3D irqd_to_hwirq(data); - unsigned long flags; - - idio16gpio->irq_mask &=3D ~BIT(offset); - gpiochip_disable_irq(chip, offset); - - if (!idio16gpio->irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - iowrite8(0, &idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static void idio_16_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned long offset =3D irqd_to_hwirq(data); - const unsigned long prev_irq_mask =3D idio16gpio->irq_mask; - unsigned long flags; - - gpiochip_enable_irq(chip, offset); - idio16gpio->irq_mask |=3D BIT(offset); - - if (!prev_irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - ioread8(&idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_t= ype) -{ - /* The only valid irq types are none and both-edges */ - if (flow_type !=3D IRQ_TYPE_NONE && - (flow_type & IRQ_TYPE_EDGE_BOTH) !=3D IRQ_TYPE_EDGE_BOTH) - return -EINVAL; - - return 0; -} - -static const struct irq_chip idio_16_irqchip =3D { - .name =3D "104-idio-16", - .irq_ack =3D idio_16_irq_ack, - .irq_mask =3D idio_16_irq_mask, - .irq_unmask =3D idio_16_irq_unmask, - .irq_set_type =3D idio_16_irq_set_type, - .flags =3D IRQCHIP_IMMUTABLE, - GPIOCHIP_IRQ_RESOURCE_HELPERS, +static const struct regmap_range idio_16_rd_ranges[] =3D { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x5), }; - -static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) -{ - struct idio_16_gpio *const idio16gpio =3D dev_id; - struct gpio_chip *const chip =3D &idio16gpio->chip; - int gpio; - - for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) - generic_handle_domain_irq(chip->irq.domain, gpio); - - raw_spin_lock(&idio16gpio->lock); - - iowrite8(0, &idio16gpio->reg->in0_7); - - raw_spin_unlock(&idio16gpio->lock); - - return IRQ_HANDLED; -} - -#define IDIO_16_NGPIO 32 -static const char *idio_16_names[IDIO_16_NGPIO] =3D { - "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", - "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", - "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", - "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15" +static const struct regmap_range idio_16_volatile_ranges[] =3D { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x5), +}; +static const struct regmap_range idio_16_precious_ranges[] =3D { + regmap_reg_range(0x2, 0x2), +}; +static const struct regmap_access_table idio_16_wr_table =3D { + .yes_ranges =3D idio_16_wr_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_wr_ranges), +}; +static const struct regmap_access_table idio_16_rd_table =3D { + .yes_ranges =3D idio_16_rd_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_rd_ranges), +}; +static const struct regmap_access_table idio_16_volatile_table =3D { + .yes_ranges =3D idio_16_volatile_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_volatile_ranges), +}; +static const struct regmap_access_table idio_16_precious_table =3D { + .yes_ranges =3D idio_16_precious_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_precious_ranges), +}; +static const struct regmap_config idio_16_regmap_config =3D { + .reg_bits =3D 8, + .reg_stride =3D 1, + .val_bits =3D 8, + .io_port =3D true, + .max_register =3D 0x5, + .wr_table =3D &idio_16_wr_table, + .rd_table =3D &idio_16_rd_table, + .volatile_table =3D &idio_16_volatile_table, + .precious_table =3D &idio_16_precious_table, + .cache_type =3D REGCACHE_FLAT, }; =20 -static int idio_16_irq_init_hw(struct gpio_chip *gc) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(gc); - - /* Disable IRQ by default */ - iowrite8(0, &idio16gpio->reg->irq_ctl); - iowrite8(0, &idio16gpio->reg->in0_7); +/* Only input lines (GPIO 16-31) support interrupts */ +#define IDIO_16_REGMAP_IRQ(_id) \ + [16 + _id] =3D { \ + .mask =3D BIT(_id), \ + .type =3D { .types_supported =3D IRQ_TYPE_EDGE_BOTH }, \ + } =20 - return 0; -} +static const struct regmap_irq idio_16_regmap_irqs[] =3D { + IDIO_16_REGMAP_IRQ(0), IDIO_16_REGMAP_IRQ(1), IDIO_16_REGMAP_IRQ(2), /* 0= -2 */ + IDIO_16_REGMAP_IRQ(3), IDIO_16_REGMAP_IRQ(4), IDIO_16_REGMAP_IRQ(5), /* 3= -5 */ + IDIO_16_REGMAP_IRQ(6), IDIO_16_REGMAP_IRQ(7), IDIO_16_REGMAP_IRQ(8), /* 6= -8 */ + IDIO_16_REGMAP_IRQ(9), IDIO_16_REGMAP_IRQ(10), IDIO_16_REGMAP_IRQ(11), /*= 9-11 */ + IDIO_16_REGMAP_IRQ(12), IDIO_16_REGMAP_IRQ(13), IDIO_16_REGMAP_IRQ(14), /= * 12-14 */ + IDIO_16_REGMAP_IRQ(15), /* 15 */ +}; =20 static int idio_16_probe(struct device *dev, unsigned int id) { - struct idio_16_gpio *idio16gpio; const char *const name =3D dev_name(dev); - struct gpio_irq_chip *girq; - int err; - - idio16gpio =3D devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); - if (!idio16gpio) - return -ENOMEM; + struct idio_16_regmap_config config =3D {}; + void __iomem *regs; + struct regmap *map; =20 if (!devm_request_region(dev, base[id], IDIO_16_EXTENT, name)) { dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", @@ -224,54 +103,23 @@ static int idio_16_probe(struct device *dev, unsigned= int id) return -EBUSY; } =20 - idio16gpio->reg =3D devm_ioport_map(dev, base[id], IDIO_16_EXTENT); - if (!idio16gpio->reg) + regs =3D devm_ioport_map(dev, base[id], IDIO_16_EXTENT); + if (!regs) return -ENOMEM; =20 - idio16gpio->chip.label =3D name; - idio16gpio->chip.parent =3D dev; - idio16gpio->chip.owner =3D THIS_MODULE; - idio16gpio->chip.base =3D -1; - idio16gpio->chip.ngpio =3D IDIO_16_NGPIO; - idio16gpio->chip.names =3D idio_16_names; - idio16gpio->chip.get_direction =3D idio_16_gpio_get_direction; - idio16gpio->chip.direction_input =3D idio_16_gpio_direction_input; - idio16gpio->chip.direction_output =3D idio_16_gpio_direction_output; - idio16gpio->chip.get =3D idio_16_gpio_get; - idio16gpio->chip.get_multiple =3D idio_16_gpio_get_multiple; - idio16gpio->chip.set =3D idio_16_gpio_set; - idio16gpio->chip.set_multiple =3D idio_16_gpio_set_multiple; - - idio_16_state_init(&idio16gpio->state); - /* FET off states are represented by bit values of "1" */ - bitmap_fill(idio16gpio->state.out_state, IDIO_16_NOUT); + map =3D devm_regmap_init_mmio(dev, regs, &idio_16_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), + "Unable to initialize register map\n"); =20 - girq =3D &idio16gpio->chip.irq; - gpio_irq_chip_set_chip(girq, &idio_16_irqchip); - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler =3D NULL; - girq->num_parents =3D 0; - girq->parents =3D NULL; - girq->default_type =3D IRQ_TYPE_NONE; - girq->handler =3D handle_edge_irq; - girq->init_hw =3D idio_16_irq_init_hw; - - raw_spin_lock_init(&idio16gpio->lock); - - err =3D devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); - return err; - } - - err =3D devm_request_irq(dev, irq[id], idio_16_irq_handler, 0, name, - idio16gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } + config.parent =3D dev; + config.map =3D map; + config.regmap_irqs =3D idio_16_regmap_irqs; + config.num_regmap_irqs =3D ARRAY_SIZE(idio_16_regmap_irqs); + config.irq =3D irq[id]; + config.no_status =3D true; =20 - return 0; + return devm_idio_16_regmap_register(dev, &config); } =20 static struct isa_driver idio_16_driver =3D { --=20 2.39.2 From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF9E8C64ED6 for ; Mon, 27 Feb 2023 16:54:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230271AbjB0Qyn (ORCPT ); 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:27 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 5/6] gpio: pci-idio-16: Migrate to the regmap API Date: Mon, 27 Feb 2023 11:45:26 -0500 Message-Id: <16c8b165d84df82dd6f1230d14fb6ecf27b5363b.1677515341.git.william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. Migrate the pci-idio-16 module to the new idio-16 library interface leveraging the gpio-regmap API. Suggested-by: Andy Shevchenko Reviewed-by: Andy Shevchenko Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- Changes in v2: - Set io_port to true in idio_16_regmap_config drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-pci-idio-16.c | 296 ++++++++------------------------ 2 files changed, 70 insertions(+), 228 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8eb1f21c019e..e57744df2160 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1571,7 +1571,7 @@ config GPIO_PCH =20 config GPIO_PCI_IDIO_16 tristate "ACCES PCI-IDIO-16 GPIO support" - select GPIOLIB_IRQCHIP + select REGMAP_MMIO select GPIO_IDIO_16 help Enables GPIO support for the ACCES PCI-IDIO-16. An interrupt is diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-1= 6.c index a86ce748384b..5b024157a10f 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -5,208 +5,82 @@ */ #include #include -#include -#include -#include -#include +#include +#include #include #include #include -#include +#include #include =20 #include "gpio-idio-16.h" =20 -/** - * struct idio_16_gpio - GPIO device private data structure - * @chip: instance of the gpio_chip - * @lock: synchronization lock to prevent I/O race conditions - * @reg: I/O address offset for the GPIO device registers - * @state: ACCES IDIO-16 device state - * @irq_mask: I/O bits affected by interrupts - */ -struct idio_16_gpio { - struct gpio_chip chip; - raw_spinlock_t lock; - struct idio_16 __iomem *reg; - struct idio_16_state state; - unsigned long irq_mask; +static const struct regmap_range idio_16_wr_ranges[] =3D { + regmap_reg_range(0x0, 0x2), regmap_reg_range(0x3, 0x4), }; - -static int idio_16_gpio_get_direction(struct gpio_chip *chip, - unsigned int offset) -{ - if (idio_16_get_direction(offset)) - return GPIO_LINE_DIRECTION_IN; - - return GPIO_LINE_DIRECTION_OUT; -} - -static int idio_16_gpio_direction_input(struct gpio_chip *chip, - unsigned int offset) -{ - return 0; -} - -static int idio_16_gpio_direction_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - chip->set(chip, offset, value); - return 0; -} - -static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - return idio_16_get(idio16gpio->reg, &idio16gpio->state, offset); -} - -static int idio_16_gpio_get_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); - return 0; -} - -static void idio_16_gpio_set(struct gpio_chip *chip, unsigned int offset, - int value) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); -} - -static void idio_16_gpio_set_multiple(struct gpio_chip *chip, - unsigned long *mask, unsigned long *bits) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - - idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); -} - -static void idio_16_irq_ack(struct irq_data *data) -{ -} - -static void idio_16_irq_mask(struct irq_data *data) -{ - struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned long mask =3D BIT(irqd_to_hwirq(data)); - unsigned long flags; - - idio16gpio->irq_mask &=3D ~mask; - - if (!idio16gpio->irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - iowrite8(0, &idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static void idio_16_irq_unmask(struct irq_data *data) -{ - struct gpio_chip *chip =3D irq_data_get_irq_chip_data(data); - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned long mask =3D BIT(irqd_to_hwirq(data)); - const unsigned long prev_irq_mask =3D idio16gpio->irq_mask; - unsigned long flags; - - idio16gpio->irq_mask |=3D mask; - - if (!prev_irq_mask) { - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - ioread8(&idio16gpio->reg->irq_ctl); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } -} - -static int idio_16_irq_set_type(struct irq_data *data, unsigned int flow_t= ype) -{ - /* The only valid irq types are none and both-edges */ - if (flow_type !=3D IRQ_TYPE_NONE && - (flow_type & IRQ_TYPE_EDGE_BOTH) !=3D IRQ_TYPE_EDGE_BOTH) - return -EINVAL; - - return 0; -} - -static struct irq_chip idio_16_irqchip =3D { - .name =3D "pci-idio-16", - .irq_ack =3D idio_16_irq_ack, - .irq_mask =3D idio_16_irq_mask, - .irq_unmask =3D idio_16_irq_unmask, - .irq_set_type =3D idio_16_irq_set_type +static const struct regmap_range idio_16_rd_ranges[] =3D { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x6), }; - -static irqreturn_t idio_16_irq_handler(int irq, void *dev_id) -{ - struct idio_16_gpio *const idio16gpio =3D dev_id; - unsigned int irq_status; - struct gpio_chip *const chip =3D &idio16gpio->chip; - int gpio; - - raw_spin_lock(&idio16gpio->lock); - - irq_status =3D ioread8(&idio16gpio->reg->irq_status); - - raw_spin_unlock(&idio16gpio->lock); - - /* Make sure our device generated IRQ */ - if (!(irq_status & 0x3) || !(irq_status & 0x4)) - return IRQ_NONE; - - for_each_set_bit(gpio, &idio16gpio->irq_mask, chip->ngpio) - generic_handle_domain_irq(chip->irq.domain, gpio); - - raw_spin_lock(&idio16gpio->lock); - - /* Clear interrupt */ - iowrite8(0, &idio16gpio->reg->in0_7); - - raw_spin_unlock(&idio16gpio->lock); - - return IRQ_HANDLED; -} - -#define IDIO_16_NGPIO 32 -static const char *idio_16_names[IDIO_16_NGPIO] =3D { - "OUT0", "OUT1", "OUT2", "OUT3", "OUT4", "OUT5", "OUT6", "OUT7", - "OUT8", "OUT9", "OUT10", "OUT11", "OUT12", "OUT13", "OUT14", "OUT15", - "IIN0", "IIN1", "IIN2", "IIN3", "IIN4", "IIN5", "IIN6", "IIN7", - "IIN8", "IIN9", "IIN10", "IIN11", "IIN12", "IIN13", "IIN14", "IIN15" +static const struct regmap_range idio_16_volatile_ranges[] =3D { + regmap_reg_range(0x1, 0x2), regmap_reg_range(0x5, 0x6), +}; +static const struct regmap_range idio_16_precious_ranges[] =3D { + regmap_reg_range(0x2, 0x2), +}; +static const struct regmap_access_table idio_16_wr_table =3D { + .yes_ranges =3D idio_16_wr_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_wr_ranges), +}; +static const struct regmap_access_table idio_16_rd_table =3D { + .yes_ranges =3D idio_16_rd_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_rd_ranges), +}; +static const struct regmap_access_table idio_16_volatile_table =3D { + .yes_ranges =3D idio_16_volatile_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_volatile_ranges), +}; +static const struct regmap_access_table idio_16_precious_table =3D { + .yes_ranges =3D idio_16_precious_ranges, + .n_yes_ranges =3D ARRAY_SIZE(idio_16_precious_ranges), +}; +static const struct regmap_config idio_16_regmap_config =3D { + .reg_bits =3D 8, + .reg_stride =3D 1, + .val_bits =3D 8, + .io_port =3D true, + .max_register =3D 0x6, + .wr_table =3D &idio_16_wr_table, + .rd_table =3D &idio_16_rd_table, + .volatile_table =3D &idio_16_volatile_table, + .precious_table =3D &idio_16_precious_table, + .cache_type =3D REGCACHE_FLAT, }; =20 -static int idio_16_irq_init_hw(struct gpio_chip *gc) -{ - struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(gc); - - /* Disable IRQ by default and clear any pending interrupt */ - iowrite8(0, &idio16gpio->reg->irq_ctl); - iowrite8(0, &idio16gpio->reg->in0_7); +/* Only input lines (GPIO 16-31) support interrupts */ +#define IDIO_16_REGMAP_IRQ(_id) \ + [16 + _id] =3D { \ + .mask =3D BIT(2), \ + .type =3D { .types_supported =3D IRQ_TYPE_EDGE_BOTH }, \ + } =20 - return 0; -} +static const struct regmap_irq idio_16_regmap_irqs[] =3D { + IDIO_16_REGMAP_IRQ(0), IDIO_16_REGMAP_IRQ(1), IDIO_16_REGMAP_IRQ(2), /* 0= -2 */ + IDIO_16_REGMAP_IRQ(3), IDIO_16_REGMAP_IRQ(4), IDIO_16_REGMAP_IRQ(5), /* 3= -5 */ + IDIO_16_REGMAP_IRQ(6), IDIO_16_REGMAP_IRQ(7), IDIO_16_REGMAP_IRQ(8), /* 6= -8 */ + IDIO_16_REGMAP_IRQ(9), IDIO_16_REGMAP_IRQ(10), IDIO_16_REGMAP_IRQ(11), /*= 9-11 */ + IDIO_16_REGMAP_IRQ(12), IDIO_16_REGMAP_IRQ(13), IDIO_16_REGMAP_IRQ(14), /= * 12-14 */ + IDIO_16_REGMAP_IRQ(15), /* 15 */ +}; =20 static int idio_16_probe(struct pci_dev *pdev, const struct pci_device_id = *id) { struct device *const dev =3D &pdev->dev; - struct idio_16_gpio *idio16gpio; int err; const size_t pci_bar_index =3D 2; const char *const name =3D pci_name(pdev); - struct gpio_irq_chip *girq; - - idio16gpio =3D devm_kzalloc(dev, sizeof(*idio16gpio), GFP_KERNEL); - if (!idio16gpio) - return -ENOMEM; + struct idio_16_regmap_config config =3D {}; + void __iomem *regs; + struct regmap *map; =20 err =3D pcim_enable_device(pdev); if (err) { @@ -220,53 +94,21 @@ static int idio_16_probe(struct pci_dev *pdev, const s= truct pci_device_id *id) return err; } =20 - idio16gpio->reg =3D pcim_iomap_table(pdev)[pci_bar_index]; + regs =3D pcim_iomap_table(pdev)[pci_bar_index]; =20 - /* Deactivate input filters */ - iowrite8(0, &idio16gpio->reg->filter_ctl); + map =3D devm_regmap_init_mmio(dev, regs, &idio_16_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), + "Unable to initialize register map\n"); =20 - idio16gpio->chip.label =3D name; - idio16gpio->chip.parent =3D dev; - idio16gpio->chip.owner =3D THIS_MODULE; - idio16gpio->chip.base =3D -1; - idio16gpio->chip.ngpio =3D IDIO_16_NGPIO; - idio16gpio->chip.names =3D idio_16_names; - idio16gpio->chip.get_direction =3D idio_16_gpio_get_direction; - idio16gpio->chip.direction_input =3D idio_16_gpio_direction_input; - idio16gpio->chip.direction_output =3D idio_16_gpio_direction_output; - idio16gpio->chip.get =3D idio_16_gpio_get; - idio16gpio->chip.get_multiple =3D idio_16_gpio_get_multiple; - idio16gpio->chip.set =3D idio_16_gpio_set; - idio16gpio->chip.set_multiple =3D idio_16_gpio_set_multiple; - - idio_16_state_init(&idio16gpio->state); - - girq =3D &idio16gpio->chip.irq; - girq->chip =3D &idio_16_irqchip; - /* This will let us handle the parent IRQ in the driver */ - girq->parent_handler =3D NULL; - girq->num_parents =3D 0; - girq->parents =3D NULL; - girq->default_type =3D IRQ_TYPE_NONE; - girq->handler =3D handle_edge_irq; - girq->init_hw =3D idio_16_irq_init_hw; - - raw_spin_lock_init(&idio16gpio->lock); - - err =3D devm_gpiochip_add_data(dev, &idio16gpio->chip, idio16gpio); - if (err) { - dev_err(dev, "GPIO registering failed (%d)\n", err); - return err; - } - - err =3D devm_request_irq(dev, pdev->irq, idio_16_irq_handler, IRQF_SHARED, - name, idio16gpio); - if (err) { - dev_err(dev, "IRQ handler registering failed (%d)\n", err); - return err; - } + config.parent =3D dev; + config.map =3D map; + config.regmap_irqs =3D idio_16_regmap_irqs; + config.num_regmap_irqs =3D ARRAY_SIZE(idio_16_regmap_irqs); + config.irq =3D pdev->irq; + config.filters =3D true; =20 - return 0; + return devm_idio_16_regmap_register(dev, &config); } =20 static const struct pci_device_id idio_16_pci_dev_id[] =3D { --=20 2.39.2 From nobody Wed Sep 10 09:16:43 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95859C64ED8 for ; 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id x15-20020a05620a098f00b0073b929d0371sm5238714qkx.4.2023.02.27.08.54.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 08:54:28 -0800 (PST) From: William Breathitt Gray To: linus.walleij@linaro.org, brgl@bgdev.pl Cc: broonie@kernel.org, andriy.shevchenko@linux.intel.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 6/6] gpio: idio-16: Remove unused legacy interface Date: Mon, 27 Feb 2023 11:45:27 -0500 Message-Id: <9720c5c1e4c75d989ee60a6e172de373f7653273.1677515341.git.william.gray@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All idio-16 library consumers have migrated to the new interface leveraging the gpio-regmap API. Legacy interface functions and code are removed as no longer needed. Reviewed-by: Andy Shevchenko Signed-off-by: William Breathitt Gray Reviewed-by: Linus Walleij --- drivers/gpio/gpio-idio-16.c | 131 +----------------------------------- drivers/gpio/gpio-idio-16.h | 66 ------------------ 2 files changed, 1 insertion(+), 196 deletions(-) diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c index 13e35d1ef658..26a39aa38426 100644 --- a/drivers/gpio/gpio-idio-16.c +++ b/drivers/gpio/gpio-idio-16.c @@ -3,15 +3,13 @@ * GPIO library for the ACCES IDIO-16 family * Copyright (C) 2022 William Breathitt Gray */ -#include +#include #include #include #include #include -#include #include #include -#include #include =20 #include "gpio-idio-16.h" @@ -172,133 +170,6 @@ int devm_idio_16_regmap_register(struct device *const= dev, } EXPORT_SYMBOL_GPL(devm_idio_16_regmap_register); =20 -/** - * idio_16_get - get signal value at signal offset - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @offset: offset of signal to get - * - * Returns the signal value (0=3Dlow, 1=3Dhigh) for the signal at @offset. - */ -int idio_16_get(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, const unsigned long offset) -{ - const unsigned long mask =3D BIT(offset); - - if (offset < IDIO_16_NOUT) - return test_bit(offset, state->out_state); - - if (offset < 24) - return !!(ioread8(®->in0_7) & (mask >> IDIO_16_NOUT)); - - if (offset < 32) - return !!(ioread8(®->in8_15) & (mask >> 24)); - - return -EINVAL; -} -EXPORT_SYMBOL_GPL(idio_16_get); - -/** - * idio_16_get_multiple - get multiple signal values at multiple signal of= fsets - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @mask: mask of signals to get - * @bits: bitmap to store signal values - * - * Stores in @bits the values (0=3Dlow, 1=3Dhigh) for the signals defined = by @mask. - */ -void idio_16_get_multiple(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, - const unsigned long *const mask, - unsigned long *const bits) -{ - unsigned long flags; - const unsigned long out_mask =3D GENMASK(IDIO_16_NOUT - 1, 0); - - spin_lock_irqsave(&state->lock, flags); - - bitmap_replace(bits, bits, state->out_state, &out_mask, IDIO_16_NOUT); - if (*mask & GENMASK(23, 16)) - bitmap_set_value8(bits, ioread8(®->in0_7), 16); - if (*mask & GENMASK(31, 24)) - bitmap_set_value8(bits, ioread8(®->in8_15), 24); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_get_multiple); - -/** - * idio_16_set - set signal value at signal offset - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @offset: offset of signal to set - * @value: value of signal to set - * - * Assigns output @value for the signal at @offset. - */ -void idio_16_set(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, const unsigned long offset, - const unsigned long value) -{ - unsigned long flags; - - if (offset >=3D IDIO_16_NOUT) - return; - - spin_lock_irqsave(&state->lock, flags); - - __assign_bit(offset, state->out_state, value); - if (offset < 8) - iowrite8(bitmap_get_value8(state->out_state, 0), ®->out0_7); - else - iowrite8(bitmap_get_value8(state->out_state, 8), ®->out8_15); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_set); - -/** - * idio_16_set_multiple - set signal values at multiple signal offsets - * @reg: ACCES IDIO-16 device registers - * @state: ACCES IDIO-16 device state - * @mask: mask of signals to set - * @bits: bitmap of signal output values - * - * Assigns output values defined by @bits for the signals defined by @mask. - */ -void idio_16_set_multiple(struct idio_16 __iomem *const reg, - struct idio_16_state *const state, - const unsigned long *const mask, - const unsigned long *const bits) -{ - unsigned long flags; - - spin_lock_irqsave(&state->lock, flags); - - bitmap_replace(state->out_state, state->out_state, bits, mask, - IDIO_16_NOUT); - if (*mask & GENMASK(7, 0)) - iowrite8(bitmap_get_value8(state->out_state, 0), ®->out0_7); - if (*mask & GENMASK(15, 8)) - iowrite8(bitmap_get_value8(state->out_state, 8), ®->out8_15); - - spin_unlock_irqrestore(&state->lock, flags); -} -EXPORT_SYMBOL_GPL(idio_16_set_multiple); - -/** - * idio_16_state_init - initialize idio_16_state structure - * @state: ACCES IDIO-16 device state - * - * Initializes the ACCES IDIO-16 device @state for use in idio-16 library - * functions. - */ -void idio_16_state_init(struct idio_16_state *const state) -{ - spin_lock_init(&state->lock); -} -EXPORT_SYMBOL_GPL(idio_16_state_init); - MODULE_AUTHOR("William Breathitt Gray"); MODULE_DESCRIPTION("ACCES IDIO-16 GPIO Library"); MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-idio-16.h b/drivers/gpio/gpio-idio-16.h index 22bb591b4ec0..7a4694dae8f5 100644 --- a/drivers/gpio/gpio-idio-16.h +++ b/drivers/gpio/gpio-idio-16.h @@ -3,9 +3,6 @@ #ifndef _IDIO_16_H_ #define _IDIO_16_H_ =20 -#include -#include - struct device; struct regmap; struct regmap_irq; @@ -30,69 +27,6 @@ struct idio_16_regmap_config { bool filters; }; =20 -/** - * struct idio_16 - IDIO-16 registers structure - * @out0_7: Read: FET Drive Outputs 0-7 - * Write: FET Drive Outputs 0-7 - * @in0_7: Read: Isolated Inputs 0-7 - * Write: Clear Interrupt - * @irq_ctl: Read: Enable IRQ - * Write: Disable IRQ - * @filter_ctl: Read: Activate Input Filters 0-15 - * Write: Deactivate Input Filters 0-15 - * @out8_15: Read: FET Drive Outputs 8-15 - * Write: FET Drive Outputs 8-15 - * @in8_15: Read: Isolated Inputs 8-15 - * Write: Unused - * @irq_status: Read: Interrupt status - * Write: Unused - */ -struct idio_16 { - u8 out0_7; - u8 in0_7; - u8 irq_ctl; - u8 filter_ctl; - u8 out8_15; - u8 in8_15; - u8 irq_status; -}; - -#define IDIO_16_NOUT 16 - -/** - * struct idio_16_state - IDIO-16 state structure - * @lock: synchronization lock for accessing device state - * @out_state: output signals state - * @irq_mask: IRQ mask state - */ -struct idio_16_state { - spinlock_t lock; - DECLARE_BITMAP(out_state, IDIO_16_NOUT); -}; - -/** - * idio_16_get_direction - get the I/O direction for a signal offset - * @offset: offset of signal to get direction - * - * Returns the signal direction (0=3Doutput, 1=3Dinput) for the signal at = @offset. - */ -static inline int idio_16_get_direction(const unsigned long offset) -{ - return (offset >=3D IDIO_16_NOUT) ? 1 : 0; -} - -int idio_16_get(struct idio_16 __iomem *reg, struct idio_16_state *state, - unsigned long offset); -void idio_16_get_multiple(struct idio_16 __iomem *reg, - struct idio_16_state *state, - const unsigned long *mask, unsigned long *bits); -void idio_16_set(struct idio_16 __iomem *reg, struct idio_16_state *state, - unsigned long offset, unsigned long value); -void idio_16_set_multiple(struct idio_16 __iomem *reg, - struct idio_16_state *state, - const unsigned long *mask, const unsigned long *bits); -void idio_16_state_init(struct idio_16_state *state); - int devm_idio_16_regmap_register(struct device *dev, const struct idio_16_regmap_config *config); =20 --=20 2.39.2