From nobody Wed Apr 15 19:44:05 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C549BC433FE for ; Mon, 21 Nov 2022 06:58:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229660AbiKUG6Z (ORCPT ); Mon, 21 Nov 2022 01:58:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229490AbiKUG6I (ORCPT ); Mon, 21 Nov 2022 01:58:08 -0500 Received: from mail-pf1-x433.google.com (mail-pf1-x433.google.com [IPv6:2607:f8b0:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD9A4175A4 for ; Sun, 20 Nov 2022 22:57:57 -0800 (PST) Received: by mail-pf1-x433.google.com with SMTP id b29so10488246pfp.13 for ; Sun, 20 Nov 2022 22:57:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5mZ6c9B+MTBQ1H/yMw/9kXxvINGVHAlkajRU3PsyXaY=; b=G3TMl2eTdkPNF2LtnqQnjD4N0jCXMSky0n6x3VV/ZqMoPkq4rXR85A1Fh6lFd0jAE+ KVARYXc1Ittrv3IMmApJdRfqmQz1J0WM9jLK3Rx4D1kIQXjp9ch9UmacL7xcm5dnfzWe 0ygdXWZwRxIWE5wdlCaBkUWJRSEiq1V5qyjgwwMUKtdH03Oltwk1tUMQOGvoosWVOEEi Gv1wzyqLCwUmCNEhZAsSv1SwujZiG1YievpeIGH8wCyrf1GyhDKZEw8gdB8EK/ttgQju li4rsnc1W/XZjhxnLV0zS6xQKpJKieTak+rcWnf1aswzj/sY5fw8qHwhX4Trjm8vNJph 7e7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5mZ6c9B+MTBQ1H/yMw/9kXxvINGVHAlkajRU3PsyXaY=; b=fzeLoI0f52pqkqOXbl30xIzK6442RqZmesqtezFh/t9j98Mq56JyCJddljknIYETpG 8IgneUOYo5jSiB5obkpg4kurs6E8YbOl+RKkPL8sKSZ2K7SSzqh6LAQkByQ/3q3ueNbJ nZldwE1FYuQNCrHZbqdODtOKXsr+oVyW5PkX0mDBau4Bmv3iXghkMhNNr4FopAv7T+FS g0aB7qGnqUHY4NscfPZtpBzdKPfS4P6dIZR0iVfs5O1jSR4yVTT88RNMQaAfW8D2hddm 3rljDgQPd61ZwY6iddOehbharFE2fl+EBWH43XYSMynH7MJ393sh4sTVOiO03G8QYSJl 5uOw== X-Gm-Message-State: ANoB5pnp6O5JsHFK3JNV/3WidXqoWR0m8tHNYfqGDDEwEiQmr5kS59+/ O5aMbiAq/vn2/wGwzb8d1WTGug== X-Google-Smtp-Source: AA0mqf5OS17NGoXZU3JFtFoCyDvC6ENwVsYwBRlnHgbRGJn5PCl7zNsQxnEoVEboCZTsaGBTuh2kZQ== X-Received: by 2002:a63:5d0d:0:b0:43c:6413:322c with SMTP id r13-20020a635d0d000000b0043c6413322cmr2930098pgb.472.1669013877304; Sun, 20 Nov 2022 22:57:57 -0800 (PST) Received: from localhost ([122.172.85.60]) by smtp.gmail.com with ESMTPSA id a6-20020a1709027e4600b0017f36638010sm8700302pln.276.2022.11.20.22.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Nov 2022 22:57:56 -0800 (PST) From: Viresh Kumar To: Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , "Rafael J. Wysocki" , Viresh Kumar Cc: linux-pm@vger.kernel.org, Vincent Guittot , Stephen Boyd , Nishanth Menon , johan@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] cpufreq: qcom-cpufreq-hw: Register config_clks helper Date: Mon, 21 Nov 2022 12:27:47 +0530 Message-Id: <93bd5ab5346e4f22cd9db78afa778b2060d5741a.1669012140.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In qcom-cpufreq-hw driver, we want to skip clk configuration that happens via dev_pm_opp_set_opp(), but still want the OPP core to parse the "opp-hz" property so we can use the freq based OPP helpers. The OPP core provides support for the platforms to provide config_clks helpers now, lets use that to provide an empty callback to skip clock configuration. Signed-off-by: Viresh Kumar --- drivers/cpufreq/qcom-cpufreq-hw.c | 34 ++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufr= eq-hw.c index 1bd1e9ae5308..5f8079898940 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -51,6 +51,7 @@ struct qcom_cpufreq_data { */ struct mutex throttle_lock; int throttle_irq; + int opp_token; char irq_name[15]; bool cancel_throttle; struct delayed_work throttle_work; @@ -58,7 +59,6 @@ struct qcom_cpufreq_data { struct clk_hw cpu_clk; =20 bool per_core_dcvs; - struct freq_qos_request throttle_freq_req; }; =20 @@ -197,6 +197,15 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct= cpufreq_policy *policy, return policy->freq_table[index].frequency; } =20 +static int qcom_cpufreq_hw_config_clks(struct device *dev, + struct opp_table *opp_table, + struct dev_pm_opp *opp, void *data, + bool scaling_down) +{ + /* We want to skip clk configuration via dev_pm_opp_set_opp() */ + return 0; +} + static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, struct cpufreq_policy *policy) { @@ -208,11 +217,23 @@ static int qcom_cpufreq_hw_read_lut(struct device *cp= u_dev, int ret; struct qcom_cpufreq_data *drv_data =3D policy->driver_data; const struct qcom_cpufreq_soc_data *soc_data =3D qcom_cpufreq.soc_data; + const char * const clk_names[] =3D { NULL, NULL }; + struct dev_pm_opp_config config =3D { + .clk_names =3D clk_names, + .config_clks =3D qcom_cpufreq_hw_config_clks, + }; =20 table =3D kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL); if (!table) return -ENOMEM; =20 + ret =3D dev_pm_opp_set_config(cpu_dev, &config); + if (ret < 0) { + dev_err(cpu_dev, "Failed to set OPP config: %d\n", ret); + goto free_table; + } + drv_data->opp_token =3D ret; + ret =3D dev_pm_opp_of_add_table(cpu_dev); if (!ret) { /* Disable all opps and cross-validate against LUT later */ @@ -227,8 +248,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_= dev, } } else if (ret !=3D -ENODEV) { dev_err(cpu_dev, "Invalid opp table in device tree\n"); - kfree(table); - return ret; + goto clear_config; } else { policy->fast_switch_possible =3D true; icc_scaling_enabled =3D false; @@ -296,6 +316,13 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu= _dev, dev_pm_opp_set_sharing_cpus(cpu_dev, policy->cpus); =20 return 0; + +clear_config: + dev_pm_opp_clear_config(drv_data->opp_token); + +free_table: + kfree(table); + return ret; } =20 static void qcom_get_related_cpus(int index, struct cpumask *m) @@ -594,6 +621,7 @@ static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_poli= cy *policy) dev_pm_opp_remove_all_dynamic(cpu_dev); dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); qcom_cpufreq_hw_lmh_exit(data); + dev_pm_opp_clear_config(data->opp_token); kfree(policy->freq_table); kfree(data); iounmap(base); --=20 2.31.1.272.g89b43f80a514 From nobody Wed Apr 15 19:44:05 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7135EC4332F for ; Mon, 21 Nov 2022 06:58:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229666AbiKUG63 (ORCPT ); Mon, 21 Nov 2022 01:58:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229509AbiKUG6I (ORCPT ); Mon, 21 Nov 2022 01:58:08 -0500 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D8E8175B5 for ; Sun, 20 Nov 2022 22:58:02 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id p21so9765693plr.7 for ; Sun, 20 Nov 2022 22:58:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BtruWrVYTytoEhIj6SMwW8OKntqRZGuB4D7xreZ5kLA=; b=zv/HlQ1+Kd/LPc2G4AXA2rmVOt0ecSPXMRHhl95bCGd7z4kAnCaLNgLxqz3IvFnlWC imM1sj4HhcQnltsphPzF4FL62L3DvQmBsFDoA6K2UdCbitJBolWFB0/p+uFPa9JKPCL/ xT1vmDBjcYjqDEWU2enbYWDm9gS2uj2JhcPMmX1y9aRvtYbZME0drywKFCLdUBhmECOv mHvetH16NAOhFIZ8tdG8a/D/D5ZEyLX1bdN9+rAs+rlvOWR9QyN6p77zXnVymIsOkV9o BV4jaHv8Z6KbL+dCKTgu6gICEQHpPXoMIHr204NNBpAusMbBHi+rvESl1cT3XkjzHvlO YhsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BtruWrVYTytoEhIj6SMwW8OKntqRZGuB4D7xreZ5kLA=; b=z6tEl4lDzoHj77tTCd6v/doKgQHGBn0tMb8xMTv1UmZdo+rohpNK5Cb6jLtcgxu4+E wRx1+vhnjnNT0UDNdwl/lv33EnzqXy0DEk8mxxFzAKbEnNtkIkI+qYs4el5be8CBmEX1 ZxvuNZASdii1eXza3IZitQq/FOI565a9oOGOZYgXTHU2xPXjxTwbIfm0t2hmcMCL3qW0 tSIq/XAyqgFM53nKOc4f+h0A/22nvz7IUZXtmnaugNWGl9lmXIW8B30T3cNmYjJnvuHc qv/O/+ZknEmjAyQ5DS4dzYWaBcyqPoVxJcy5BK7eahp56zfGj6UY4kAmdYW0lPBIGsLe udQQ== X-Gm-Message-State: ANoB5pnYL9UTzxBtEzJV4nWA7nqECaL6s6R7psOJ0bbyQz+8RCBmMoNT IaQpX1fIjqS7QEvoimqm5TXlRQ== X-Google-Smtp-Source: AA0mqf798fKaxTjbntdCx0efdOqdpua9GVAcVfxzz7LWqVYRLZCZtj7NR/w3ElJqXAGAoiJTw73Lrw== X-Received: by 2002:a17:902:f552:b0:186:b768:454d with SMTP id h18-20020a170902f55200b00186b768454dmr1830511plf.82.1669013882031; Sun, 20 Nov 2022 22:58:02 -0800 (PST) Received: from localhost ([122.172.85.60]) by smtp.gmail.com with ESMTPSA id c10-20020a630d0a000000b0047702d44861sm6815938pgl.18.2022.11.20.22.57.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Nov 2022 22:58:00 -0800 (PST) From: Viresh Kumar To: Manivannan Sadhasivam , Viresh Kumar , Nishanth Menon , Stephen Boyd Cc: Viresh Kumar , linux-pm@vger.kernel.org, Vincent Guittot , "Rafael J. Wysocki" , andersson@kernel.org, johan@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] OPP: Disallow "opp-hz" property without a corresponding clk Date: Mon, 21 Nov 2022 12:27:48 +0530 Message-Id: X-Mailer: git-send-email 2.31.1.272.g89b43f80a514 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This removes the special code added by the commit 2083da24eb56 ("OPP: Allow multiple clocks for a device"), to make it work for Qcom SoC. In qcom-cpufreq-hw driver, we want to skip clk configuration that happens via dev_pm_opp_set_opp(), but still want the OPP core to parse the "opp-hz" property so we can use the freq based OPP helpers. The DT for Qcom SoCs is fixed now and contain a valid clk entry, and we no longer need the special handling of the same in the OPP core. Signed-off-by: Viresh Kumar --- drivers/opp/core.c | 14 -------------- drivers/opp/debugfs.c | 2 +- 2 files changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index e87567dbe99f..b7158d33c13d 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -1384,20 +1384,6 @@ static struct opp_table *_update_opp_table_clk(struc= t device *dev, } =20 if (ret =3D=3D -ENOENT) { - /* - * There are few platforms which don't want the OPP core to - * manage device's clock settings. In such cases neither the - * platform provides the clks explicitly to us, nor the DT - * contains a valid clk entry. The OPP nodes in DT may still - * contain "opp-hz" property though, which we need to parse and - * allow the platform to find an OPP based on freq later on. - * - * This is a simple solution to take care of such corner cases, - * i.e. make the clk_count 1, which lets us allocate space for - * frequency in opp->rates and also parse the entries in DT. - */ - opp_table->clk_count =3D 1; - dev_dbg(dev, "%s: Couldn't find clock: %d\n", __func__, ret); return opp_table; } diff --git a/drivers/opp/debugfs.c b/drivers/opp/debugfs.c index 96a30a032c5f..402c507edac7 100644 --- a/drivers/opp/debugfs.c +++ b/drivers/opp/debugfs.c @@ -138,7 +138,7 @@ void opp_debug_create_one(struct dev_pm_opp *opp, struc= t opp_table *opp_table) * - For some devices rate isn't available or there are multiple, use * index instead for them. */ - if (likely(opp_table->clk_count =3D=3D 1 && opp->rates[0])) + if (likely(opp_table->clk_count =3D=3D 1)) id =3D opp->rates[0]; else id =3D _get_opp_count(opp_table); --=20 2.31.1.272.g89b43f80a514