From nobody Wed Apr 8 10:33:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89F79C6FA83 for ; Sun, 11 Sep 2022 22:04:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229677AbiIKWEF (ORCPT ); Sun, 11 Sep 2022 18:04:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229760AbiIKWD4 (ORCPT ); Sun, 11 Sep 2022 18:03:56 -0400 Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0F0F240B4 for ; Sun, 11 Sep 2022 15:03:52 -0700 (PDT) Received: by mail-oa1-x36.google.com with SMTP id 586e51a60fabf-1280590722dso18856116fac.1 for ; Sun, 11 Sep 2022 15:03:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=P4WTp8NVqi31X8+vRfSraa/ruIQslcFBKnXqDpaAuZ0=; b=jJjHWQz74YQmAHtmtAi0h2gmtW7dpMs4TblognAj2871YXQ1YLzKCqIdKAAVTRm0r4 PQY5YAQ5FY/2uCrfuBmQxBWvyvhe5YzVxzdoy6ycGyUeSJ2OvULUDi7wB9o9RofcZgTn InORMCBMLr1Xa+0ADhAIqVaxfKasvd9u05Dig8fEPJSwnKJqu7MtXFDmbu1lM2Tx6bqM 4y6AbJb2wkJWtmP3uHkmABja1+Ri4EKaGvVAaIah/ky8HlhrrkcqOD+rTKfagxNWWd2H bQNk9a+7Ev5uq/yg4dlUxQAbZm0EVjEuXFB/tf7uWsIB2EM1rq0dLynoKzC0RFIPt4ea Bulw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=P4WTp8NVqi31X8+vRfSraa/ruIQslcFBKnXqDpaAuZ0=; b=AMnh/0TzySuJpZS0gK+5l6nrwYT7/OphzL0dcH8YT2ZlS6WE6VXSFxkkeGsOG0Lut9 li4g+kCL0b/C+Jn98XQn9X8CDGJMNXe0gVdi1+PGec3KGm0Hvz0mMW7+LBnZ1sR8Irm0 9aE6/xq15DhCAe5TkPKz7KWLXrNh5txVBjoUnNDqONIhcP45lYN9NCk/bA7uudq3RJtL 1j1+KvETPSKmaaj84u/xG2RVra5c09KEpSvZV0YStnX0SLej264M/NZhTfclg/Kd2l+y 5MS63X16FOWM1PvxtrwnqVKxLb4gVFfRktLuQvnIuvAegcTCE0fJICmpBWGtAXXYjs6h Olsw== X-Gm-Message-State: ACgBeo1B8046CcDp8hOOlK7kk2BWuk8t0KdtV/fo1oAr2VrIlgqDUQlU 6dvt0aV55R0fVdEv3t6e8g4nn4RXmfZnNg== X-Google-Smtp-Source: AA6agR44SwAF8qwWU+K/AVZ+QQ5MNiBZHBteu6cWe1sC71KaXOQAFYS4ruVdZJowEKhsVCPaacuAow== X-Received: by 2002:aca:4554:0:b0:343:3998:aff3 with SMTP id s81-20020aca4554000000b003433998aff3mr7789771oia.119.1662933831955; Sun, 11 Sep 2022 15:03:51 -0700 (PDT) Received: from fedora.attlocal.net (69-109-179-158.lightspeed.dybhfl.sbcglobal.net. [69.109.179.158]) by smtp.gmail.com with ESMTPSA id r19-20020a056870439300b00127d2005ea1sm4664249oah.18.2022.09.11.15.03.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 15:03:51 -0700 (PDT) From: William Breathitt Gray To: brgl@bgdev.pl, linus.walleij@linaro.org Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 1/3] gpio: idio-16: Introduce the ACCES IDIO-16 GPIO library module Date: Sun, 11 Sep 2022 16:34:38 -0400 Message-Id: <6b28fb497c35def57c1920362c82402bed4bd23f.1662927941.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Exposes consumer library functions to facilitate communication with devices within the ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16. A CONFIG_GPIO_IDIO_16 Kconfig option is introduced by this patch. Modules wanting access to these idio-16 library functions should select this Kconfig option and import the IDIO_16 symbol namespace. Signed-off-by: William Breathitt Gray --- MAINTAINERS | 6 ++ drivers/gpio/Kconfig | 9 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-idio-16.c | 159 ++++++++++++++++++++++++++++++++++++ drivers/gpio/gpio-idio-16.h | 70 ++++++++++++++++ 5 files changed, 245 insertions(+) create mode 100644 drivers/gpio/gpio-idio-16.c create mode 100644 drivers/gpio/gpio-idio-16.h diff --git a/MAINTAINERS b/MAINTAINERS index 8a5012ba6ff9..a143d4bc8547 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -312,6 +312,12 @@ L: linux-iio@vger.kernel.org S: Maintained F: drivers/counter/104-quad-8.c =20 +ACCES IDIO-16 GPIO LIBRARY +M: William Breathitt Gray +L: linux-gpio@vger.kernel.org +S: Maintained +F: drivers/gpio/gpio-idio-16.c + ACCES PCI-IDIO-16 GPIO DRIVER M: William Breathitt Gray L: linux-gpio@vger.kernel.org diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ed9e71d6713e..551351e11365 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -109,6 +109,15 @@ config GPIO_REGMAP config GPIO_MAX730X tristate =20 +config GPIO_IDIO_16 + tristate + help + Enables support for the idio-16 library functions. The idio-16 library + provides functions to facilitate communication with devices within the + ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16. + + If built as a module its name will be gpio-idio-16. + menu "Memory mapped GPIO drivers" depends on HAS_IOMEM =20 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index b67e29d348cf..15abf88c167b 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -69,6 +69,7 @@ obj-$(CONFIG_GPIO_HLWD) +=3D gpio-hlwd.o obj-$(CONFIG_HTC_EGPIO) +=3D gpio-htc-egpio.o obj-$(CONFIG_GPIO_I8255) +=3D gpio-i8255.o obj-$(CONFIG_GPIO_ICH) +=3D gpio-ich.o +obj-$(CONFIG_GPIO_IDIO_16) +=3D gpio-idio-16.o obj-$(CONFIG_GPIO_IDT3243X) +=3D gpio-idt3243x.o obj-$(CONFIG_GPIO_IMX_SCU) +=3D gpio-imx-scu.o obj-$(CONFIG_GPIO_IOP) +=3D gpio-iop.o diff --git a/drivers/gpio/gpio-idio-16.c b/drivers/gpio/gpio-idio-16.c new file mode 100644 index 000000000000..e244032bac35 --- /dev/null +++ b/drivers/gpio/gpio-idio-16.c @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPIO library for the ACCES IDIO-16 family + * Copyright (C) 2022 William Breathitt Gray + */ +#include +#include +#include +#include +#include +#include + +#include "gpio-idio-16.h" + +/** + * idio_16_get - get signal value at signal offset + * @reg: ACCES IDIO-16 device registers + * @offset: offset of signal to get + * + * Returns the signal value (0=3Dlow, 1=3Dhigh) for the signal at @offset. + */ +int idio_16_get(struct idio_16 __iomem *const reg, const unsigned long off= set) +{ + const unsigned long mask =3D BIT(offset); + + if (offset < 8) + return !!(ioread8(®->out0_7) & mask); + + if (offset < 16) + return !!(ioread8(®->out8_15) & (mask >> 8)); + + if (offset < 24) + return !!(ioread8(®->in0_7) & (mask >> 16)); + + return !!(ioread8(®->in8_15) & (mask >> 24)); +} +EXPORT_SYMBOL_NS_GPL(idio_16_get, IDIO_16); + +/** + * idio_16_get_multiple - get multiple signal values at multiple signal of= fsets + * @reg: ACCES IDIO-16 device registers + * @state: ACCES IDIO-16 device state + * @mask: mask of signals to get + * @bits: bitmap to store signal values + * + * Stores in @bits the values (0=3Dlow, 1=3Dhigh) for the signals defined = by @mask. + */ +void idio_16_get_multiple(struct idio_16 __iomem *const reg, + struct idio_16_state *const state, + const unsigned long *const mask, + unsigned long *const bits) +{ + unsigned long flags; + + spin_lock_irqsave(&state->lock, flags); + + if (*mask & GENMASK(7, 0)) + bitmap_set_value8(bits, ioread8(®->out0_7), 0); + if (*mask & GENMASK(15, 8)) + bitmap_set_value8(bits, ioread8(®->out8_15), 8); + if (*mask & GENMASK(23, 16)) + bitmap_set_value8(bits, ioread8(®->in0_7), 16); + if (*mask & GENMASK(31, 24)) + bitmap_set_value8(bits, ioread8(®->in8_15), 24); + + spin_unlock_irqrestore(&state->lock, flags); +} +EXPORT_SYMBOL_NS_GPL(idio_16_get_multiple, IDIO_16); + +/** + * idio_16_set - set signal value at signal offset + * @reg: ACCES IDIO-16 device registers + * @state: ACCES IDIO-16 device state + * @offset: offset of signal to set + * @value: value of signal to set + * + * Assigns output @value for the signal at @offset. + */ +void idio_16_set(struct idio_16 __iomem *const reg, + struct idio_16_state *const state, const unsigned long offset, + const unsigned long value) +{ + unsigned long flags; + + /* offsets greater than 15 are input-only signals */ + if (offset > 15) + return; + + spin_lock_irqsave(&state->lock, flags); + + if (value) + set_bit(offset, state->out_state); + else + clear_bit(offset, state->out_state); + + if (offset < 8) + iowrite8(bitmap_get_value8(state->out_state, 0), ®->out0_7); + else + iowrite8(bitmap_get_value8(state->out_state, 8), ®->out8_15); + + spin_unlock_irqrestore(&state->lock, flags); +} +EXPORT_SYMBOL_NS_GPL(idio_16_set, IDIO_16); + +/** + * idio_16_set_multiple - set signal values at multiple signal offsets + * @reg: ACCES IDIO-16 device registers + * @state: ACCES IDIO-16 device state + * @mask: mask of signals to set + * @bits: bitmap of signal output values + * + * Assigns output values defined by @bits for the signals defined by @mask. + */ +void idio_16_set_multiple(struct idio_16 __iomem *const reg, + struct idio_16_state *const state, + const unsigned long *const mask, + const unsigned long *const bits) +{ + unsigned long flags; + unsigned long offset; + unsigned long port_mask; + unsigned long value; + unsigned long out_state; + + spin_lock_irqsave(&state->lock, flags); + + for_each_set_clump8(offset, port_mask, mask, IDIO_16_NOUT) { + value =3D bitmap_get_value8(bits, offset); + out_state =3D bitmap_get_value8(state->out_state, offset); + + out_state =3D (out_state & ~port_mask) | (value & port_mask); + bitmap_set_value8(state->out_state, out_state, offset); + + if (offset < 8) + iowrite8(out_state, ®->out0_7); + else + iowrite8(out_state, ®->out8_15); + } + + spin_unlock_irqrestore(&state->lock, flags); +} +EXPORT_SYMBOL_NS_GPL(idio_16_set_multiple, IDIO_16); + +/** + * idio_16_state_init - initialize idio_16_state structure + * @state: ACCES IDIO-16 device state + * + * Initializes the ACCES IDIO-16 device @state for use in idio-16 library + * functions. + */ +void idio_16_state_init(struct idio_16_state *const state) +{ + spin_lock_init(&state->lock); +} +EXPORT_SYMBOL_NS_GPL(idio_16_state_init, IDIO_16); + +MODULE_AUTHOR("William Breathitt Gray"); +MODULE_DESCRIPTION("ACCES IDIO-16 GPIO Library"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpio/gpio-idio-16.h b/drivers/gpio/gpio-idio-16.h new file mode 100644 index 000000000000..ce1fa0639243 --- /dev/null +++ b/drivers/gpio/gpio-idio-16.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright 2022 William Breathitt Gray */ +#ifndef _IDIO_16_H_ +#define _IDIO_16_H_ + +#include +#include + +/** + * struct idio_16 - IDIO-16 registers structure + * @out0_7: Read: FET Drive Outputs 0-7 + * Write: FET Drive Outputs 0-7 + * @in0_7: Read: Isolated Inputs 0-7 + * Write: Clear Interrupt + * @irq_ctl: Read: Enable IRQ + * Write: Disable IRQ + * @filter_ctl: Read: Activate Input Filters 0-15 + * Write: Deactivate Input Filters 0-15 + * @out8_15: Read: FET Drive Outputs 8-15 + * Write: FET Drive Outputs 8-15 + * @in8_15: Read: Isolated Inputs 8-15 + * Write: Unused + * @irq_status: Read: Interrupt status + * Write: Unused + */ +struct idio_16 { + u8 out0_7; + u8 in0_7; + u8 irq_ctl; + u8 filter_ctl; + u8 out8_15; + u8 in8_15; + u8 irq_status; +}; + +#define IDIO_16_NOUT 16 + +/** + * struct idio_16_state - IDIO-16 state structure + * @lock: synchronization lock for accessing device state + * @out_state: output signals state + */ +struct idio_16_state { + spinlock_t lock; + DECLARE_BITMAP(out_state, IDIO_16_NOUT); +}; + +/** + * idio_16_get_direction - get the I/O direction for a signal offset + * @offset: offset of signal to get direction + * + * Returns the signal direction (0=3Doutput, 1=3Dinput) for the signal at = @offset. + */ +static inline int idio_16_get_direction(const unsigned long offset) +{ + return (offset < IDIO_16_NOUT) ? 0 : 1; +} + +int idio_16_get(struct idio_16 __iomem *reg, unsigned long offset); +void idio_16_get_multiple(struct idio_16 __iomem *reg, + struct idio_16_state *state, + const unsigned long *mask, unsigned long *bits); +void idio_16_set(struct idio_16 __iomem *reg, struct idio_16_state *state, + unsigned long offset, unsigned long value); +void idio_16_set_multiple(struct idio_16 __iomem *reg, + struct idio_16_state *state, + const unsigned long *mask, const unsigned long *bits); +void idio_16_state_init(struct idio_16_state *state); + +#endif /* _IDIO_16_H_ */ --=20 2.37.2 From nobody Wed Apr 8 10:33:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB693C6FA86 for ; Sun, 11 Sep 2022 22:03:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229774AbiIKWD5 (ORCPT ); Sun, 11 Sep 2022 18:03:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229738AbiIKWDy (ORCPT ); Sun, 11 Sep 2022 18:03:54 -0400 Received: from mail-oa1-x31.google.com (mail-oa1-x31.google.com [IPv6:2001:4860:4864:20::31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79607240AE for ; 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id r19-20020a056870439300b00127d2005ea1sm4664249oah.18.2022.09.11.15.03.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 15:03:52 -0700 (PDT) From: William Breathitt Gray To: brgl@bgdev.pl, linus.walleij@linaro.org Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 2/3] gpio: 104-idio-16: Utilize the idio-16 GPIO library Date: Sun, 11 Sep 2022 16:34:39 -0400 Message-Id: <6f8b7d379a83e1509ec790bbaf0a9e15fdf26180.1662927941.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The ACCES 104-IDIO-16 device is part of the ACCES IDIO-16 family, so the idio-16 GPIO library module is selected and utilized to consolidate code. Signed-off-by: William Breathitt Gray --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-104-idio-16.c | 91 ++++++++------------------------- 2 files changed, 22 insertions(+), 70 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 551351e11365..48846ee476e2 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -866,6 +866,7 @@ config GPIO_104_IDIO_16 depends on PC104 select ISA_BUS_API select GPIOLIB_IRQCHIP + select GPIO_IDIO_16 help Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16, 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, 104-IDO-8). The diff --git a/drivers/gpio/gpio-104-idio-16.c b/drivers/gpio/gpio-104-idio-1= 6.c index 65a5f581d981..75b5f019676f 100644 --- a/drivers/gpio/gpio-104-idio-16.c +++ b/drivers/gpio/gpio-104-idio-16.c @@ -6,7 +6,7 @@ * This driver supports the following ACCES devices: 104-IDIO-16, * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8. */ -#include +#include #include #include #include @@ -21,6 +21,8 @@ #include #include =20 +#include "gpio-idio-16.h" + #define IDIO_16_EXTENT 8 #define MAX_NUM_IDIO_16 max_num_isa_dev(IDIO_16_EXTENT) =20 @@ -33,49 +35,26 @@ static unsigned int irq[MAX_NUM_IDIO_16]; module_param_hw_array(irq, uint, irq, NULL, 0); MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers"); =20 -/** - * struct idio_16_reg - device registers structure - * @out0_7: Read: N/A - * Write: FET Drive Outputs 0-7 - * @in0_7: Read: Isolated Inputs 0-7 - * Write: Clear Interrupt - * @irq_ctl: Read: Enable IRQ - * Write: Disable IRQ - * @unused: N/A - * @out8_15: Read: N/A - * Write: FET Drive Outputs 8-15 - * @in8_15: Read: Isolated Inputs 8-15 - * Write: N/A - */ -struct idio_16_reg { - u8 out0_7; - u8 in0_7; - u8 irq_ctl; - u8 unused; - u8 out8_15; - u8 in8_15; -}; - /** * struct idio_16_gpio - GPIO device private data structure * @chip: instance of the gpio_chip * @lock: synchronization lock to prevent I/O race conditions * @irq_mask: I/O bits affected by interrupts * @reg: I/O address offset for the device registers - * @out_state: output bits state + * @state: ACCES IDIO-16 device state */ struct idio_16_gpio { struct gpio_chip chip; raw_spinlock_t lock; unsigned long irq_mask; - struct idio_16_reg __iomem *reg; - unsigned int out_state; + struct idio_16 __iomem *reg; + struct idio_16_state state; }; =20 static int idio_16_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { - if (offset > 15) + if (idio_16_get_direction(offset)) return GPIO_LINE_DIRECTION_IN; =20 return GPIO_LINE_DIRECTION_OUT; @@ -97,15 +76,12 @@ static int idio_16_gpio_direction_output(struct gpio_ch= ip *chip, static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned int mask =3D BIT(offset-16); =20 - if (offset < 16) + /* Reading output signals is not supported */ + if (offset < IDIO_16_NOUT) return -EINVAL; =20 - if (offset < 24) - return !!(ioread8(&idio16gpio->reg->in0_7) & mask); - - return !!(ioread8(&idio16gpio->reg->in8_15) & (mask>>8)); + return idio_16_get(idio16gpio->reg, offset); } =20 static int idio_16_gpio_get_multiple(struct gpio_chip *chip, @@ -113,12 +89,11 @@ static int idio_16_gpio_get_multiple(struct gpio_chip = *chip, { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); =20 - *bits =3D 0; - if (*mask & GENMASK(23, 16)) - *bits |=3D (unsigned long)ioread8(&idio16gpio->reg->in0_7) << 16; - if (*mask & GENMASK(31, 24)) - *bits |=3D (unsigned long)ioread8(&idio16gpio->reg->in8_15) << 24; + /* Reading output signals is not supported */ + if (*mask & GENMASK(IDIO_16_NOUT - 1, 0)) + return -EINVAL; =20 + idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); return 0; } =20 @@ -126,44 +101,16 @@ static void idio_16_gpio_set(struct gpio_chip *chip, = unsigned int offset, int value) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - const unsigned int mask =3D BIT(offset); - unsigned long flags; - - if (offset > 15) - return; =20 - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - if (value) - idio16gpio->out_state |=3D mask; - else - idio16gpio->out_state &=3D ~mask; - - if (offset > 7) - iowrite8(idio16gpio->out_state >> 8, &idio16gpio->reg->out8_15); - else - iowrite8(idio16gpio->out_state, &idio16gpio->reg->out0_7); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); + idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); } =20 static void idio_16_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - unsigned long flags; =20 - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - idio16gpio->out_state &=3D ~*mask; - idio16gpio->out_state |=3D *mask & *bits; - - if (*mask & 0xFF) - iowrite8(idio16gpio->out_state, &idio16gpio->reg->out0_7); - if ((*mask >> 8) & 0xFF) - iowrite8(idio16gpio->out_state >> 8, &idio16gpio->reg->out8_15); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); + idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); } =20 static void idio_16_irq_ack(struct irq_data *data) @@ -296,7 +243,10 @@ static int idio_16_probe(struct device *dev, unsigned = int id) idio16gpio->chip.get_multiple =3D idio_16_gpio_get_multiple; idio16gpio->chip.set =3D idio_16_gpio_set; idio16gpio->chip.set_multiple =3D idio_16_gpio_set_multiple; - idio16gpio->out_state =3D 0xFFFF; + + /* FET off states are represented by bit values of "1" */ + bitmap_fill(idio16gpio->state.out_state, IDIO_16_NOUT); + idio_16_state_init(&idio16gpio->state); =20 girq =3D &idio16gpio->chip.irq; girq->chip =3D &idio_16_irqchip; @@ -338,3 +288,4 @@ module_isa_driver(idio_16_driver, num_idio_16); MODULE_AUTHOR("William Breathitt Gray "); MODULE_DESCRIPTION("ACCES 104-IDIO-16 GPIO driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(IDIO_16); --=20 2.37.2 From nobody Wed Apr 8 10:33:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F472C6FA86 for ; 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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id r19-20020a056870439300b00127d2005ea1sm4664249oah.18.2022.09.11.15.03.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Sep 2022 15:03:53 -0700 (PDT) From: William Breathitt Gray To: brgl@bgdev.pl, linus.walleij@linaro.org Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 3/3] gpio: pci-idio-16: Utilize the idio-16 GPIO library Date: Sun, 11 Sep 2022 16:34:40 -0400 Message-Id: X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The ACCES PCI-IDIO-16 device is part of the ACCES IDIO-16 family, so the idio-16 GPIO library module is selected and utilized to consolidate code. Signed-off-by: William Breathitt Gray --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-pci-idio-16.c | 119 ++++---------------------------- 2 files changed, 14 insertions(+), 106 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 48846ee476e2..8b90bff7b198 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1585,6 +1585,7 @@ config GPIO_PCH config GPIO_PCI_IDIO_16 tristate "ACCES PCI-IDIO-16 GPIO support" select GPIOLIB_IRQCHIP + select GPIO_IDIO_16 help Enables GPIO support for the ACCES PCI-IDIO-16. An interrupt is generated when any of the inputs change state (low to high or high to diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-1= 6.c index 71a13a394050..41f9c447ebf9 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -3,8 +3,7 @@ * GPIO driver for the ACCES PCI-IDIO-16 * Copyright (C) 2017 William Breathitt Gray */ -#include -#include +#include #include #include #include @@ -16,51 +15,28 @@ #include #include =20 -/** - * struct idio_16_gpio_reg - GPIO device registers structure - * @out0_7: Read: FET Drive Outputs 0-7 - * Write: FET Drive Outputs 0-7 - * @in0_7: Read: Isolated Inputs 0-7 - * Write: Clear Interrupt - * @irq_ctl: Read: Enable IRQ - * Write: Disable IRQ - * @filter_ctl: Read: Activate Input Filters 0-15 - * Write: Deactivate Input Filters 0-15 - * @out8_15: Read: FET Drive Outputs 8-15 - * Write: FET Drive Outputs 8-15 - * @in8_15: Read: Isolated Inputs 8-15 - * Write: Unused - * @irq_status: Read: Interrupt status - * Write: Unused - */ -struct idio_16_gpio_reg { - u8 out0_7; - u8 in0_7; - u8 irq_ctl; - u8 filter_ctl; - u8 out8_15; - u8 in8_15; - u8 irq_status; -}; +#include "gpio-idio-16.h" =20 /** * struct idio_16_gpio - GPIO device private data structure * @chip: instance of the gpio_chip * @lock: synchronization lock to prevent I/O race conditions * @reg: I/O address offset for the GPIO device registers + * @state: ACCES IDIO-16 device state * @irq_mask: I/O bits affected by interrupts */ struct idio_16_gpio { struct gpio_chip chip; raw_spinlock_t lock; - struct idio_16_gpio_reg __iomem *reg; + struct idio_16 __iomem *reg; + struct idio_16_state state; unsigned long irq_mask; }; =20 static int idio_16_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) { - if (offset > 15) + if (idio_16_get_direction(offset)) return GPIO_LINE_DIRECTION_IN; =20 return GPIO_LINE_DIRECTION_OUT; @@ -82,43 +58,16 @@ static int idio_16_gpio_direction_output(struct gpio_ch= ip *chip, static int idio_16_gpio_get(struct gpio_chip *chip, unsigned int offset) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - unsigned long mask =3D BIT(offset); - - if (offset < 8) - return !!(ioread8(&idio16gpio->reg->out0_7) & mask); - - if (offset < 16) - return !!(ioread8(&idio16gpio->reg->out8_15) & (mask >> 8)); - - if (offset < 24) - return !!(ioread8(&idio16gpio->reg->in0_7) & (mask >> 16)); =20 - return !!(ioread8(&idio16gpio->reg->in8_15) & (mask >> 24)); + return idio_16_get(idio16gpio->reg, offset); } =20 static int idio_16_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - void __iomem *ports[] =3D { - &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, - &idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15, - }; - void __iomem *port_addr; - unsigned long port_state; - - /* clear bits array to a clean slate */ - bitmap_zero(bits, chip->ngpio); - - for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { - port_addr =3D ports[offset / 8]; - port_state =3D ioread8(port_addr) & gpio_mask; - - bitmap_set_value8(bits, port_state, offset); - } =20 + idio_16_get_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); return 0; } =20 @@ -126,61 +75,16 @@ static void idio_16_gpio_set(struct gpio_chip *chip, u= nsigned int offset, int value) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - unsigned int mask =3D BIT(offset); - void __iomem *base; - unsigned long flags; - unsigned int out_state; - - if (offset > 15) - return; - - if (offset > 7) { - mask >>=3D 8; - base =3D &idio16gpio->reg->out8_15; - } else - base =3D &idio16gpio->reg->out0_7; - - raw_spin_lock_irqsave(&idio16gpio->lock, flags); =20 - if (value) - out_state =3D ioread8(base) | mask; - else - out_state =3D ioread8(base) & ~mask; - - iowrite8(out_state, base); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); + idio_16_set(idio16gpio->reg, &idio16gpio->state, offset, value); } =20 static void idio_16_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio =3D gpiochip_get_data(chip); - unsigned long offset; - unsigned long gpio_mask; - void __iomem *ports[] =3D { - &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, - }; - size_t index; - void __iomem *port_addr; - unsigned long bitmask; - unsigned long flags; - unsigned long out_state; =20 - for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { - index =3D offset / 8; - port_addr =3D ports[index]; - - bitmask =3D bitmap_get_value8(bits, offset) & gpio_mask; - - raw_spin_lock_irqsave(&idio16gpio->lock, flags); - - out_state =3D ioread8(port_addr) & ~gpio_mask; - out_state |=3D bitmask; - iowrite8(out_state, port_addr); - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); - } + idio_16_set_multiple(idio16gpio->reg, &idio16gpio->state, mask, bits); } =20 static void idio_16_irq_ack(struct irq_data *data) @@ -335,6 +239,8 @@ static int idio_16_probe(struct pci_dev *pdev, const st= ruct pci_device_id *id) idio16gpio->chip.set =3D idio_16_gpio_set; idio16gpio->chip.set_multiple =3D idio_16_gpio_set_multiple; =20 + idio_16_state_init(&idio16gpio->state); + girq =3D &idio16gpio->chip.irq; girq->chip =3D &idio_16_irqchip; /* This will let us handle the parent IRQ in the driver */ @@ -379,3 +285,4 @@ module_pci_driver(idio_16_driver); MODULE_AUTHOR("William Breathitt Gray "); MODULE_DESCRIPTION("ACCES PCI-IDIO-16 GPIO driver"); MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(IDIO_16); --=20 2.37.2