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Peter Anvin" , Michael Roth , Joerg Roedel , Andy Lutomirski , Peter Zijlstra Subject: [PATCH v1 1/2] x86/sev: Use per-CPU PSC structure in prep for unaccepted memory support Date: Fri, 29 Jul 2022 09:01:14 -0500 Message-ID: <658c455c40e8950cb046dd885dd19dc1c52d060a.1659103274.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: <20220614120231.48165-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c80b34ae-9663-4976-28af-08da716add4c X-MS-TrafficTypeDiagnostic: DM8PR12MB5493:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VQAIRcu6pYX+j/S4u7PBUN6S/+pbVoNgcIBSQGqJEW3Imm9mygWMjmbnnhMV//LGlUA5r/n7/aYY1dPi789oQg6TVUHZx0b85datWsPLV3P1n8DnmZ+B384ULKeJf/Ykgtrn7g3jSjXE8GKNKMe27xUnE19jjyJ77rcDMoMWAB3nqkoVEG4WIb9Pya9tPeaqt07/PbHOTaFhOfHANEogxMBuEGOIh0NrK8ckWWh3GXtoncfx5ElBzec3+JBsJ2ja+VRpf6m0/sXpccFVzJ586y4Gksn7jLdjEg5yB/gUyYFfQa9b3RD/c8gFNu662yp0egl89zDxOuvgxD1t4IUT8lWf8HIZM0uWzE9xhfiAagvQ4fIxb7XzNHV859hceZnBlBMuZh8fDR8aVVhJq9QYeJGLRUNYKaFGnM5KvmrLyPzTg4Yk32ZJYeJ++6zee8CzEA7OAvXflDOjeo8B1YZk62bexxaqc/dgPTIdu83hgjXQGyV448+JGJzboVQZHJvgvfoKXE+Au1npMOVBVIcUixYmfIAVZlQURoTwVih+TeijbyrLqkR2zlW0f04VSGLU+s2WbK6SgX5EAq3WeTAQnrpgArawEYw+M5iaFWueB4HQdkSNcdlkUCCGw1gpzfawJ+Veb11v8wpiRLJ1STIEvyCZyfhbPvAuxE/qNZhFaw1V6KVNDd8fPo1+nb7L0h4gWG7+RKjlIe/9CthdIKRc4bzu+p3feG7SgJJ83Un2UT8klbwlzrwD9TOEbgwWx2nY6XD6lsVC3hBAJbX8sjCnH2Gq9pMEJ6sCGR7czBJJb/yE+QnUDzPP/l0RELv06wH7QJMH7+3We4REBff60fZCZA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(396003)(346002)(39860400002)(376002)(136003)(40470700004)(46966006)(36840700001)(36756003)(83380400001)(336012)(16526019)(2616005)(186003)(426003)(47076005)(110136005)(8676002)(4326008)(70586007)(54906003)(70206006)(316002)(86362001)(2906002)(478600001)(40460700003)(7696005)(26005)(5660300002)(7416002)(8936002)(81166007)(356005)(82740400003)(82310400005)(41300700001)(6666004)(40480700001)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2022 14:01:41.7855 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c80b34ae-9663-4976-28af-08da716add4c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM8PR12MB5493 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In advance of providing support for unaccepted memory, switch from using kmalloc() for allocating the Page State Change structure to using a per-CPU structure. This is needed to avoid a possible recursive call into set_pages_state() if the allocation requires (more) memory to be accepted, which would result in a hang. Protect the use of the per-CPU structure by disabling interrupts during memory acceptance. Since the set_pages_state() path is the only path into vmgexit_psc(), rename vmgexit_psc() to __vmgexit_psc() and remove the calls to disable interrupts which are now performed by set_pages_state(). Even with interrupts disabled, an NMI can be raised while performing memory acceptance. The NMI could then cause further memory acceptance to performed. To prevent corruption to the per-CPU structure, use the PSC MSR protocol in this situation. Signed-off-by: Tom Lendacky --- arch/x86/kernel/sev.c | 60 ++++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 21 deletions(-) diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index c05f0124c410..1f7f6205c4f6 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -104,6 +104,15 @@ struct sev_es_runtime_data { * is currently unsupported in SEV-ES guests. */ unsigned long dr7; + + /* + * Page State Change structure for use when accepting memory or when + * changing page state. Interrupts are disabled when using the structure + * but an NMI could still be raised, so use a flag to indicate when the + * structure is in use and use the MSR protocol in these cases. + */ + struct snp_psc_desc psc_desc; + bool psc_active; }; =20 struct ghcb_state { @@ -660,7 +669,7 @@ static void pvalidate_pages(unsigned long vaddr, unsign= ed int npages, bool valid } } =20 -static void __init early_set_pages_state(unsigned long paddr, unsigned int= npages, enum psc_op op) +static void early_set_pages_state(unsigned long paddr, unsigned int npages= , enum psc_op op) { unsigned long paddr_end; u64 val; @@ -742,26 +751,17 @@ void __init snp_prep_memory(unsigned long paddr, unsi= gned int sz, enum psc_op op WARN(1, "invalid memory op %d\n", op); } =20 -static int vmgexit_psc(struct snp_psc_desc *desc) +static int __vmgexit_psc(struct snp_psc_desc *desc) { int cur_entry, end_entry, ret =3D 0; struct snp_psc_desc *data; struct ghcb_state state; struct es_em_ctxt ctxt; - unsigned long flags; struct ghcb *ghcb; =20 - /* - * __sev_get_ghcb() needs to run with IRQs disabled because it is using - * a per-CPU GHCB. - */ - local_irq_save(flags); - ghcb =3D __sev_get_ghcb(&state); - if (!ghcb) { - ret =3D 1; - goto out_unlock; - } + if (!ghcb) + return 1; =20 /* Copy the input desc into GHCB shared buffer */ data =3D (struct snp_psc_desc *)ghcb->shared_buffer; @@ -820,9 +820,6 @@ static int vmgexit_psc(struct snp_psc_desc *desc) out: __sev_put_ghcb(&state); =20 -out_unlock: - local_irq_restore(flags); - return ret; } =20 @@ -861,18 +858,32 @@ static void __set_pages_state(struct snp_psc_desc *da= ta, unsigned long vaddr, i++; } =20 - if (vmgexit_psc(data)) + if (__vmgexit_psc(data)) sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC); } =20 static void set_pages_state(unsigned long vaddr, unsigned int npages, int = op) { unsigned long vaddr_end, next_vaddr; + struct sev_es_runtime_data *data; struct snp_psc_desc *desc; + unsigned long flags; =20 - desc =3D kmalloc(sizeof(*desc), GFP_KERNEL_ACCOUNT); - if (!desc) - panic("SNP: failed to allocate memory for PSC descriptor\n"); + /* Disable interrupts since a per-CPU PSC and per-CPU GHCB are used. */ + local_irq_save(flags); + + data =3D this_cpu_read(runtime_data); + if (!data || data->psc_active) { + /* No per-CPU PSC or it is active, use the MSR protocol. */ + early_set_pages_state(__pa(vaddr), npages, op); + goto out; + } + + /* Mark the PSC in use. */ + data->psc_active =3D true; + barrier(); + + desc =3D &data->psc_desc; =20 vaddr =3D vaddr & PAGE_MASK; vaddr_end =3D vaddr + (npages << PAGE_SHIFT); @@ -887,7 +898,12 @@ static void set_pages_state(unsigned long vaddr, unsig= ned int npages, int op) vaddr =3D next_vaddr; } =20 - kfree(desc); + /* Mark the PSC no longer in use. */ + barrier(); + data->psc_active =3D false; + +out: + local_irq_restore(flags); } =20 void snp_set_memory_shared(unsigned long vaddr, unsigned int npages) @@ -1339,6 +1355,8 @@ static void __init alloc_runtime_data(int cpu) panic("Can't allocate SEV-ES runtime data"); =20 per_cpu(runtime_data, cpu) =3D data; + + data->psc_active =3D false; } =20 static void __init init_ghcb(int cpu) --=20 2.36.1 From nobody Wed Apr 15 00:01:11 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB7ADC00144 for ; Fri, 29 Jul 2022 14:02:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236832AbiG2OB5 (ORCPT ); Fri, 29 Jul 2022 10:01:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236168AbiG2OBs (ORCPT ); Fri, 29 Jul 2022 10:01:48 -0400 Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2065.outbound.protection.outlook.com [40.107.94.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB14332EF7 for ; Fri, 29 Jul 2022 07:01:46 -0700 (PDT) ARC-Seal: i=1; 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Peter Anvin" , Michael Roth , Joerg Roedel , Andy Lutomirski , Peter Zijlstra Subject: [PATCH v1 2/2] x86/sev: Add SNP-specific unaccepted memory support Date: Fri, 29 Jul 2022 09:01:15 -0500 Message-ID: <44495aa8acb666b447a08a1c3af80987aa3cea3a.1659103274.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: <20220614120231.48165-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c565fc3f-ee57-453e-be7b-08da716adeef X-MS-TrafficTypeDiagnostic: IA1PR12MB6529:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oJGrS4MKyoDOEO4trvJVFMxAS1pP1dJ65TmxTk85yRcgIY5hsYK6eVy6G/AYuoneeMrQjRPHQ+VnWlAkL2bUgAOF3KnfVx+Ed1bT8XvuFL1MkSaUkPwb+UeviYbVPE+FHqxRNmCOUduXGNdSjfATYOxXTQUJ7HSrpCa+hKAw94EUKRf/yL9alpifkypBsQxAgDL9q0bHB+fxoL+iSKzEZOdO4uYRrvPHwt0365IPRdjbHJoQJ/smI1SNB6RkdHAlqYD5aY8wMoj5WhfGrtfS3lt4leAqXE7cwh8EdgHP18amSYvaJ+AYlKgTnJu6gMMhqmuyncbY4Yu9qI+lxgz+ohT3977BgCeyOi2ZkpIy6KVNx3QAJnxMYUfoz5tn3k4Vyz+KTFjTKZ3VYOMZtic5KQgeju+ne/ycVV50TvL7ARoSWOOYgnFIxiI9h5VqZTKk3aHuoGBz8l4MbGPQlkubt6p6VCdzEaekwzTR/Yp3MJMgZtfxbaLi+VyvujWyWmtVxtzURcjysH/5ghAbwskORZCf1mwVAVKf+Qt/oYfw9xXUSjBmDURU832+4MFcrWi3udx87sy3/huJpmPKoYPO2pAFVYe9BsX40HLgd8mD4UYOAzHBJzbrpy8z8zQ+fwDXdO6nrWGOl3DmsFvkT8Z2RV2bpvLOvH8tfYlcrwAkYqTIHuKp8RNIQh/jXANMiQTH2lhtCSMCPIJIh7RMt0Qpw/3Vv7c1ERWybGWUAGbfhwIzdA1Qy3AFgNOCfXMy5PYsI6vEo1irRGuhVLbT6q8xc63hVhSJv5yMotgJdshbKtfUsSstptWz2SZF0JQWt8/j8+mTNwMlMDxfRBxPvrm5oQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(376002)(396003)(346002)(39860400002)(136003)(36840700001)(46966006)(40470700004)(41300700001)(336012)(47076005)(26005)(7696005)(426003)(2616005)(16526019)(6666004)(478600001)(36860700001)(82740400003)(186003)(81166007)(356005)(83380400001)(2906002)(4326008)(70206006)(110136005)(70586007)(36756003)(40480700001)(8936002)(8676002)(82310400005)(7416002)(54906003)(86362001)(316002)(40460700003)(5660300002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2022 14:01:44.5197 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c565fc3f-ee57-453e-be7b-08da716adeef X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6529 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add SNP-specific hooks to the unaccepted memory support in the boot path (__accept_memory()) and the core kernel (accept_memory()) in order to support booting SNP guests when unaccepted memory is present. Without this support, SNP guests will fail to boot and/or panic() when unaccepted memory is present in the EFI memory map. The process of accepting memory under SNP involves invoking the hypervisor to perform a page state change for the page to private memory and then issuing a PVALIDATE instruction to accept the page. Create the new header file arch/x86/boot/compressed/sev.h because adding the function declaration to any of the existing SEV related header files pulls in too many other header files, causing the build to fail. Signed-off-by: Tom Lendacky --- arch/x86/Kconfig | 1 + arch/x86/boot/compressed/mem.c | 3 +++ arch/x86/boot/compressed/sev.c | 10 +++++++++- arch/x86/boot/compressed/sev.h | 23 +++++++++++++++++++++++ arch/x86/include/asm/sev.h | 3 +++ arch/x86/kernel/sev.c | 16 ++++++++++++++++ arch/x86/mm/unaccepted_memory.c | 4 ++++ 7 files changed, 59 insertions(+), 1 deletion(-) create mode 100644 arch/x86/boot/compressed/sev.h diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 34146ecc5bdd..0ad53c3533c2 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1553,6 +1553,7 @@ config AMD_MEM_ENCRYPT select INSTRUCTION_DECODER select ARCH_HAS_CC_PLATFORM select X86_MEM_ENCRYPT + select UNACCEPTED_MEMORY help Say yes to enable support for the encryption of system memory. This requires an AMD processor that supports Secure Memory diff --git a/arch/x86/boot/compressed/mem.c b/arch/x86/boot/compressed/mem.c index 48e36e640da1..3e19dc0da0d7 100644 --- a/arch/x86/boot/compressed/mem.c +++ b/arch/x86/boot/compressed/mem.c @@ -6,6 +6,7 @@ #include "find.h" #include "math.h" #include "tdx.h" +#include "sev.h" #include =20 #define PMD_SHIFT 21 @@ -39,6 +40,8 @@ static inline void __accept_memory(phys_addr_t start, phy= s_addr_t end) /* Platform-specific memory-acceptance call goes here */ if (is_tdx_guest()) tdx_accept_memory(start, end); + else if (sev_snp_enabled()) + snp_accept_memory(start, end); else error("Cannot accept memory: unknown platform\n"); } diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 730c4677e9db..d4b06c862094 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -115,7 +115,7 @@ static enum es_result vc_read_mem(struct es_em_ctxt *ct= xt, /* Include code for early handlers */ #include "../../kernel/sev-shared.c" =20 -static inline bool sev_snp_enabled(void) +bool sev_snp_enabled(void) { return sev_status & MSR_AMD64_SEV_SNP_ENABLED; } @@ -161,6 +161,14 @@ void snp_set_page_shared(unsigned long paddr) __page_state_change(paddr, SNP_PAGE_STATE_SHARED); } =20 +void snp_accept_memory(phys_addr_t start, phys_addr_t end) +{ + while (end > start) { + snp_set_page_private(start); + start +=3D PAGE_SIZE; + } +} + static bool early_setup_ghcb(void) { if (set_page_decrypted((unsigned long)&boot_ghcb_page)) diff --git a/arch/x86/boot/compressed/sev.h b/arch/x86/boot/compressed/sev.h new file mode 100644 index 000000000000..fc725a981b09 --- /dev/null +++ b/arch/x86/boot/compressed/sev.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * AMD SEV header for early boot related functions. + * + * Author: Tom Lendacky + */ + +#ifndef BOOT_COMPRESSED_SEV_H +#define BOOT_COMPRESSED_SEV_H + +#ifdef CONFIG_AMD_MEM_ENCRYPT + +bool sev_snp_enabled(void); +void snp_accept_memory(phys_addr_t start, phys_addr_t end); + +#else + +static inline bool sev_snp_enabled(void) { return false; } +static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) {= } + +#endif + +#endif diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 19514524f0f8..21db66bacefe 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -202,6 +202,7 @@ void snp_set_wakeup_secondary_cpu(void); bool snp_init(struct boot_params *bp); void snp_abort(void); int snp_issue_guest_request(u64 exit_code, struct snp_req_data *input, uns= igned long *fw_err); +void snp_accept_memory(phys_addr_t start, phys_addr_t end); #else static inline void sev_es_ist_enter(struct pt_regs *regs) { } static inline void sev_es_ist_exit(void) { } @@ -226,6 +227,8 @@ static inline int snp_issue_guest_request(u64 exit_code= , struct snp_req_data *in { return -ENOTTY; } + +static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) {= } #endif =20 #endif diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 1f7f6205c4f6..289764e3a0b5 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -926,6 +926,22 @@ void snp_set_memory_private(unsigned long vaddr, unsig= ned int npages) pvalidate_pages(vaddr, npages, true); } =20 +void snp_accept_memory(phys_addr_t start, phys_addr_t end) +{ + unsigned long vaddr; + unsigned int npages; + + if (!cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) + return; + + vaddr =3D (unsigned long)__va(start); + npages =3D (end - start) >> PAGE_SHIFT; + + set_pages_state(vaddr, npages, SNP_PAGE_STATE_PRIVATE); + + pvalidate_pages(vaddr, npages, true); +} + static int snp_set_vmsa(void *va, bool vmsa) { u64 attrs; diff --git a/arch/x86/mm/unaccepted_memory.c b/arch/x86/mm/unaccepted_memor= y.c index 9ec2304272dc..b86ad6a8ddf5 100644 --- a/arch/x86/mm/unaccepted_memory.c +++ b/arch/x86/mm/unaccepted_memory.c @@ -9,6 +9,7 @@ #include #include #include +#include =20 /* Protects unaccepted memory bitmap */ static DEFINE_SPINLOCK(unaccepted_memory_lock); @@ -66,6 +67,9 @@ void accept_memory(phys_addr_t start, phys_addr_t end) if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) { tdx_accept_memory(range_start * PMD_SIZE, range_end * PMD_SIZE); + } else if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) { + snp_accept_memory(range_start * PMD_SIZE, + range_end * PMD_SIZE); } else { panic("Cannot accept memory: unknown platform\n"); } --=20 2.36.1