From nobody Wed Jun 24 15:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B9A3C433F5 for ; Sat, 5 Mar 2022 21:32:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232641AbiCEVc7 (ORCPT ); Sat, 5 Mar 2022 16:32:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230119AbiCEVc5 (ORCPT ); Sat, 5 Mar 2022 16:32:57 -0500 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B9CD455741 for ; Sat, 5 Mar 2022 13:32:06 -0800 (PST) Received: by mail-wr1-x42d.google.com with SMTP id n15so3505600wra.6 for ; Sat, 05 Mar 2022 13:32:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=6UZ/MpVxQQe0WGfPdM9RkSy+enCWjxgD5uwVrrDdFnQ=; b=WN4G5XTEARjxlnBz+MybGKIAyjG/qtmxcwSd+NhcoamE2IfiCW1l2uBeAMgCWZ7IBz 0mnFXYOZBTt0AQUP2NfJ3zW3MjtG/CK/36pjENs5a7HmXXgq7fbnJTksZl36LBHXhjlW vNOIlBAOTR7ICgy70f/Mj5XzMV0fci59jOd+JeIE1LoPwpIcq7v2E4d1J5sjlyo2fUTq lb+NDW53fV/1HNCiuoq2AP3ik3tiuJXNFFWSQjJa7RZOQBDCXqaw7oi9CoDWZe3wiqPu zM803FNY2SAahg29Om9jB5C6IsjyuXiKI9fwtfEM3v5Ac95H5yYE56XhSTTtKfM80OSp zIPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=6UZ/MpVxQQe0WGfPdM9RkSy+enCWjxgD5uwVrrDdFnQ=; b=mSlWTsLcT6m//IUMBUo/PsB3aXQ347P7d+77jrjSZgoPwFWVrLOSBJcJh4aW4ww5Fy Up08X7Iwk+1qnHKo1BrOoQjsOJSpbwjsOAHs97alb/qv35Fg4ru9nKd4+e0+DjRQD9QK XDYV63itIGx9u5IdLmEK3mfT3BIEt5xi9VmqrR8ug1qdZimfoEVdtKsvWeF2Q5kM4JiQ CrZ478PxYAWHHXScrXZS29tG5qig1DKyDzx3QWoelsEMccB6wdFH1b7YYSZbTUf4p3L+ zejxwvJvZXxDviSYzIYA9cq2Zd634aIVzDTSLYfUcHimoJVymH+sx7AzE4q4txQaSog6 v8jg== X-Gm-Message-State: AOAM530oB2+XHrFYsW77xkboQc6Sm/eaqoHG3xT5YQlsXx0DkxJgPIC6 ZsNmbttoghTNd/Rzk5AcK/rAi6NPsAY= X-Google-Smtp-Source: ABdhPJx/pGAO+jaXXCVJKaEwM+jVLaJ1h0UPyKYKCQ4yRY+mzjgc6//G8DjW6YvUdmI0kak30pYNlw== X-Received: by 2002:a05:6000:186d:b0:1e8:49fc:69ce with SMTP id d13-20020a056000186d00b001e849fc69cemr3442992wri.80.1646515925361; Sat, 05 Mar 2022 13:32:05 -0800 (PST) Received: from matrix-ESPRIMO-P710 (p57935aa6.dip0.t-ipconnect.de. [87.147.90.166]) by smtp.gmail.com with ESMTPSA id y10-20020adfee0a000000b001f0639001ffsm9662098wrn.9.2022.03.05.13.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:32:05 -0800 (PST) Date: Sat, 5 Mar 2022 22:32:03 +0100 From: Philipp Hortmann To: Forest Bond , Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] staging: vt6655: Remove unused byRFType in channel.c Message-ID: <3724590188e72e8f531fe03c2821c5d3d08e2e29.1646512837.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove byRFType that support 5GHz band. Signed-off-by: Philipp Hortmann --- drivers/staging/vt6655/channel.c | 85 +------------------------------- 1 file changed, 1 insertion(+), 84 deletions(-) diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/chan= nel.c index e37c8e35a45b..abe867814dc8 100644 --- a/drivers/staging/vt6655/channel.c +++ b/drivers/staging/vt6655/channel.c @@ -25,17 +25,6 @@ static struct ieee80211_rate vnt_rates_bg[] =3D { { .bitrate =3D 540, .hw_value =3D RATE_54M }, }; =20 -static struct ieee80211_rate vnt_rates_a[] =3D { - { .bitrate =3D 60, .hw_value =3D RATE_6M }, - { .bitrate =3D 90, .hw_value =3D RATE_9M }, - { .bitrate =3D 120, .hw_value =3D RATE_12M }, - { .bitrate =3D 180, .hw_value =3D RATE_18M }, - { .bitrate =3D 240, .hw_value =3D RATE_24M }, - { .bitrate =3D 360, .hw_value =3D RATE_36M }, - { .bitrate =3D 480, .hw_value =3D RATE_48M }, - { .bitrate =3D 540, .hw_value =3D RATE_54M }, -}; - static struct ieee80211_channel vnt_channels_2ghz[] =3D { { .center_freq =3D 2412, .hw_value =3D 1 }, { .center_freq =3D 2417, .hw_value =3D 2 }, @@ -53,51 +42,6 @@ static struct ieee80211_channel vnt_channels_2ghz[] =3D { { .center_freq =3D 2484, .hw_value =3D 14 } }; =20 -static struct ieee80211_channel vnt_channels_5ghz[] =3D { - { .center_freq =3D 4915, .hw_value =3D 15 }, - { .center_freq =3D 4920, .hw_value =3D 16 }, - { .center_freq =3D 4925, .hw_value =3D 17 }, - { .center_freq =3D 4935, .hw_value =3D 18 }, - { .center_freq =3D 4940, .hw_value =3D 19 }, - { .center_freq =3D 4945, .hw_value =3D 20 }, - { .center_freq =3D 4960, .hw_value =3D 21 }, - { .center_freq =3D 4980, .hw_value =3D 22 }, - { .center_freq =3D 5035, .hw_value =3D 23 }, - { .center_freq =3D 5040, .hw_value =3D 24 }, - { .center_freq =3D 5045, .hw_value =3D 25 }, - { .center_freq =3D 5055, .hw_value =3D 26 }, - { .center_freq =3D 5060, .hw_value =3D 27 }, - { .center_freq =3D 5080, .hw_value =3D 28 }, - { .center_freq =3D 5170, .hw_value =3D 29 }, - { .center_freq =3D 5180, .hw_value =3D 30 }, - { .center_freq =3D 5190, .hw_value =3D 31 }, - { .center_freq =3D 5200, .hw_value =3D 32 }, - { .center_freq =3D 5210, .hw_value =3D 33 }, - { .center_freq =3D 5220, .hw_value =3D 34 }, - { .center_freq =3D 5230, .hw_value =3D 35 }, - { .center_freq =3D 5240, .hw_value =3D 36 }, - { .center_freq =3D 5260, .hw_value =3D 37 }, - { .center_freq =3D 5280, .hw_value =3D 38 }, - { .center_freq =3D 5300, .hw_value =3D 39 }, - { .center_freq =3D 5320, .hw_value =3D 40 }, - { .center_freq =3D 5500, .hw_value =3D 41 }, - { .center_freq =3D 5520, .hw_value =3D 42 }, - { .center_freq =3D 5540, .hw_value =3D 43 }, - { .center_freq =3D 5560, .hw_value =3D 44 }, - { .center_freq =3D 5580, .hw_value =3D 45 }, - { .center_freq =3D 5600, .hw_value =3D 46 }, - { .center_freq =3D 5620, .hw_value =3D 47 }, - { .center_freq =3D 5640, .hw_value =3D 48 }, - { .center_freq =3D 5660, .hw_value =3D 49 }, - { .center_freq =3D 5680, .hw_value =3D 50 }, - { .center_freq =3D 5700, .hw_value =3D 51 }, - { .center_freq =3D 5745, .hw_value =3D 52 }, - { .center_freq =3D 5765, .hw_value =3D 53 }, - { .center_freq =3D 5785, .hw_value =3D 54 }, - { .center_freq =3D 5805, .hw_value =3D 55 }, - { .center_freq =3D 5825, .hw_value =3D 56 } -}; - static struct ieee80211_supported_band vnt_supported_2ghz_band =3D { .channels =3D vnt_channels_2ghz, .n_channels =3D ARRAY_SIZE(vnt_channels_2ghz), @@ -105,13 +49,6 @@ static struct ieee80211_supported_band vnt_supported_2g= hz_band =3D { .n_bitrates =3D ARRAY_SIZE(vnt_rates_bg), }; =20 -static struct ieee80211_supported_band vnt_supported_5ghz_band =3D { - .channels =3D vnt_channels_5ghz, - .n_channels =3D ARRAY_SIZE(vnt_channels_5ghz), - .bitrates =3D vnt_rates_a, - .n_bitrates =3D ARRAY_SIZE(vnt_rates_a), -}; - static void vnt_init_band(struct vnt_private *priv, struct ieee80211_supported_band *supported_band, enum nl80211_band band) @@ -129,23 +66,7 @@ static void vnt_init_band(struct vnt_private *priv, =20 void vnt_init_bands(struct vnt_private *priv) { - switch (priv->byRFType) { - case RF_AIROHA7230: - case RF_UW2452: - case RF_NOTHING: - default: - vnt_init_band(priv, &vnt_supported_5ghz_band, - NL80211_BAND_5GHZ); - fallthrough; - case RF_RFMD2959: - case RF_AIROHA: - case RF_AL2230S: - case RF_UW2451: - case RF_VT3226: - vnt_init_band(priv, &vnt_supported_2ghz_band, - NL80211_BAND_2GHZ); - break; - } + vnt_init_band(priv, &vnt_supported_2ghz_band, NL80211_BAND_2GHZ); } =20 /** @@ -179,10 +100,6 @@ bool set_channel(struct vnt_private *priv, struct ieee= 80211_channel *ch) * it is for better TX throughput */ =20 - if (priv->byRFType =3D=3D RF_AIROHA7230) - RFbAL7230SelectChannelPostProcess(priv, priv->byCurrentCh, - ch->hw_value); - priv->byCurrentCh =3D ch->hw_value; ret &=3D RFbSelectChannel(priv, priv->byRFType, ch->hw_value); --=20 2.25.1 From nobody Wed Jun 24 15:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A10FC4332F for ; Sat, 5 Mar 2022 21:32:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232648AbiCEVdF (ORCPT ); Sat, 5 Mar 2022 16:33:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230119AbiCEVdD (ORCPT ); Sat, 5 Mar 2022 16:33:03 -0500 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2C6457B2F for ; Sat, 5 Mar 2022 13:32:12 -0800 (PST) Received: by mail-wm1-x335.google.com with SMTP id 7-20020a05600c228700b00385fd860f49so6235039wmf.0 for ; Sat, 05 Mar 2022 13:32:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=TCx+9DHYBDfhmL0fL+WqxIFbJRjvIL+R18LxRNlSocY=; b=D/6Mxh03JisIRPfW54LnnhXMLj+II1rV2a1HSZsFlV3QaIN7ujYC5NFOf4xY/YwJi2 rbW+B0cBnghR/lhw5MoiYwVwIo4656irbteAKpLrDj82Jdo+zD3oAKy6AFfXEnv4+gpI gHUNP0ESSQRFA5cmuejvRrIb6iT8GGfGuTVgS0PvikKpk0Z24r2riNod/QOgk9luP1rq HWbq+05bCGu+/bxnsXQOByfV7S/G/Xh5+R69BuLI0WiDuNCWAcXTDq2hqHiIYk4fFJ/8 6eGpc7XuclJpDpu+tO0hGKyKUGuwcbFhis/7P+lL4L+CiuVELgT27qNxpBzdpfse563E bCQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=TCx+9DHYBDfhmL0fL+WqxIFbJRjvIL+R18LxRNlSocY=; b=vFxqkPAsvPye1Ln4Q0sDHWIj1Gh0SLY6NNUxMou4DusNUIg7xpJQiWnLDrLJSB5m2x uUHT43xKN6RYZd8L9PNwHc9ECIXO0Hbp+RpQCsxSH/c9tI+nQE765bM+YxjCiIRg0hww kQ97jwa1n9MWyI0Vtx2wAmGIaZ/uRZXWkfjTSzav4eTCCg0+ztjFIkIWlZ34PtCUHZ5Q 6GqRlgwfi0XuC3nb9z9f8fVJMJlSYfaCNQtRBYPCHzgHDbsx0OHDs+imzaai1gaEYNP1 m5ioOESvWtBh/GKQ8kcS4QOWt9tznbeHfKA2ZuhmfZWWvOyK6g6qNJUStQjU3MxA1u40 A6bA== X-Gm-Message-State: AOAM53214nzn+OMKMi53tgEKUVoOtz/STujXMEq16czA46jhP48pFOEf XHXS/SH1H89jYonWNFi+sy1DdaMih1E= X-Google-Smtp-Source: ABdhPJw0e9sHrbr/DRqxVtpj/ROvHK3Uv7WPuxxIZQbWYFNbLxKH5CeV0/OPPVfaBScmmUFyYNwBiw== X-Received: by 2002:a1c:f003:0:b0:381:17f5:21b8 with SMTP id a3-20020a1cf003000000b0038117f521b8mr3558814wmb.158.1646515930701; Sat, 05 Mar 2022 13:32:10 -0800 (PST) Received: from matrix-ESPRIMO-P710 (p57935aa6.dip0.t-ipconnect.de. [87.147.90.166]) by smtp.gmail.com with ESMTPSA id b7-20020adfe647000000b001f1d614b8besm3783740wrn.112.2022.03.05.13.32.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:32:10 -0800 (PST) Date: Sat, 5 Mar 2022 22:32:08 +0100 From: Philipp Hortmann To: Forest Bond , Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] staging: vt6655: Remove unused byRFType in baseband.c Message-ID: <198341a249ea67acbf1be00b6465aa6a4eaef6e1.1646512837.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove byRFType that support 5GHz band. Signed-off-by: Philipp Hortmann --- drivers/staging/vt6655/baseband.c | 80 ------------------------------- 1 file changed, 80 deletions(-) diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/bas= eband.c index 84fa6ea3e2e6..dfdb0ebf43b5 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -2065,54 +2065,6 @@ bool bb_vt3253_init(struct vnt_private *priv) priv->dbm_threshold[1] =3D -50; priv->dbm_threshold[2] =3D 0; priv->dbm_threshold[3] =3D 0; - } else if (by_rf_type =3D=3D RF_UW2452) { - for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) - result &=3D bb_write_embedded(priv, - byVT3253B0_UW2451[ii][0], - byVT3253B0_UW2451[ii][1]); - - /* Init ANT B select, - * TX Config CR09 =3D 0x61->0x45, - * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) - */ - - /*bResult &=3D bb_write_embedded(iobase,0x09,0x41);*/ - - /* Init ANT B select, - * RX Config CR10 =3D 0x28->0x2A, - * 0x2A->0x28(VC1/VC2 define, - * make the ANT_A, ANT_B inverted) - */ - - /*bResult &=3D bb_write_embedded(iobase,0x0a,0x28);*/ - /* Select VC1/VC2, CR215 =3D 0x02->0x06 */ - result &=3D bb_write_embedded(priv, 0xd7, 0x06); - - /* {{RobertYu:20050125, request by Jack */ - result &=3D bb_write_embedded(priv, 0x90, 0x20); - result &=3D bb_write_embedded(priv, 0x97, 0xeb); - /* }} */ - - /* {{RobertYu:20050221, request by Jack */ - result &=3D bb_write_embedded(priv, 0xa6, 0x00); - result &=3D bb_write_embedded(priv, 0xa8, 0x30); - /* }} */ - result &=3D bb_write_embedded(priv, 0xb0, 0x58); - - for (ii =3D 0; ii < CB_VT3253B0_AGC; ii++) - result &=3D bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); - - priv->abyBBVGA[0] =3D 0x14; - priv->abyBBVGA[1] =3D 0x0A; - priv->abyBBVGA[2] =3D 0x0; - priv->abyBBVGA[3] =3D 0x0; - priv->dbm_threshold[0] =3D -60; - priv->dbm_threshold[1] =3D -50; - priv->dbm_threshold[2] =3D 0; - priv->dbm_threshold[3] =3D 0; - /* }} RobertYu */ - } else if (by_rf_type =3D=3D RF_VT3226) { for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) result &=3D bb_write_embedded(priv, @@ -2134,38 +2086,6 @@ bool bb_vt3253_init(struct vnt_private *priv) /* Fix VT3226 DFC system timing issue */ MACvSetRFLE_LatchBase(iobase); /* {{ RobertYu: 20050104 */ - } else if (by_rf_type =3D=3D RF_AIROHA7230) { - for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) - result &=3D bb_write_embedded(priv, - byVT3253B0_AIROHA2230[ii][0], - byVT3253B0_AIROHA2230[ii][1]); - - /* {{ RobertYu:20050223, request by JerryChung */ - /* Init ANT B select,TX Config CR09 =3D 0x61->0x45, - * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) - */ - /* bResult &=3D bb_write_embedded(iobase,0x09,0x41);*/ - /* Init ANT B select,RX Config CR10 =3D 0x28->0x2A, - * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) - */ - /* bResult &=3D BBbWriteEmbedded(iobase,0x0a,0x28);*/ - /* Select VC1/VC2, CR215 =3D 0x02->0x06 */ - result &=3D bb_write_embedded(priv, 0xd7, 0x06); - /* }} */ - - for (ii =3D 0; ii < CB_VT3253B0_AGC; ii++) - result &=3D bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); - - priv->abyBBVGA[0] =3D 0x1C; - priv->abyBBVGA[1] =3D 0x10; - priv->abyBBVGA[2] =3D 0x0; - priv->abyBBVGA[3] =3D 0x0; - priv->dbm_threshold[0] =3D -70; - priv->dbm_threshold[1] =3D -48; - priv->dbm_threshold[2] =3D 0; - priv->dbm_threshold[3] =3D 0; - /* }} RobertYu */ } else { /* No VGA Table now */ priv->bUpdateBBVGA =3D false; --=20 2.25.1 From nobody Wed Jun 24 15:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9138C433FE for ; Sat, 5 Mar 2022 21:32:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232657AbiCEVdO (ORCPT ); Sat, 5 Mar 2022 16:33:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232643AbiCEVdK (ORCPT ); Sat, 5 Mar 2022 16:33:10 -0500 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD5A25D65B for ; Sat, 5 Mar 2022 13:32:17 -0800 (PST) Received: by mail-wm1-x332.google.com with SMTP id o18-20020a05600c4fd200b003826701f847so8541538wmq.4 for ; Sat, 05 Mar 2022 13:32:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=uOr8Mm2UMX8CYmOmgKbBBZx5cvoPs1qxS2PxBA8vz4k=; b=QzL5nxH9hFMfqcHPu6yJ0qyG/eQiu/Qk1vAswl3BIRmkKXUdLiWlWmT8xcCnUXMaeY lxQW2ll349eSEqNWjN7uAyJtKVGK+2gbhDkW7vBPm84Y6QzXHT2yvw167Grz/d3S8sas eV8Qq8uzh6JFje9aMOG2DipI80KI2DvgaLjjrMA4/vO7rwgRXsdedtcbI8aLRezk57fw JDJSDu+EYp8rMdnepRo6+QsU3rKh9P5OvINWS8rPh4jRAFVxr/21rjpvFdIdTk5LgV9E pEdL48lfg0TWhuEv9ZtUn+mJvZpwCIVppjGSZWrLYkkYOmOcG0L0HwIj0MjYCc3EXWSk 2vUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=uOr8Mm2UMX8CYmOmgKbBBZx5cvoPs1qxS2PxBA8vz4k=; b=6tsqs7ctURJyy088pCNVr4tfYDD/xgIS2bjAqzjLmAnv7jJeqllJ8lOpqkEAvuNUHi GdyoayKuPMgNG8rEvsSrdLbvrlVyKCqjcEWn1IofnpcGQ/wiE+8YbEpzCPS7MNZnGfDB TCtNQpMhvpOAP3uJT2oY22eZP+9a4jngwF8GfMPFBIuJXsufoD5q34bKWmiZsPlSLo2Q VEKWWSVhfOnldIDK/raqbe1TDaxFAjvrAdNxlLbNIPMUVhsEU65V0UIJx/Uav70ApG// l0uUlfeFbn6n5QbLNmpPNLasTYsdte2HfL3h+mPAMne1ZQxpavpxL/sakcW1HULySvCo UVvg== X-Gm-Message-State: AOAM532UIqCfe9/xq3kS4DQuuQc0stukWHubFOc+jWJhVkrzUZsUHPcL 8ZHE1aerJOsfe/CSs5s6lkI= X-Google-Smtp-Source: ABdhPJyDxP/+0SHUzahPGF2vPJcSIz/SqBrSQ/zZfE1XMLt7nZfp7102pxcssHtBhpYP41xd7nXobw== X-Received: by 2002:a05:600c:5105:b0:381:811a:ce1c with SMTP id o5-20020a05600c510500b00381811ace1cmr3559375wms.109.1646515936238; Sat, 05 Mar 2022 13:32:16 -0800 (PST) Received: from matrix-ESPRIMO-P710 (p57935aa6.dip0.t-ipconnect.de. [87.147.90.166]) by smtp.gmail.com with ESMTPSA id az32-20020a05600c602000b00381892f346dsm18837806wmb.2.2022.03.05.13.32.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:32:15 -0800 (PST) Date: Sat, 5 Mar 2022 22:32:14 +0100 From: Philipp Hortmann To: Forest Bond , Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 3/4] staging: vt6655: Remove unused byRFType in rf.c Message-ID: <640bdbc0ff135c6a63d6764fd81a8bb24d5053dd.1646512837.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove byRFType that support 5GHz band. Signed-off-by: Philipp Hortmann --- drivers/staging/vt6655/rf.c | 404 +----------------------------------- 1 file changed, 1 insertion(+), 403 deletions(-) diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c index ba7056f5a5da..4498c9d400f2 100644 --- a/drivers/staging/vt6655/rf.c +++ b/drivers/staging/vt6655/rf.c @@ -152,333 +152,6 @@ static unsigned long al2230_power_table[AL2230_PWR_ID= X_LEN] =3D { 0x0407F900 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW }; =20 -/* 40MHz reference frequency - * Need to Pull PLLON(PE3) low when writing channel registers through 3-wi= re. - */ -static const unsigned long al7230_init_table[CB_AL7230_INIT_SEQ] =3D { - 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel1 // Nee= d modify for 11a */ - 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel1 // Nee= d modify for 11a */ - 0x841FF200 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: 451FE2 */ - 0x3FDFA300 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: 5FDFA3 */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* 11b/g // Nee= d modify for 11a */ - /* RoberYu:20050113, Rev0.47 Register Setting Guide */ - 0x802B5500 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: 8D1B55 */ - 0x56AF3600 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0xCE020700 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: 860207 */ - 0x6EBC0800 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x221BB900 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0xE0000A00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: E0600A */ - 0x08031B00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* init 0x080B1B00= =3D> 0x080F1B00 for 3 wire control TxGain(D10) */ - /* RoberYu:20050113, Rev0.47 Register Setting Guide */ - 0x000A3C00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11a: 00143C */ - 0xFFFFFD00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x00000E00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x1ABA8F00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* Need modify for= 11a: 12BACF */ -}; - -static const unsigned long al7230_init_table_a_mode[CB_AL7230_INIT_SEQ] = =3D { - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel184 // N= eed modify for 11b/g */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Channel184 // N= eed modify for 11b/g */ - 0x451FE200 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g */ - 0x5FDFA300 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g */ - 0x67F78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* 11a // Need = modify for 11b/g */ - 0x853F5500 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g, RoberYu:20050113 */ - 0x56AF3600 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0xCE020700 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g */ - 0x6EBC0800 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x221BB900 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0xE0600A00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g */ - 0x08031B00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* init 0x080B1B00= =3D> 0x080F1B00 for 3 wire control TxGain(D10) */ - 0x00147C00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* Need modify for= 11b/g */ - 0xFFFFFD00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x00000E00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, - 0x12BACF00 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* Need modify for= 11b/g */ -}; - -static const unsigned long al7230_channel_table0[CB_MAX_CHANNEL] =3D { - 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 1,= Tf =3D 2412MHz */ - 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 2,= Tf =3D 2417MHz */ - 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 3,= Tf =3D 2422MHz */ - 0x00379000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 4,= Tf =3D 2427MHz */ - 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 5,= Tf =3D 2432MHz */ - 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 6,= Tf =3D 2437MHz */ - 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7,= Tf =3D 2442MHz */ - 0x0037A000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8,= Tf =3D 2447MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9,= Tf =3D 2452MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 10,= Tf =3D 2457MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11,= Tf =3D 2462MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037B000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12,= Tf =3D 2467MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 13,= Tf =3D 2472MHz //RobertYu: 20050218, update for APNode 0.49 */ - 0x0037C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 14,= Tf =3D 2484MHz */ - - /* 4.9G =3D> Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 183= , Tf =3D 4915MHz (15) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 184= , Tf =3D 4920MHz (16) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 185= , Tf =3D 4925MHz (17) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 187= , Tf =3D 4935MHz (18) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 188= , Tf =3D 4940MHz (19) */ - 0x0FF52000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 189= , Tf =3D 4945MHz (20) */ - 0x0FF53000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 192= , Tf =3D 4960MHz (21) */ - 0x0FF53000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 196= , Tf =3D 4980MHz (22) */ - - /* 5G =3D> Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56= , 60, 64, - * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, = 161, 165 (Value 23 ~ 56) - */ - - 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7= , Tf =3D 5035MHz (23) */ - 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8= , Tf =3D 5040MHz (24) */ - 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9= , Tf =3D 5045MHz (25) */ - 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11= , Tf =3D 5055MHz (26) */ - 0x0FF54000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12= , Tf =3D 5060MHz (27) */ - 0x0FF55000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 16= , Tf =3D 5080MHz (28) */ - 0x0FF56000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 34= , Tf =3D 5170MHz (29) */ - 0x0FF56000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 36= , Tf =3D 5180MHz (30) */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 38= , Tf =3D 5190MHz (31) //RobertYu: 20050218, update for APNode 0.49 */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 40= , Tf =3D 5200MHz (32) */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 42= , Tf =3D 5210MHz (33) */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 44= , Tf =3D 5220MHz (34) */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 46= , Tf =3D 5230MHz (35) */ - 0x0FF57000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 48= , Tf =3D 5240MHz (36) */ - 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 52= , Tf =3D 5260MHz (37) */ - 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 56= , Tf =3D 5280MHz (38) */ - 0x0FF58000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 60= , Tf =3D 5300MHz (39) */ - 0x0FF59000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 64= , Tf =3D 5320MHz (40) */ - - 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 100= , Tf =3D 5500MHz (41) */ - 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 104= , Tf =3D 5520MHz (42) */ - 0x0FF5C000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 108= , Tf =3D 5540MHz (43) */ - 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 112= , Tf =3D 5560MHz (44) */ - 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 116= , Tf =3D 5580MHz (45) */ - 0x0FF5D000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 120= , Tf =3D 5600MHz (46) */ - 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 124= , Tf =3D 5620MHz (47) */ - 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 128= , Tf =3D 5640MHz (48) */ - 0x0FF5E000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 132= , Tf =3D 5660MHz (49) */ - 0x0FF5F000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 136= , Tf =3D 5680MHz (50) */ - 0x0FF5F000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 140= , Tf =3D 5700MHz (51) */ - 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 149= , Tf =3D 5745MHz (52) */ - 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 153= , Tf =3D 5765MHz (53) */ - 0x0FF60000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 157= , Tf =3D 5785MHz (54) */ - 0x0FF61000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 161= , Tf =3D 5805MHz (55) */ - 0x0FF61000 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel =3D 165= , Tf =3D 5825MHz (56) */ -}; - -static const unsigned long al7230_channel_table1[CB_MAX_CHANNEL] =3D { - 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 1,= Tf =3D 2412MHz */ - 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 2,= Tf =3D 2417MHz */ - 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 3,= Tf =3D 2422MHz */ - 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 4,= Tf =3D 2427MHz */ - 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 5,= Tf =3D 2432MHz */ - 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 6,= Tf =3D 2437MHz */ - 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7,= Tf =3D 2442MHz */ - 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8,= Tf =3D 2447MHz */ - 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9,= Tf =3D 2452MHz */ - 0x1B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 10,= Tf =3D 2457MHz */ - 0x03333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11,= Tf =3D 2462MHz */ - 0x0B333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12,= Tf =3D 2467MHz */ - 0x13333100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 13,= Tf =3D 2472MHz */ - 0x06666100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 14,= Tf =3D 2484MHz */ - - /* 4.9G =3D> Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */ - 0x1D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 183= , Tf =3D 4915MHz (15) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 184= , Tf =3D 4920MHz (16) */ - 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 185= , Tf =3D 4925MHz (17) */ - 0x08000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 187= , Tf =3D 4935MHz (18) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 188= , Tf =3D 4940MHz (19) */ - 0x0D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 189= , Tf =3D 4945MHz (20) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 192= , Tf =3D 4960MHz (21) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 196= , Tf =3D 4980MHz (22) */ - - /* 5G =3D> Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56= , 60, 64, - * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, = 161, 165 (Value 23 ~ 56) - */ - 0x1D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7= , Tf =3D 5035MHz (23) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8= , Tf =3D 5040MHz (24) */ - 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9= , Tf =3D 5045MHz (25) */ - 0x08000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11= , Tf =3D 5055MHz (26) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12= , Tf =3D 5060MHz (27) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 16= , Tf =3D 5080MHz (28) */ - 0x05555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 34= , Tf =3D 5170MHz (29) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 36= , Tf =3D 5180MHz (30) */ - 0x10000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 38= , Tf =3D 5190MHz (31) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 40= , Tf =3D 5200MHz (32) */ - 0x1AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 42= , Tf =3D 5210MHz (33) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 44= , Tf =3D 5220MHz (34) */ - 0x05555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 46= , Tf =3D 5230MHz (35) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 48= , Tf =3D 5240MHz (36) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 52= , Tf =3D 5260MHz (37) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 56= , Tf =3D 5280MHz (38) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 60= , Tf =3D 5300MHz (39) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 64= , Tf =3D 5320MHz (40) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 100= , Tf =3D 5500MHz (41) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 104= , Tf =3D 5520MHz (42) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 108= , Tf =3D 5540MHz (43) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 112= , Tf =3D 5560MHz (44) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 116= , Tf =3D 5580MHz (45) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 120= , Tf =3D 5600MHz (46) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 124= , Tf =3D 5620MHz (47) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 128= , Tf =3D 5640MHz (48) */ - 0x0AAAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 132= , Tf =3D 5660MHz (49) */ - 0x15555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 136= , Tf =3D 5680MHz (50) */ - 0x00000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 140= , Tf =3D 5700MHz (51) */ - 0x18000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 149= , Tf =3D 5745MHz (52) */ - 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 153= , Tf =3D 5765MHz (53) */ - 0x0D555100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 157= , Tf =3D 5785MHz (54) */ - 0x18000100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 161= , Tf =3D 5805MHz (55) */ - 0x02AAA100 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel =3D 165= , Tf =3D 5825MHz (56) */ -}; - -static const unsigned long al7230_channel_table2[CB_MAX_CHANNEL] =3D { - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 1,= Tf =3D 2412MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 2,= Tf =3D 2417MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 3,= Tf =3D 2422MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 4,= Tf =3D 2427MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 5,= Tf =3D 2432MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 6,= Tf =3D 2437MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7,= Tf =3D 2442MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8,= Tf =3D 2447MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9,= Tf =3D 2452MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 10,= Tf =3D 2457MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11,= Tf =3D 2462MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12,= Tf =3D 2467MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 13,= Tf =3D 2472MHz */ - 0x7FD78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 14,= Tf =3D 2484MHz */ - - /* 4.9G =3D> Ch 183, 184, 185, 187, 188, 189, 192, 196 (Value:15 ~ 22) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 183= , Tf =3D 4915MHz (15) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 184= , Tf =3D 4920MHz (16) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 185= , Tf =3D 4925MHz (17) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 187= , Tf =3D 4935MHz (18) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 188= , Tf =3D 4940MHz (19) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 189= , Tf =3D 4945MHz (20) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 192= , Tf =3D 4960MHz (21) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 196= , Tf =3D 4980MHz (22) */ - - /* 5G =3D> Ch 7, 8, 9, 11, 12, 16, 34, 36, 38, 40, 42, 44, 46, 48, 52, 56= , 60, 64, - * 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, = 161, 165 (Value 23 ~ 56) - */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 7= , Tf =3D 5035MHz (23) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 8= , Tf =3D 5040MHz (24) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 9= , Tf =3D 5045MHz (25) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 11= , Tf =3D 5055MHz (26) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 12= , Tf =3D 5060MHz (27) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 16= , Tf =3D 5080MHz (28) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 34= , Tf =3D 5170MHz (29) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 36= , Tf =3D 5180MHz (30) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 38= , Tf =3D 5190MHz (31) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 40= , Tf =3D 5200MHz (32) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 42= , Tf =3D 5210MHz (33) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 44= , Tf =3D 5220MHz (34) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 46= , Tf =3D 5230MHz (35) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 48= , Tf =3D 5240MHz (36) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 52= , Tf =3D 5260MHz (37) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 56= , Tf =3D 5280MHz (38) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 60= , Tf =3D 5300MHz (39) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 64= , Tf =3D 5320MHz (40) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 100= , Tf =3D 5500MHz (41) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 104= , Tf =3D 5520MHz (42) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 108= , Tf =3D 5540MHz (43) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 112= , Tf =3D 5560MHz (44) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 116= , Tf =3D 5580MHz (45) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 120= , Tf =3D 5600MHz (46) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 124= , Tf =3D 5620MHz (47) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 128= , Tf =3D 5640MHz (48) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 132= , Tf =3D 5660MHz (49) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 136= , Tf =3D 5680MHz (50) */ - 0x67D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 140= , Tf =3D 5700MHz (51) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 149= , Tf =3D 5745MHz (52) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 153= , Tf =3D 5765MHz (53) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 157= , Tf =3D 5785MHz (54) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW, /* channel =3D 161= , Tf =3D 5805MHz (55) */ - 0x77D78400 + (BY_AL7230_REG_LEN << 3) + IFREGCTL_REGW /* channel =3D 165= , Tf =3D 5825MHz (56) */ -}; - -/* - * Description: AIROHA IFRF chip init function - * - * Parameters: - * In: - * iobase - I/O base address - * Out: - * none - * - * Return Value: true if succeeded; false if failed. - * - */ -static bool s_bAL7230Init(struct vnt_private *priv) -{ - void __iomem *iobase =3D priv->port_offset; - int ii; - bool ret; - - ret =3D true; - - /* 3-wire control for normal mode */ - VNSvOutPortB(iobase + MAC_REG_SOFTPWRCTL, 0); - - MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI | - SOFTPWRCTL_TXPEINV)); - bb_power_save_mode_off(priv); /* RobertYu:20050106, have DC value for Cal= ibration */ - - for (ii =3D 0; ii < CB_AL7230_INIT_SEQ; ii++) - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[ii]); - - /* PLL On */ - MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); - - /* Calibration */ - MACvTimer0MicroSDelay(priv, 150);/* 150us */ - /* TXDCOC:active, RCK:disable */ - ret &=3D IFRFbWriteEmbedded(priv, (0x9ABA8F00 + (BY_AL7230_REG_LEN << 3) = + IFREGCTL_REGW)); - MACvTimer0MicroSDelay(priv, 30);/* 30us */ - /* TXDCOC:disable, RCK:active */ - ret &=3D IFRFbWriteEmbedded(priv, (0x3ABA8F00 + (BY_AL7230_REG_LEN << 3) = + IFREGCTL_REGW)); - MACvTimer0MicroSDelay(priv, 30);/* 30us */ - /* TXDCOC:disable, RCK:disable */ - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[CB_AL7230_INIT_SEQ - = 1]); - - MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 | - SOFTPWRCTL_SWPE2 | - SOFTPWRCTL_SWPECTI | - SOFTPWRCTL_TXPEINV)); - - bb_power_save_mode_on(priv); /* RobertYu:20050106 */ - - /* PE1: TX_ON, PE2: RX_ON, PE3: PLLON */ - /* 3-wire control for power saving mode */ - VNSvOutPortB(iobase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); /* 11= 00 0000 */ - - return ret; -} - -/* Need to Pull PLLON low when writing channel registers through - * 3-wire interface - */ -static bool s_bAL7230SelectChannel(struct vnt_private *priv, unsigned char= byChannel) -{ - void __iomem *iobase =3D priv->port_offset; - bool ret; - - ret =3D true; - - /* PLLON Off */ - MACvWordRegBitsOff(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); - - ret &=3D IFRFbWriteEmbedded(priv, al7230_channel_table0[byChannel - 1]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_channel_table1[byChannel - 1]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_channel_table2[byChannel - 1]); - - /* PLLOn On */ - MACvWordRegBitsOn(iobase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); - - /* Set Channel[7] =3D 0 to tell H/W channel is changing now. */ - VNSvOutPortB(iobase + MAC_REG_CHANNEL, (byChannel & 0x7F)); - MACvTimer0MicroSDelay(priv, SWITCH_CHANNEL_DELAY_AL7230); - /* Set Channel[7] =3D 1 to tell H/W channel change is done. */ - VNSvOutPortB(iobase + MAC_REG_CHANNEL, (byChannel | 0x80)); - - return ret; -} - /* * Description: Write to IF/RF, by embedded programming * @@ -612,10 +285,6 @@ bool RFbInit(struct vnt_private *priv) priv->max_pwr_level =3D AL2230_PWR_IDX_LEN; ret =3D RFbAL2230Init(priv); break; - case RF_AIROHA7230: - priv->max_pwr_level =3D AL7230_PWR_IDX_LEN; - ret =3D s_bAL7230Init(priv); - break; case RF_NOTHING: ret =3D true; break; @@ -650,10 +319,6 @@ bool RFbSelectChannel(struct vnt_private *priv, unsign= ed char byRFType, ret =3D RFbAL2230SelectChannel(priv, byChannel); break; /*{{ RobertYu: 20050104 */ - case RF_AIROHA7230: - ret =3D s_bAL7230SelectChannel(priv, byChannel); - break; - /*}} RobertYu */ case RF_NOTHING: ret =3D true; break; @@ -684,7 +349,6 @@ bool rf_write_wake_prog_syn(struct vnt_private *priv, u= nsigned char rf_type, unsigned char init_count =3D 0; unsigned char sleep_count =3D 0; unsigned short idx =3D MISCFIFO_SYNDATA_IDX; - const unsigned long *init_table; =20 VNSvOutPortW(iobase + MAC_REG_MISCFFNDEX, 0); switch (rf_type) { @@ -706,20 +370,6 @@ bool rf_write_wake_prog_syn(struct vnt_private *priv, = unsigned char rf_type, break; =20 /* Need to check, PLLON need to be low for channel setting */ - case RF_AIROHA7230: - /* Init Reg + Channel Reg (3) */ - init_count =3D CB_AL7230_INIT_SEQ + 3; - sleep_count =3D 0; - - init_table =3D (channel <=3D CB_MAX_CHANNEL_24G) ? - al7230_init_table : al7230_init_table_a_mode; - for (i =3D 0; i < CB_AL7230_INIT_SEQ; i++) - MACvSetMISCFifo(priv, idx++, init_table[i]); - - MACvSetMISCFifo(priv, idx++, al7230_channel_table0[channel - 1]); - MACvSetMISCFifo(priv, idx++, al7230_channel_table1[channel - 1]); - MACvSetMISCFifo(priv, idx++, al7230_channel_table2[channel - 1]); - break; =20 case RF_NOTHING: return true; @@ -773,10 +423,7 @@ bool RFbSetPower(struct vnt_private *priv, unsigned in= t rate, u16 uCH) case RATE_12M: case RATE_18M: byPwr =3D priv->abyOFDMPwrTbl[uCH]; - if (priv->byRFType =3D=3D RF_UW2452) - byDec =3D byPwr + 14; - else - byDec =3D byPwr + 10; + byDec =3D byPwr + 10; =20 if (byDec >=3D priv->max_pwr_level) byDec =3D priv->max_pwr_level - 1; @@ -819,7 +466,6 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned = char byPwr, unsigned int rate) { bool ret =3D true; - unsigned long dwMax7230Pwr =3D 0; =20 if (byPwr >=3D priv->max_pwr_level) return false; @@ -846,16 +492,6 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned= char byPwr, =20 break; =20 - case RF_AIROHA7230: - /* 0x080F1B00 for 3 wire control TxGain(D10) - * and 0x31 as TX Gain value - */ - dwMax7230Pwr =3D 0x080C0B00 | ((byPwr) << 12) | - (BY_AL7230_REG_LEN << 3) | IFREGCTL_REGW; - - ret &=3D IFRFbWriteEmbedded(priv, dwMax7230Pwr); - break; - default: break; } @@ -888,7 +524,6 @@ RFvRSSITodBm(struct vnt_private *priv, unsigned char by= CurrRSSI, long *pldBm) switch (priv->byRFType) { case RF_AIROHA: case RF_AL2230S: - case RF_AIROHA7230: a =3D abyAIROHARF[byIdx]; break; default: @@ -898,40 +533,3 @@ RFvRSSITodBm(struct vnt_private *priv, unsigned char b= yCurrRSSI, long *pldBm) *pldBm =3D -1 * (a + b * 2); } =20 -/* Post processing for the 11b/g and 11a. - * for save time on changing Reg2,3,5,7,10,12,15 - */ -bool RFbAL7230SelectChannelPostProcess(struct vnt_private *priv, - u16 byOldChannel, - u16 byNewChannel) -{ - bool ret; - - ret =3D true; - - /* if change between 11 b/g and 11a need to update the following - * register - * Channel Index 1~14 - */ - if ((byOldChannel <=3D CB_MAX_CHANNEL_24G) && (byNewChannel > CB_MAX_CHAN= NEL_24G)) { - /* Change from 2.4G to 5G [Reg] */ - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[2]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[3]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[5]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[7]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[10]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[12]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table_a_mode[15]); - } else if ((byOldChannel > CB_MAX_CHANNEL_24G) && (byNewChannel <=3D CB_M= AX_CHANNEL_24G)) { - /* Change from 5G to 2.4G [Reg] */ - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[2]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[3]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[5]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[7]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[10]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[12]); - ret &=3D IFRFbWriteEmbedded(priv, al7230_init_table[15]); - } - - return ret; -} --=20 2.25.1 From nobody Wed Jun 24 15:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B2EEC433EF for ; Sat, 5 Mar 2022 21:32:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232665AbiCEVdW (ORCPT ); Sat, 5 Mar 2022 16:33:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232659AbiCEVdP (ORCPT ); Sat, 5 Mar 2022 16:33:15 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F29D55AED7 for ; Sat, 5 Mar 2022 13:32:23 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id q14so2063027wrc.4 for ; Sat, 05 Mar 2022 13:32:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=9IH5+QpuYr8xx7VseEHwb3B5cUXtUdnzvWAtsWC3Lqo=; b=jjohIZhvIlSjJYT5OU4GmDH7lyi5I14Gd5Leo4WCzgkFaN0zY3hfFz1iGgWe0x3rNp N7cu2YM2M4kmsLsQ76HEflqobBdlIucQ9Bi4Rt1ro46WtEeRg8+IgqKOpnZ5N8vz0BTg 6UNWOQyJ3Sw2IkdhYB+o7HMqEYRVx4/BfexsE3fH86a6E3m7iacquC3FEW2EGe4zo2Gc VmE1aR17MIp4vunFL9JG7x3YMTs+sfN2SI956OsFcO/yHAjB0Qmyma4lFsnZhw2IfDOU oiWLfz8ROFsWBV22K1RGvFEC04OG7D3/K7Ghqvfg3U3i/O72n8Po/7C5VAB2jOhlWm4W QRbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=9IH5+QpuYr8xx7VseEHwb3B5cUXtUdnzvWAtsWC3Lqo=; b=ZMSlpXoF9tZfvvteUm1aQB2rugGirqUZGnzFijAAQScaDJ2jyTXJoEOdDbIEFkEP9M IrAtaZ5CkkrJ/nhSTcrsgQbc3470zngSlRmavpz46Kustxrr8hXPoLQ5nPENzMRgC/vw Virtdd/RYRj+0pAoyRWRWiG2YTPXSZ9jMGpiP4qVB2WurpbqlijPZ/OIa+FWEoiV56tA eAZWtjQE66J1GMQy51U7VAdENf0s0g+E70zee/5tNEVzJcukyftjqreZZSyILIXGV2UO 0yey8DeUjAG6gabWdxfMSAsmuwvszcpvmIcDJhBPQRkFIFVZl9Ykm55RUuAjAQw63EHx WN+A== X-Gm-Message-State: AOAM530Lo47m2x2KoKoPIPZ2hH9LnpsoXfSiqn34a48VwtD3mOiDFzzg 5yqSwEIkIAFb8VAildyXQgE= X-Google-Smtp-Source: ABdhPJzV5HWPYwTYCrqKU/3cUb4+hY5cPjIC2BdFXXdl50Tp9vTG7vFSAKADoYcLSC7M8LEa3kMvjQ== X-Received: by 2002:a5d:4609:0:b0:1f1:de8a:af07 with SMTP id t9-20020a5d4609000000b001f1de8aaf07mr3180549wrq.549.1646515942625; Sat, 05 Mar 2022 13:32:22 -0800 (PST) Received: from matrix-ESPRIMO-P710 (p57935aa6.dip0.t-ipconnect.de. [87.147.90.166]) by smtp.gmail.com with ESMTPSA id c12-20020a05600c0a4c00b00381141f4967sm11472031wmq.35.2022.03.05.13.32.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Mar 2022 13:32:22 -0800 (PST) Date: Sat, 5 Mar 2022 22:32:20 +0100 From: Philipp Hortmann To: Forest Bond , Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] staging: vt6655: Remove unused byRFType in card.c Message-ID: <5554b243ae285e3274d9968575aadd1a79806b01.1646512837.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove byRFType that support 5GHz band. Signed-off-by: Philipp Hortmann --- drivers/staging/vt6655/card.c | 56 +---------------------------------- 1 file changed, 1 insertion(+), 55 deletions(-) diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index ee2d145778ed..1110366fc415 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c @@ -183,32 +183,11 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u= 8 bb_type) unsigned char bySlot =3D 0; unsigned char bySIFS =3D 0; unsigned char byDIFS =3D 0; - unsigned char data; int i; =20 /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */ if (bb_type =3D=3D BB_TYPE_11A) { - if (priv->byRFType =3D=3D RF_AIROHA7230) { - /* AL7230 use single PAPE and connect to PAPE_2.4G */ - MACvSetBBType(priv->port_offset, BB_TYPE_11G); - priv->abyBBVGA[0] =3D 0x20; - priv->abyBBVGA[2] =3D 0x10; - priv->abyBBVGA[3] =3D 0x10; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x1C) - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - - } else if (priv->byRFType =3D=3D RF_UW2452) { - MACvSetBBType(priv->port_offset, BB_TYPE_11A); - priv->abyBBVGA[0] =3D 0x18; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x14) { - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - bb_write_embedded(priv, 0xE1, 0x57); - } - } else { - MACvSetBBType(priv->port_offset, BB_TYPE_11A); - } + MACvSetBBType(priv->port_offset, BB_TYPE_11A); bb_write_embedded(priv, 0x88, 0x03); bySlot =3D C_SLOT_SHORT; bySIFS =3D C_SIFS_A; @@ -216,22 +195,6 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8= bb_type) byCWMaxMin =3D 0xA4; } else if (bb_type =3D=3D BB_TYPE_11B) { MACvSetBBType(priv->port_offset, BB_TYPE_11B); - if (priv->byRFType =3D=3D RF_AIROHA7230) { - priv->abyBBVGA[0] =3D 0x1C; - priv->abyBBVGA[2] =3D 0x00; - priv->abyBBVGA[3] =3D 0x00; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x20) - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - - } else if (priv->byRFType =3D=3D RF_UW2452) { - priv->abyBBVGA[0] =3D 0x14; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x18) { - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - bb_write_embedded(priv, 0xE1, 0xD3); - } - } bb_write_embedded(priv, 0x88, 0x02); bySlot =3D C_SLOT_LONG; bySIFS =3D C_SIFS_BG; @@ -239,22 +202,6 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8= bb_type) byCWMaxMin =3D 0xA5; } else { /* PK_TYPE_11GA & PK_TYPE_11GB */ MACvSetBBType(priv->port_offset, BB_TYPE_11G); - if (priv->byRFType =3D=3D RF_AIROHA7230) { - priv->abyBBVGA[0] =3D 0x1C; - priv->abyBBVGA[2] =3D 0x00; - priv->abyBBVGA[3] =3D 0x00; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x20) - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - - } else if (priv->byRFType =3D=3D RF_UW2452) { - priv->abyBBVGA[0] =3D 0x14; - bb_read_embedded(priv, 0xE7, &data); - if (data =3D=3D 0x18) { - bb_write_embedded(priv, 0xE7, priv->abyBBVGA[0]); - bb_write_embedded(priv, 0xE1, 0xD3); - } - } bb_write_embedded(priv, 0x88, 0x08); bySIFS =3D C_SIFS_BG; =20 @@ -417,7 +364,6 @@ void CARDbRadioPowerOff(struct vnt_private *priv) =20 case RF_AIROHA: case RF_AL2230S: - case RF_AIROHA7230: MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE2); MACvWordRegBitsOff(priv->port_offset, MAC_REG_SOFTPWRCTL, --=20 2.25.1