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Thu, 18 Dec 2025 12:27:22 -0800 From: Nicolin Chen To: , , CC: , , , , , , , Subject: [PATCH v1 8/9] iommu/arm-smmu-v3: Remove ASID/VMID from arm_smmu_domain Date: Thu, 18 Dec 2025 12:26:54 -0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C381:EE_|MW4PR12MB7119:EE_ X-MS-Office365-Filtering-Correlation-Id: e7f08ce6-cb38-417c-d229-08de3e73e283 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?4KoaL8DhnUgMKXxfMY+ctRsV6RnxTIeFYItUMlWIzoyLyEvqykkdsfymfHfd?= =?us-ascii?Q?whZ6LXxwmIWoLbEkcrgkvKcOWIJ1Rz9t+XxmDF6FsjFxwdG3oIpHJR+vayu1?= =?us-ascii?Q?nEkMX6psM/6EToW1+X6v4TZDWtxnPgu4PxP/aYarZpTl1hvVp7nIhmhsA3Ia?= =?us-ascii?Q?qK6t/00Y6BmOlv4hfvS7axcd2AP6HYMiS4l6Qf+fKod2f1+OzGA5/oiEysfo?= =?us-ascii?Q?uVtOgPvjSkO/PRsVw9QRA/BOZodXgyZ7Z7R/vtjRo3fx6fkt79eQyac6S7pn?= =?us-ascii?Q?FcpOkhjgDJ6EXp1r2xAdYKS93ZCmmaAsQLrOErh0tnTwGHu2Q+VFNHxW8jEK?= =?us-ascii?Q?05CI+NHI+/kRR1a1IenpOD3zhgx2tttqOVNrVlR2mz5SGTAkekfHicR4Z3zn?= =?us-ascii?Q?s/DhXsAtnds6ZHPxbltywhAPD8fo66BY5YVXD5z410Y8jGla/wBCYk1ToslP?= =?us-ascii?Q?NYZ1zVrRcI/EvTB67k5+1THqXEzTkYm7qcMF15IXoVQ4XMv8QlUJ/W+cb77L?= =?us-ascii?Q?pfkgN001SoU7eCo8++3HQdnij8zeKjrdGUG+KZJiYHlO3lW2Jw9l2bjqSUVd?= =?us-ascii?Q?5d2hfs8tc8OzlOAE40bp15lZ5E/9aXsWIXnqLYZyQbAFpLHRbrD1YMKMXwil?= =?us-ascii?Q?L8r5/g/gzprp6wwyhH+IpCY69OvQMgj0mPT1U2Vc79G5jZz8833jErwPqRqw?= =?us-ascii?Q?qdpNLAfypZYBSjjluJ0JKQC4ZXYl/jusvNCLEosZ8si9kLENXNjAqTrpfah5?= =?us-ascii?Q?Jx9Ih0AxH1a+W7k0ZIlUxHk1+zlsjk6semL4Db6y8ffsR+QSBjoJ5uXeczQ9?= =?us-ascii?Q?qK7JFV/EQzTu9fkWqZwmxt68gPvdX00DroXavNXlPBWfQyNEvIe/qbCxB9bO?= =?us-ascii?Q?5IvwiQzCrCIq/Jbx5L9XY1EZVYvF1grjjfpAfgaS2BnMa2ZjvDcRKcbWwYUg?= =?us-ascii?Q?PnlD5f7OoxZcGojtSit36tBLS6wh57k6b4lSLLG9UziBLJU0TJ5UExTQdJHY?= =?us-ascii?Q?p1i5y/cf1RILb2WqUJpO2Zo5nSdwkDzb06rbNYx3jWuEzYtVnchH3QLgv700?= =?us-ascii?Q?Zw0IdRIKhdoR6boWfd3nO/J/TGOYiTZhQP8uYKsoek6kd7AHqPUlkKXLlpaF?= =?us-ascii?Q?2M8XnwXHL9M/ATfD6H9PndlhjT3tLY4BqaB5gEBodHnxR5qbXrIdIVgh9enn?= =?us-ascii?Q?SzMiyv5w8BaDKtr5DtTCvqOp7YQUDZj8WCR3biUxVZmXu6mqxK5EVFb7VcXB?= =?us-ascii?Q?rYkyYPqkF8UAxecxGNiPtbZWsS6ranrpRb/2LMhpiIVWD/KhN1j11eCXteOp?= =?us-ascii?Q?Me9FMME8InwNnnFxyB0Ko5jzZ95GiELzvMZ/pusi2T0wyFrnODcm4upGCVYr?= =?us-ascii?Q?4ULQco18e57Bod8tv5kmf07EONuEpyxIwz6ZdndiOet+E0RH4qisS422YwUt?= =?us-ascii?Q?GdQZIpS4X7UaiVHnJsgkhx9/JH6XTwxqn5HN+UW8ZhfzeGQk2Vxcg9/rDS0g?= =?us-ascii?Q?Ytly4AchlHfXd9TFEAMzpYRa5eFQUZci7blYOctykKiU1JFI4yhPtVjfA7ft?= =?us-ascii?Q?vG7ZjOVG1J0BcoUtri8=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Dec 2025 20:27:37.4102 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e7f08ce6-cb38-417c-d229-08de3e73e283 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C381.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7119 Content-Type: text/plain; charset="utf-8" Now ASID/VMID are stored in the arm_smmu_master. These are dead code now. Remove all. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 --- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 20 +------ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c | 3 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 58 ------------------- 4 files changed, 1 insertion(+), 88 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index e38d2394e3be..4d7b7eb52dfd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -792,10 +792,6 @@ static inline bool arm_smmu_ssids_in_use(struct arm_sm= mu_ctx_desc_cfg *cd_table) return cd_table->used_ssids; } =20 -struct arm_smmu_s2_cfg { - u16 vmid; -}; - struct arm_smmu_strtab_cfg { union { struct { @@ -974,10 +970,6 @@ struct arm_smmu_domain { atomic_t nr_ats_masters; =20 enum arm_smmu_domain_stage stage; - union { - struct arm_smmu_ctx_desc cd; - struct arm_smmu_s2_cfg s2_cfg; - }; =20 struct iommu_domain domain; =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 0e534f2b72e0..ea5ce3e6514e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -282,14 +282,6 @@ static void arm_smmu_sva_domain_free(struct iommu_doma= in *domain) */ arm_smmu_domain_inv(smmu_domain); =20 - /* - * Notice that the arm_smmu_mm_arch_invalidate_secondary_tlbs op can - * still be called/running at this point. We allow the ASID to be - * reused, and if there is a race then it just suffers harmless - * unnecessary invalidation. - */ - xa_erase(&arm_smmu_asid_xa, smmu_domain->cd.asid); - /* * Actual free is defered to the SRCU callback * arm_smmu_mmu_notifier_free() @@ -308,7 +300,6 @@ struct iommu_domain *arm_smmu_sva_domain_alloc(struct d= evice *dev, struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); struct arm_smmu_device *smmu =3D master->smmu; struct arm_smmu_domain *smmu_domain; - u32 asid; int ret; =20 if (!(master->smmu->features & ARM_SMMU_FEAT_SVA)) @@ -327,22 +318,13 @@ struct iommu_domain *arm_smmu_sva_domain_alloc(struct= device *dev, smmu_domain->domain.pgsize_bitmap =3D PAGE_SIZE; smmu_domain->stage =3D ARM_SMMU_DOMAIN_SVA; smmu_domain->smmu =3D smmu; - - ret =3D xa_alloc(&arm_smmu_asid_xa, &asid, smmu_domain, - XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); - if (ret) - goto err_free; - - smmu_domain->cd.asid =3D asid; smmu_domain->mmu_notifier.ops =3D &arm_smmu_mmu_notifier_ops; ret =3D mmu_notifier_register(&smmu_domain->mmu_notifier, mm); if (ret) - goto err_asid; + goto err_free; =20 return &smmu_domain->domain; =20 -err_asid: - xa_erase(&arm_smmu_asid_xa, smmu_domain->cd.asid); err_free: arm_smmu_domain_free(smmu_domain); return ERR_PTR(ret); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c b/drivers/iom= mu/arm/arm-smmu-v3/arm-smmu-v3-test.c index 5c8cb43f849c..b174ac2dfb4b 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c @@ -458,9 +458,6 @@ static void arm_smmu_test_make_s1_cd(struct kunit *test= , struct arm_smmu_cd *cd, struct io_pgtable io_pgtable =3D {}; struct arm_smmu_domain smmu_domain =3D { .pgtbl_ops =3D &io_pgtable.ops, - .cd =3D { - .asid =3D asid, - }, }; =20 io_pgtable.cfg.arm_lpae_s1_cfg.ttbr =3D 0xdaedbeefdeadbeefULL; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 5052988b0e4e..04e21af9c578 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2812,66 +2812,17 @@ struct arm_smmu_domain *arm_smmu_domain_alloc(void) static void arm_smmu_domain_free_paging(struct iommu_domain *domain) { struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); - struct arm_smmu_device *smmu =3D smmu_domain->smmu; =20 free_io_pgtable_ops(smmu_domain->pgtbl_ops); - - /* Free the ASID or VMID */ - if (smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1) { - /* Prevent SVA from touching the CD while we're freeing it */ - mutex_lock(&arm_smmu_asid_lock); - xa_erase(&arm_smmu_asid_xa, smmu_domain->cd.asid); - mutex_unlock(&arm_smmu_asid_lock); - } else { - struct arm_smmu_s2_cfg *cfg =3D &smmu_domain->s2_cfg; - if (cfg->vmid) - ida_free(&smmu->vmid_map, cfg->vmid); - } - arm_smmu_domain_free(smmu_domain); } =20 -static int arm_smmu_domain_finalise_s1(struct arm_smmu_device *smmu, - struct arm_smmu_domain *smmu_domain) -{ - int ret; - u32 asid =3D 0; - struct arm_smmu_ctx_desc *cd =3D &smmu_domain->cd; - - /* Prevent SVA from modifying the ASID until it is written to the CD */ - mutex_lock(&arm_smmu_asid_lock); - ret =3D xa_alloc(&arm_smmu_asid_xa, &asid, smmu_domain, - XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); - cd->asid =3D (u16)asid; - mutex_unlock(&arm_smmu_asid_lock); - return ret; -} - -static int arm_smmu_domain_finalise_s2(struct arm_smmu_device *smmu, - struct arm_smmu_domain *smmu_domain) -{ - int vmid; - struct arm_smmu_s2_cfg *cfg =3D &smmu_domain->s2_cfg; - - /* Reserve VMID 0 for stage-2 bypass STEs */ - vmid =3D ida_alloc_range(&smmu->vmid_map, 1, (1 << smmu->vmid_bits) - 1, - GFP_KERNEL); - if (vmid < 0) - return vmid; - - cfg->vmid =3D (u16)vmid; - return 0; -} - static int arm_smmu_domain_finalise(struct arm_smmu_domain *smmu_domain, struct arm_smmu_device *smmu, u32 flags) { - int ret; enum io_pgtable_fmt fmt; struct io_pgtable_cfg pgtbl_cfg; struct io_pgtable_ops *pgtbl_ops; - int (*finalise_stage_fn)(struct arm_smmu_device *smmu, - struct arm_smmu_domain *smmu_domain); bool enable_dirty =3D flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING; =20 pgtbl_cfg =3D (struct io_pgtable_cfg) { @@ -2891,7 +2842,6 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, if (enable_dirty) pgtbl_cfg.quirks |=3D IO_PGTABLE_QUIRK_ARM_HD; fmt =3D ARM_64_LPAE_S1; - finalise_stage_fn =3D arm_smmu_domain_finalise_s1; break; } case ARM_SMMU_DOMAIN_S2: @@ -2900,7 +2850,6 @@ static int arm_smmu_domain_finalise(struct arm_smmu_d= omain *smmu_domain, pgtbl_cfg.ias =3D smmu->ias; pgtbl_cfg.oas =3D smmu->oas; fmt =3D ARM_64_LPAE_S2; - finalise_stage_fn =3D arm_smmu_domain_finalise_s2; if ((smmu->features & ARM_SMMU_FEAT_S2FWB) && (flags & IOMMU_HWPT_ALLOC_NEST_PARENT)) pgtbl_cfg.quirks |=3D IO_PGTABLE_QUIRK_ARM_S2FWB; @@ -2918,13 +2867,6 @@ static int arm_smmu_domain_finalise(struct arm_smmu_= domain *smmu_domain, smmu_domain->domain.geometry.force_aperture =3D true; if (enable_dirty && smmu_domain->stage =3D=3D ARM_SMMU_DOMAIN_S1) smmu_domain->domain.dirty_ops =3D &arm_smmu_dirty_ops; - - ret =3D finalise_stage_fn(smmu, smmu_domain); - if (ret < 0) { - free_io_pgtable_ops(pgtbl_ops); - return ret; - } - smmu_domain->pgtbl_ops =3D pgtbl_ops; smmu_domain->smmu =3D smmu; return 0; --=20 2.43.0