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Thu, 19 Mar 2026 12:52:06 -0700 From: Nicolin Chen To: , CC: , , , , , , , , , Subject: [PATCH v4 03/10] iommu/arm-smmu-v3: Store IOTLB cache tags in struct arm_smmu_attach_state Date: Thu, 19 Mar 2026 12:51:49 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A100:EE_|MN0PR12MB6248:EE_ X-MS-Office365-Filtering-Correlation-Id: 9b299986-41fb-435d-fca5-08de85f10da4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|36860700016|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: gttujjYMPgj/qrV+a7EXUGJLp2qqp1IES/686lpwIg6fAC7zoYNrYLJq4EAAhTjG45Wu9+wQaNqVAKkmZGaZPif9wqXt5QdurE5OS2RCS2EQIWz9lroax+9UrfWyjf6Ivh05ci9bsM8Ng47IFuYEiHF1weA3N5wKoiDyM6WZtJWKOkPJWcCOUrB6UMpbzPI9FVjYFEqhxEA3Ks3Ihkgb57PT9Tt9hhlJ8W4uTb2lRumJtFLooHVsf7ItgjYDTLA5EZa2Ml/2kHnNeCxjVv63oqWewOo8pMH9mgSVIn3PoEGW+Kyp0QCHdd5/nCVohOgMZFiQrUU3JlWYmMw4oP/Al1wCDXvQ5cvjzI8pYwwia0AW4QYqrPI9e8z4CaQxYeIfACadbCTh6ihW+NuxhCRYp+mO5z1Da3hDTg0TxUYHv9B8GKhagsHyoriM/W42baFs1cWrEZlBPZs+BYrpZhI7YaBgj7mfWexafzJMDi+pb5xmabvXEhNemJJGb57+85eOwgFdi2WGEB6hPHlyFfgSXSuGGpGE/WDVDJzAfSadBz6btAuB+z+kmpS4Q0wZAlFKCXQspnOEEcNFwfLG5F/qEPTeo7OVF0JYDW89PjIxOJ1q+OeS7YZQ1Q7Xv/Cem9Hb8lUv3BQBYr0bpEUcARlhWHUBNSMMXnG4nnINzv2YrVc401MO7fy5JiLfAwnVHt3n+tsIwYXRYH5+sn9VAY2QbXqywkQ6nJm1FLlWhMhPJCTkodB0Q7sxioLIXJgjzc9TAmb5VUhJbcY7oYDjTMAhLw== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(7416014)(376014)(36860700016)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; 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charset="utf-8" So far, an IOTLB tag (ASID or VMID) has been stored in the arm_smmu_domain structure. Its lifecycle is aligned with the smmu_domain. However, an IOTLB tag (ASID or VMID) will not be used: 1) Before being installed to CD or STE during a device attachment 2) After being removed from CD or STE during a device detachment Both (1) and (2) exactly align with the lifecycle of smmu_domain->invs. The bigger problem is that storing the IOTLB tag in struct arm_smmu_domain makes it difficult to share across SMMU instances, a common use case for a nesting parent domain. Introduce arm_smmu_find_iotlb_tag() helper to find an existing IOTLB cache tag in the smmu_domain->invs array. Introduce arm_smmu_alloc_iotlb_tag() helper provisionally copying an IOTLB tag from the smmu_domain (cd->asid and s2_cfg), which will be updated later to actually allocate a new IOTLB cache tag from the ASID or VMID bitmap. (Note only the new_smmu_domain pathway is allowed to allocate a new tag.) The returned tag will be stored in struct arm_smmu_attach_state, which will be forwarded to arm_smmu_master_build_invs() and eventually set to a CD or STE accordingly. Suggested-by: Jason Gunthorpe Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 11 +++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 84 +++++++++++++++++++++ 2 files changed, 95 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index a31f9f7f39d3a..7f86be3144805 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -674,6 +674,11 @@ struct arm_smmu_inv { int users; /* users=3D0 to mark as a trash to be purged */ }; =20 +static inline void arm_smmu_inv_assert_iotlb_tag(struct arm_smmu_inv *inv) +{ + WARN_ON(inv->type !=3D INV_TYPE_S1_ASID && inv->type !=3D INV_TYPE_S2_VMI= D); +} + static inline bool arm_smmu_inv_is_ats(const struct arm_smmu_inv *inv) { return inv->type =3D=3D INV_TYPE_ATS || inv->type =3D=3D INV_TYPE_ATS_FUL= L; @@ -1117,11 +1122,13 @@ static inline bool arm_smmu_master_canwbs(struct ar= m_smmu_master *master) * @new_invs: for new domain, this is the new invs array to update domain-= >invs; * for old domain, this is the master->build_invs to pass in as= the * to_unref argument to an arm_smmu_invs_unref() call + * @tag: IOTLB cache tag (INV_TYPE_S1_ASID or INV_TYPE_S2_VMID) */ struct arm_smmu_inv_state { struct arm_smmu_invs __rcu **invs_ptr; struct arm_smmu_invs *old_invs; struct arm_smmu_invs *new_invs; + struct arm_smmu_inv tag; }; =20 struct arm_smmu_attach_state { @@ -1138,6 +1145,10 @@ struct arm_smmu_attach_state { bool ats_enabled; }; =20 +int arm_smmu_find_iotlb_tag(struct iommu_domain *domain, + struct arm_smmu_device *smmu, + struct arm_smmu_inv *tag); + int arm_smmu_attach_prepare(struct arm_smmu_attach_state *state, struct iommu_domain *new_domain); void arm_smmu_attach_commit(struct arm_smmu_attach_state *state); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 78d45952db7da..29b1310786244 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3205,6 +3205,77 @@ static void arm_smmu_disable_iopf(struct arm_smmu_ma= ster *master, iopf_queue_remove_device(master->smmu->evtq.iopf, master->dev); } =20 +static int __arm_smmu_domain_find_iotlb_tag(struct arm_smmu_domain *smmu_d= omain, + struct arm_smmu_inv *tag) +{ + struct arm_smmu_invs *invs =3D rcu_dereference_protected( + smmu_domain->invs, lockdep_is_held(&arm_smmu_asid_lock)); + size_t i; + + arm_smmu_inv_assert_iotlb_tag(tag); + + for (i =3D 0; i !=3D invs->num_invs; i++) { + if (invs->inv[i].type =3D=3D tag->type && + invs->inv[i].smmu =3D=3D tag->smmu && + READ_ONCE(invs->inv[i].users)) { + *tag =3D invs->inv[i]; + return 0; + } + } + + return -ENOENT; +} + +/* Find an existing IOTLB cache tag in smmu_domain->invs (users counter != =3D 0) */ +int arm_smmu_find_iotlb_tag(struct iommu_domain *domain, + struct arm_smmu_device *smmu, + struct arm_smmu_inv *tag) +{ + struct arm_smmu_domain *smmu_domain =3D to_smmu_domain_devices(domain); + + if (WARN_ON(!smmu_domain)) + return -EINVAL; + + /* Decide the type of the iotlb cache tag */ + switch (smmu_domain->stage) { + case ARM_SMMU_DOMAIN_SVA: + case ARM_SMMU_DOMAIN_S1: + tag->type =3D INV_TYPE_S1_ASID; + break; + case ARM_SMMU_DOMAIN_S2: + tag->type =3D INV_TYPE_S2_VMID; + break; + default: + return -EINVAL; + } + + tag->smmu =3D smmu; + + return __arm_smmu_domain_find_iotlb_tag(smmu_domain, tag); +} + +/* Allocate a new IOTLB cache tag (users counter =3D=3D 0) */ +static int arm_smmu_alloc_iotlb_tag(struct iommu_domain *domain, + struct arm_smmu_device *smmu, + struct arm_smmu_inv *tag) +{ + struct arm_smmu_domain *smmu_domain =3D to_smmu_domain_devices(domain); + int ret; + + /* Only allocate if there is no IOTLB cache tag to re-use */ + ret =3D arm_smmu_find_iotlb_tag(domain, smmu, tag); + if (!ret || ret !=3D -ENOENT) + return ret; + + /* FIXME replace with an actual allocation from the bitmap */ + if (tag->type =3D=3D INV_TYPE_S1_ASID) + tag->id =3D smmu_domain->cd.asid; + else + tag->id =3D smmu_domain->s2_cfg.vmid; + + return 0; +} + static struct arm_smmu_inv * arm_smmu_master_build_inv(struct arm_smmu_master *master, enum arm_smmu_inv_type type, u32 id, ioasid_t ssid, @@ -3370,7 +3441,9 @@ static int arm_smmu_attach_prepare_invs(struct arm_sm= mu_attach_state *state, struct arm_smmu_domain *new_smmu_domain =3D to_smmu_domain_devices(new_domain); struct arm_smmu_master *master =3D state->master; + struct arm_smmu_device *smmu =3D master->smmu; ioasid_t ssid =3D state->ssid; + int ret; =20 /* * At this point a NULL domain indicates the domain doesn't use the @@ -3384,6 +3457,11 @@ static int arm_smmu_attach_prepare_invs(struct arm_s= mmu_attach_state *state, invst->old_invs =3D rcu_dereference_protected( new_smmu_domain->invs, lockdep_is_held(&arm_smmu_asid_lock)); + + ret =3D arm_smmu_alloc_iotlb_tag(new_domain, smmu, &invst->tag); + if (ret) + return ret; + build_invs =3D arm_smmu_master_build_invs( master, state->ats_enabled, ssid, new_smmu_domain); if (!build_invs) @@ -3406,6 +3484,12 @@ static int arm_smmu_attach_prepare_invs(struct arm_s= mmu_attach_state *state, invst->old_invs =3D rcu_dereference_protected( old_smmu_domain->invs, lockdep_is_held(&arm_smmu_asid_lock)); + + ret =3D arm_smmu_find_iotlb_tag(state->old_domain, smmu, + &invst->tag); + if (WARN_ON(ret)) + return ret; + /* For old_smmu_domain, new_invs points to master->build_invs */ invst->new_invs =3D arm_smmu_master_build_invs( master, master->ats_enabled, ssid, old_smmu_domain); --=20 2.43.0