From nobody Thu Mar 5 09:49:16 2026 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98EB13101C8 for ; Mon, 23 Feb 2026 16:26:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771864000; cv=none; b=F2VC14yfryqWtg+zDOjwOgPS8ruNtQeOy0VB2KK5loISFl0iafDYjkFKU5/ZadyVipe8x0FdNd28abub6F6AIdzxp8IWqf3dRqQ5akkBJESchkZC1nSzDixFz7YSVmFfRNy1v9or58u+6u0TuSrmQs/cXZ0XJIuPuyDSxnJNK+o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771864000; c=relaxed/simple; bh=BphH2H7DpRFTMwJhORTnWV19TZNqCP048ZgLz5ogpKE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VERDrwU3UmW+mgOJ9LnnOoKivucD8VsTvl9azZLer6ZjBVG7CuGrY+caX70MOhlPb8kib+FYX7iscx8/xjLYdOWPBjqEky0tZ1McXx2TcZDTdYXIZV47vK9d74F0muLUVCAjXF79P+c9za2VU6deTodre2S54kzSSHD17hkSS94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=hYkUKWl+; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hYkUKWl+" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48378136adcso27372055e9.1 for ; Mon, 23 Feb 2026 08:26:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1771863997; x=1772468797; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wgeTGS+8qJEGuJv9Z7ulFAIz5McOanQP0tQrEdPQw4A=; b=hYkUKWl+Wf3Dj8SoLJ3IrmnOV4GoP79J6HHut0RDT0s6AoqKzAdXqeth6Qj5oLECXz +l6cpzjDE0Z+iBZOhq565hh8+DbRu5DOsw96QBQi1Abaf7LWrSWELQQhcbJ2bwULARCk M/W6pqW9165oSLbdOYZT11Jjae9IUg8Tn9SmUN9VJQcZeGPVcedkzB8IpDwGj9f1DzWG Sx5BHArIdebQBYAH3WmaSSgW70Ytqo3FqkYtv667qpMN1upmzqtvTAVNjDJa+mnQ3oGN Z6mEXg+fU3x2LGmQGmGHhxSgtVCu/uR4YCt9zvgv4Fv4p9wQoF3nZ1CvK2JhMQ0SP4XM +QnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771863997; x=1772468797; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=wgeTGS+8qJEGuJv9Z7ulFAIz5McOanQP0tQrEdPQw4A=; b=Q3KJmPbKYnTcVFjEJZIEdfM9jByrRnu6bwT8W/aEYIuvtjPd5fXvLuBN1BQbTG+pdw BPpP9V+5lciabCVq40liv29wE1Sf5pFundzSXNbrJWjyRmDF0ItS1cfPCLR+uw7cukmV BCr986rfgNYVui5EQPscJKCqcdMRiVyDlO8KFpE3NVaHB6wFJrYFCj148Ps9+k6IAY6D P0S0kLwP56+S4gFfzK3Wl1JOiPvEJpdyJ1cTe15ewentFNQw2qCK6gcsXproJR7EJ+Jz g+//Ccqn0P22wwUi8e2QsreqG6t3HVkWtkcVvyG9gkteMu6IB+eNXXqWLvMPZX/eTs5m noyQ== X-Forwarded-Encrypted: i=1; AJvYcCX8BH8OdmAXKOFrDpRTKC7Uv0BJDztaHBv9Td76UOFsna0zhoks3isi4HyKeVqRUiv30Cr9Cjhd8fSe85g=@vger.kernel.org X-Gm-Message-State: AOJu0Yz/vM7M8+4MBIv828MwG8S7IcJRnfuVUPg7u+h+priMadM45E7y zYqmZLSQA+iw4UnmAuN5WnqFA3veREZoaWmAhFJnK8lskb5vq7+2vSiT X-Gm-Gg: AZuq6aIIJ+pX62azSvvUhlyWnFRFctQmtH82bdVRTNXHo4AT6Uls5t/328aIfUU4Oi8 BfA7tLjxOIS/br4oUbsz/7wvXAofpCd6pfZLH6vm5knkbvn0NWXNbqI6zInCo38uUtwjZQ91H4Q z0axB+cQsk63IO8h7tnWBzQoE3ESM/d+kHwrivODuYQj4MHX+ZaGIn/9V80FFEo+0Vxtw1emh+e FXM8MjDc5A4bsjvMgQtOFrAoOevoqady94Not6WBLPFnaeszwcXwLLYir/699sSjCCeX1pHiMqK 4cG4xKZ6xKqoYLqLWHxQmFJpFnhss49OzJxLJQligiRNhGBOgSfGV9tM8NtSRYyvehZrlCay/dn PhknECs0oyOjjdlX4yUBPfads/wJUhHJW4Dm4gX9Tgu3s61ck+/bMHnnAruju68WBc6CL8gGOpB Y4SyjgMvlN+jXbCth/pIw= X-Received: by 2002:a05:600c:4fd3:b0:480:4d38:7abc with SMTP id 5b1f17b1804b1-483a95f8eebmr158193415e9.11.1771863996672; Mon, 23 Feb 2026 08:26:36 -0800 (PST) Received: from luca-vm.lan ([154.61.61.58]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43970d5463dsm19120357f8f.34.2026.02.23.08.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Feb 2026 08:26:36 -0800 (PST) From: Luca Leonardo Scorcia To: linux-mediatek@lists.infradead.org Cc: Luca Leonardo Scorcia , AngeloGioacchino Del Regno , Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chunfeng Yun , Vinod Koul , Neil Armstrong , Matthias Brugger , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v3 1/6] arm64: dts: mt8167: Reorder nodes according to mmio address Date: Mon, 23 Feb 2026 16:22:45 +0000 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding display nodes. No other changes. Signed-off-by: Luca Leonardo Scorcia Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8167.dtsi | 68 ++++++++++++------------ 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts= /mediatek/mt8167.dtsi index 2374c0953057..27cf32d7ae35 100644 --- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi @@ -29,12 +29,6 @@ infracfg: infracfg@10001000 { #clock-cells =3D <1>; }; =20 - apmixedsys: apmixedsys@10018000 { - compatible =3D "mediatek,mt8167-apmixedsys", "syscon"; - reg =3D <0 0x10018000 0 0x710>; - #clock-cells =3D <1>; - }; - scpsys: syscon@10006000 { compatible =3D "mediatek,mt8167-scpsys", "syscon", "simple-mfd"; reg =3D <0 0x10006000 0 0x1000>; @@ -101,18 +95,6 @@ power-domain@MT8167_POWER_DOMAIN_CONN { }; }; =20 - imgsys: syscon@15000000 { - compatible =3D "mediatek,mt8167-imgsys", "syscon"; - reg =3D <0 0x15000000 0 0x1000>; - #clock-cells =3D <1>; - }; - - vdecsys: syscon@16000000 { - compatible =3D "mediatek,mt8167-vdecsys", "syscon"; - reg =3D <0 0x16000000 0 0x1000>; - #clock-cells =3D <1>; - }; - pio: pinctrl@1000b000 { compatible =3D "mediatek,mt8167-pinctrl"; reg =3D <0 0x1000b000 0 0x1000>; @@ -124,12 +106,36 @@ pio: pinctrl@1000b000 { interrupts =3D ; }; =20 + apmixedsys: apmixedsys@10018000 { + compatible =3D "mediatek,mt8167-apmixedsys", "syscon"; + reg =3D <0 0x10018000 0 0x710>; + #clock-cells =3D <1>; + }; + + iommu: m4u@10203000 { + compatible =3D "mediatek,mt8167-m4u"; + reg =3D <0 0x10203000 0 0x1000>; + mediatek,larbs =3D <&larb0>, <&larb1>, <&larb2>; + interrupts =3D ; + #iommu-cells =3D <1>; + }; + mmsys: syscon@14000000 { compatible =3D "mediatek,mt8167-mmsys", "syscon"; reg =3D <0 0x14000000 0 0x1000>; #clock-cells =3D <1>; }; =20 + larb0: larb@14016000 { + compatible =3D "mediatek,mt8167-smi-larb"; + reg =3D <0 0x14016000 0 0x1000>; + mediatek,smi =3D <&smi_common>; + clocks =3D <&mmsys CLK_MM_SMI_LARB0>, + <&mmsys CLK_MM_SMI_LARB0>; + clock-names =3D "apb", "smi"; + power-domains =3D <&spm MT8167_POWER_DOMAIN_MM>; + }; + smi_common: smi@14017000 { compatible =3D "mediatek,mt8167-smi-common"; reg =3D <0 0x14017000 0 0x1000>; @@ -139,14 +145,10 @@ smi_common: smi@14017000 { power-domains =3D <&spm MT8167_POWER_DOMAIN_MM>; }; =20 - larb0: larb@14016000 { - compatible =3D "mediatek,mt8167-smi-larb"; - reg =3D <0 0x14016000 0 0x1000>; - mediatek,smi =3D <&smi_common>; - clocks =3D <&mmsys CLK_MM_SMI_LARB0>, - <&mmsys CLK_MM_SMI_LARB0>; - clock-names =3D "apb", "smi"; - power-domains =3D <&spm MT8167_POWER_DOMAIN_MM>; + imgsys: syscon@15000000 { + compatible =3D "mediatek,mt8167-imgsys", "syscon"; + reg =3D <0 0x15000000 0 0x1000>; + #clock-cells =3D <1>; }; =20 larb1: larb@15001000 { @@ -159,6 +161,12 @@ larb1: larb@15001000 { power-domains =3D <&spm MT8167_POWER_DOMAIN_ISP>; }; =20 + vdecsys: syscon@16000000 { + compatible =3D "mediatek,mt8167-vdecsys", "syscon"; + reg =3D <0 0x16000000 0 0x1000>; + #clock-cells =3D <1>; + }; + larb2: larb@16010000 { compatible =3D "mediatek,mt8167-smi-larb"; reg =3D <0 0x16010000 0 0x1000>; @@ -168,13 +176,5 @@ larb2: larb@16010000 { clock-names =3D "apb", "smi"; power-domains =3D <&spm MT8167_POWER_DOMAIN_VDEC>; }; - - iommu: m4u@10203000 { - compatible =3D "mediatek,mt8167-m4u"; - reg =3D <0 0x10203000 0 0x1000>; - mediatek,larbs =3D <&larb0>, <&larb1>, <&larb2>; - interrupts =3D ; - #iommu-cells =3D <1>; - }; }; }; --=20 2.43.0