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Mon, 11 Aug 2025 01:51:32 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-55b887f72f4sm4237349e87.0.2025.08.11.01.51.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 01:51:31 -0700 (PDT) Date: Mon, 11 Aug 2025 11:51:28 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , Nuno =?iso-8859-1?Q?S=E1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Liam Girdwood , Mark Brown , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 06/11] iio: adc: ad7476: Drop convstart chan_spec Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="qUzuhLq20cKqadNw" Content-Disposition: inline In-Reply-To: --qUzuhLq20cKqadNw Content-Disposition: inline Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ad7476 driver defines separate chan_spec structures for operation with and without convstart GPIO. At quick glance this may seem as if the driver did provide more than 1 data-channel to users - one for the regular data, other for the data obtained with the convstart GPIO. The only difference between the 'convstart' and 'non convstart' -channels is presence / absence of the BIT(IIO_CHAN_INFO_RAW) in channel's flags. We can drop the convstart channel spec, and related convstart macro, by allocating a mutable per driver instance channel spec and adding the flag in probe if needed. This will simplify the driver with the cost of added memory consumption. Assuming there aren't systems with very many ADCs and very few resources, this tradeoff seems worth making. Simplify the driver by dropping the 'convstart' channel spec and allocating the channel spec for each driver instance. Signed-off-by: Matti Vaittinen Reviewed-by: Nuno S=C3=A1 Reviewed-by: Andy Shevchenko --- Revision history: v3 =3D> : - No changes v2 =3D> v3: - Use __set_bit() instead of |=3D - Swicth BUILD_BUG_ON to static_assert - Clarify a comment - Improve commit message v1 =3D> v2: - New patch --- drivers/iio/adc/ad7476.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c index 1445f0f599d9..ad9e629f0cbd 100644 --- a/drivers/iio/adc/ad7476.c +++ b/drivers/iio/adc/ad7476.c @@ -6,6 +6,7 @@ * Copyright 2010 Analog Devices Inc. */ =20 +#include #include #include #include @@ -29,8 +30,6 @@ struct ad7476_state; struct ad7476_chip_info { unsigned int int_vref_mv; struct iio_chan_spec channel[2]; - /* channels used when convst gpio is defined */ - struct iio_chan_spec convst_channel[2]; void (*reset)(struct ad7476_state *); bool has_vref; bool has_vdrive; @@ -42,6 +41,7 @@ struct ad7476_state { struct gpio_desc *convst_gpio; struct spi_transfer xfer; struct spi_message msg; + struct iio_chan_spec channel[2]; int scale_mv; /* * DMA (thus cache coherency maintenance) may require the @@ -154,24 +154,18 @@ static int ad7476_read_raw(struct iio_dev *indio_dev, #define AD7940_CHAN(bits) _AD7476_CHAN((bits), 15 - (bits), \ BIT(IIO_CHAN_INFO_RAW)) #define AD7091R_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), 0) -#define AD7091R_CONVST_CHAN(bits) _AD7476_CHAN((bits), 16 - (bits), \ - BIT(IIO_CHAN_INFO_RAW)) #define ADS786X_CHAN(bits) _AD7476_CHAN((bits), 12 - (bits), \ BIT(IIO_CHAN_INFO_RAW)) =20 static const struct ad7476_chip_info ad7091_chip_info =3D { .channel[0] =3D AD7091R_CHAN(12), .channel[1] =3D IIO_CHAN_SOFT_TIMESTAMP(1), - .convst_channel[0] =3D AD7091R_CONVST_CHAN(12), - .convst_channel[1] =3D IIO_CHAN_SOFT_TIMESTAMP(1), .reset =3D ad7091_reset, }; =20 static const struct ad7476_chip_info ad7091r_chip_info =3D { .channel[0] =3D AD7091R_CHAN(12), .channel[1] =3D IIO_CHAN_SOFT_TIMESTAMP(1), - .convst_channel[0] =3D AD7091R_CONVST_CHAN(12), - .convst_channel[1] =3D IIO_CHAN_SOFT_TIMESTAMP(1), .int_vref_mv =3D 2500, .has_vref =3D true, .reset =3D ad7091_reset, @@ -282,6 +276,7 @@ static int ad7476_probe(struct spi_device *spi) { struct ad7476_state *st; struct iio_dev *indio_dev; + unsigned int i; int ret; =20 indio_dev =3D devm_iio_device_alloc(&spi->dev, sizeof(*st)); @@ -332,16 +327,28 @@ static int ad7476_probe(struct spi_device *spi) if (IS_ERR(st->convst_gpio)) return PTR_ERR(st->convst_gpio); =20 + /* + * This will never happen. Unless someone changes the channel specs + * in this driver. And if someone does, without changing the loop + * below, then we'd better immediately produce a big fat error, before + * the change proceeds from that developer's table. + */ + static_assert(ARRAY_SIZE(st->channel) =3D=3D ARRAY_SIZE(st->chip_info->ch= annel)); + for (i =3D 0; i < ARRAY_SIZE(st->channel); i++) { + st->channel[i] =3D st->chip_info->channel[i]; + if (st->convst_gpio) + __set_bit(IIO_CHAN_INFO_RAW, + &st->channel[i].info_mask_separate); + } + st->spi =3D spi; =20 indio_dev->name =3D spi_get_device_id(spi)->name; indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->channels =3D st->chip_info->channel; - indio_dev->num_channels =3D 2; + indio_dev->channels =3D st->channel; + indio_dev->num_channels =3D ARRAY_SIZE(st->channel); indio_dev->info =3D &ad7476_info; =20 - if (st->convst_gpio) - indio_dev->channels =3D st->chip_info->convst_channel; /* Setup default message */ =20 st->xfer.rx_buf =3D &st->data; --=20 2.50.1 --qUzuhLq20cKqadNw Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCgAdFiEEIx+f8wZb28fLKEhTeFA3/03aocUFAmiZrxAACgkQeFA3/03a ocVDzAgAmXdxFkwmCGS3i4kD4BBfxI0MVfpwsQucvEu8r0VF3x2T1G2Nm9J8WZCx tciL00SL1sY5c+KbFZ6kppfbU6skJCqbLPxYQQ4fSfAmwFRK9i2TI87+S6pdlja5 FPXhTz5py7X4JaJkOWtIbprC74yuznFLw/M18Mnq3xVHFViUUUjPaicn3B0Dxe7d bgCAItpOWn907PZfxg3grUWQ6EYV3ego/Zdb1TomMvijR3JlySv4NY+nRkl7sF87 rMnPXThbPdG8BUgUajziBvRXKT7bJw2nm3MDWsA/RTC0Psa/tcYZv1rAVDamxI/p yef/q0We3rWBkPSdqiwqaZ5JUn9oog== =KcP+ -----END PGP SIGNATURE----- --qUzuhLq20cKqadNw--