From nobody Mon Sep 15 13:08:07 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9C79C678DA for ; Thu, 12 Jan 2023 16:52:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241272AbjALQtg (ORCPT ); Thu, 12 Jan 2023 11:49:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240338AbjALQis (ORCPT ); Thu, 12 Jan 2023 11:38:48 -0500 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6A42D1E3E8; Thu, 12 Jan 2023 08:34:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673541249; x=1705077249; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PJ5FSwAax6ajntqTh3c6asKm7Anmhm9GqKHRSGtihr4=; b=VAAh6OUHngLRWd+iHKGVeG7g3I6/WCSmn/nXQhrwOTwPusE0alLk0BVp SBOJjv5LTvQ65s4wEkEPzFtsQ54lofBr9/ORCo7YNhAcOwIAENqwByqL9 0VNtYoUwYwFsqLKH7mMkNpRO25qU/KuSFV/V0n9t16IHlcBbcdiM0bGmK Fp/65v7Zxeg83hH6Vf0vXDD1WJOJFP3JQrIP/CO74dIaw2RKXvSv8CVz5 Okwyd7Tt6T81BN7QoGk7nYDRw/xeuEuFoebPQPaqDE5gCkZrPeDxBT3FE hn0oMQXaXcYfH4NK3USIfh6cTyI33/uiIJfSr5XtzLc3YET5BTf6dk9+q A==; X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="323811986" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="323811986" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:31 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="721151870" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="721151870" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:31 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack Subject: [PATCH v11 067/113] KVM: TDX: restore host xsave state when exit from the guest TD Date: Thu, 12 Jan 2023 08:32:15 -0800 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata On exiting from the guest TD, xsave state is clobbered. Restore xsave state on TD exit. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/tdx.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 854aa4af4937..7bd47a76c96c 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -2,6 +2,7 @@ #include #include =20 +#include #include =20 #include "capabilities.h" @@ -460,6 +461,22 @@ void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_e= vent) vcpu->kvm->vm_bugged =3D true; } =20 +static void tdx_restore_host_xsave_state(struct kvm_vcpu *vcpu) +{ + struct kvm_tdx *kvm_tdx =3D to_kvm_tdx(vcpu->kvm); + + if (static_cpu_has(X86_FEATURE_XSAVE) && + host_xcr0 !=3D (kvm_tdx->xfam & kvm_caps.supported_xcr0)) + xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0); + if (static_cpu_has(X86_FEATURE_XSAVES) && + /* PT can be exposed to TD guest regardless of KVM's XSS support */ + host_xss !=3D (kvm_tdx->xfam & (kvm_caps.supported_xss | XFEATURE_MAS= K_PT))) + wrmsrl(MSR_IA32_XSS, host_xss); + if (static_cpu_has(X86_FEATURE_PKU) && + (kvm_tdx->xfam & XFEATURE_MASK_PKRU)) + write_pkru(vcpu->arch.host_pkru); +} + u64 __tdx_vcpu_run(hpa_t tdvpr, void *regs, u32 regs_mask); =20 static noinstr void tdx_vcpu_enter_exit(struct kvm_vcpu *vcpu, @@ -483,6 +500,7 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu) =20 tdx_vcpu_enter_exit(vcpu, tdx); =20 + tdx_restore_host_xsave_state(vcpu); tdx->host_state_need_restore =3D true; =20 vcpu->arch.regs_avail &=3D ~VMX_REGS_LAZY_LOAD_SET; --=20 2.25.1