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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2026 21:14:11.1547 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca520328-b9af-4706-ffe1-08de593205bb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CEA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8330 Content-Type: text/plain; charset="utf-8" Add the documentation and example to setup Global Slow Memory Bandwidth Allocation (GSMBA) in resctrl filesystem. Signed-off-by: Babu Moger --- Documentation/filesystems/resctrl.rst | 39 +++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/Documentation/filesystems/resctrl.rst b/Documentation/filesyst= ems/resctrl.rst index 6ff6162719e8..3d66814a1d7f 100644 --- a/Documentation/filesystems/resctrl.rst +++ b/Documentation/filesystems/resctrl.rst @@ -29,6 +29,7 @@ BMEC (Bandwidth Monitoring Event Configuration) "" ABMC (Assignable Bandwidth Monitoring Counters) "" SDCIAE (Smart Data Cache Injection Allocation Enforcement) "" GMBA (Global Memory Bandwidth Allocation) "" +GSMBA (Global Slow Memory Bandwidth Allocation) "" =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 Historically, new features were made visible by default in /proc/cpuinfo. = This @@ -995,6 +996,19 @@ is formatted as: =20 SMBA:=3Dbandwidth0;=3Dbandwidth1;... =20 +Global Slow Memory bandwidth Allocation (GSMBA) +----------------------------------------------- + +AMD hardware supports Global Slow Memory Bandwidth Allocation (GSMBA) +provides a mechanism for software to specify bandwidth limits for groups +of threads that span across multiple QoS Domains. It operates Similarly +to GMBA, however, the target resource is slow memory. + +Global Slow Memory b/w domain is L3 cache. +:: + + GSMBA:=3Dbandwidth;=3Dbandwidth;... + Reading/writing the schemata file --------------------------------- Reading the schemata file will show the state of all resources @@ -1073,6 +1087,31 @@ For example, to allocate 8GB/s limit on the first ca= che id: MB:0=3D2048;1=3D2048;2=3D2048;3=3D2048 L3:0=3Dffff;1=3Dffff;2=3Dffff;3=3Dffff =20 +Reading/writing the schemata file (on AMD systems) with GSMBA feature +--------------------------------------------------------------------- +Reading the schemata file will show the current bandwidth limit on all +domains. The allocated resources are in multiples of 1 GB/s. The GSMBA +control domain is created by setting the same GSMBA limits in one or +more QoS domains. + +For example, to configure a GSMBA domain consisting of domains 0 and 2 +with an 8 GB/s limit: + +:: + + # cat schemata + GSMBA:0=3D2048;1=3D2048;2=3D2048;3=3D2048 + SMBA:0=3D2048;1=3D2048;2=3D2048;3=3D2048 + MB:0=3D4096;1=3D4096;2=3D4096;3=3D4096 + L3:0=3Dffff;1=3Dffff;2=3Dffff;3=3Dffff + + # echo "GSMBA:0=3D8;2=3D8" > schemata + # cat schemata + GSMBA:0=3D 8;1=3D2048;2=3D 8;3=3D2048 + SMBA:0=3D2048;1=3D2048;2=3D2048;3=3D2048 + MB:0=3D4096;1=3D4096;2=3D4096;3=3D4096 + L3:0=3Dffff;1=3Dffff;2=3Dffff;3=3Dffff + Cache Pseudo-Locking =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D CAT enables a user to specify the amount of cache space that an --=20 2.34.1