From nobody Mon Apr 6 23:15:01 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F63E3446CE for ; Tue, 17 Mar 2026 20:00:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777623; cv=none; b=MvScEs45a4tsN26yOzOSBBSeEGGLWnyv5KNGuUEpkPXsdWG8pFqbiWLC33xvNsYWw1g8tw7mGNeuHJ8pqcRIOJ+CgJrIrAqQqWVYFngOXxNdbXAJHHtopFGmG8DZK0jPhPJJt+EPdrqJGkxkFMk8ezNrWaD/LjgMWiLtQBUiz3A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773777623; c=relaxed/simple; bh=mEEXKUlmkVBIzNV5wtuGiKeQL7kp/lCT/CJFn9Wdi4I=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=u6bL6+kb1zX54G1XeyOhNHfMo7h9/9+/2YTW1e62vgn+4rDncxSGgrr02ms4E7bndwjivsiQ+23Q9zeL1Nr6KtBY4Dj8QNYDTh2+lx+MTitJMqXwM1HcSBBtiMY9NLqee/Q3W8XQcrX+la6hga0FKAeNF5BelMi+Ekc2IR+oAaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=LZxTMGFn; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="LZxTMGFn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1773777614; x=1774036814; bh=mWI6Ci0OExEN/NmgLmPa48Tm+LQjRqPyhRE3t1Uth/U=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=LZxTMGFnBwi6lFkwTwMVEcxJTnxKNTmrMwxgwSaVh//UoewwGP08bD43vdpjxi7EI 4y/rpcIzqGFj7zj2z9FkV5IBZUo2uSaqnN1IAzs+3jNdoQdDLgA6bRXFfSFCQLt7Cp t3cdgvgQDWvrscanTh7eh8pIKJzlICSutD0WCtPVGEscxHyNgwKMzHXv3zvZK229+p Iver/1fT1K27vR0MhfLdkui4xSMscsQImNk3WCW1GV9I4y5MGpdaLqBU55mAI1pKP2 N8o5PI2zdw7XKz8UNm7I9hThvEWZC8e9VtJWqhpba/2IpIibaf8W5hfEurtY/spGV9 ejZrKhfpJP0Qg== Date: Tue, 17 Mar 2026 20:00:11 +0000 To: tglx@kernel.org, bp@alien8.de, mingo@redhat.com, darwi@linutronix.de, thuth@redhat.com, dave.hansen@linux.intel.com, ak@linux.intel.com, babu.moger@amd.com, chang.seok.bae@intel.com, peterz@infradead.org, nik.borisov@suse.com, jpoimboe@kernel.org, pawan.kumar.gupta@linux.intel.com, hpa@zytor.com, xin@zytor.com, maciej.wieczor-retman@intel.com, sohil.mehta@intel.com From: Maciej Wieczor-Retman Cc: x86@kernel.org, linux-kernel@vger.kernel.org, m.wieczorretman@pm.me, Farrah Chen Subject: [PATCH v10 1/3] x86/cpu: Clear feature bits disabled at compile-time Message-ID: In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: ece260968a7077f72b7b705de409d4f932455d9d Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman If some config options are disabled during compile time, they still are enumerated in macros that use the x86_capability bitmask - cpu_has() or this_cpu_has(). The features are also visible in /proc/cpuinfo even though they are not enabled - which is contrary to what the documentation states about the file. Examples of such feature flags are lam, fred, sgx, user_shstk and enqcmd. Initialize cpu_caps_cleared[] with an autogenerated disabled bitmask. During CPU init, apply_forced_caps() will clear the corresponding bits in struct cpuinfo_x86 for each CPU. Thus features disabled at compile time won't show up in /proc/cpuinfo. No BUGS are defined to be cleared at compile time, therefore only the NCAPINTS part of cpu_caps_cleared[] is initialized using the macro. The NBUGINTS part is set to zero. Reported-by: Farrah Chen Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D220348 Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Sohil Mehta --- Changelog v10: - Remove examples of feature flags that came from stable kernels. - Redo the patch message a bit with Sohil's suggestions. - Add Sohil's Reviewed-by tag. Changelog v9: - *_MASK_INITIALIZER -> *_MASK_INIT - Remove Cc stable. - Note that the BUGS part of cpu_caps_cleared[] is zeroed. Changelog v6: - Remove patch message portions that are not just describing the diff. arch/x86/kernel/cpu/common.c | 3 ++- arch/x86/tools/cpufeaturemasks.awk | 6 ++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index a8ff4376c286..76339e988304 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -735,7 +735,8 @@ static const char *table_lookup_model(struct cpuinfo_x8= 6 *c) } =20 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */ -__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )); +__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )) =3D + DISABLED_MASK_INIT; __u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long)); =20 #ifdef CONFIG_X86_32 diff --git a/arch/x86/tools/cpufeaturemasks.awk b/arch/x86/tools/cpufeature= masks.awk index 173d5bf2d999..9382bd15279a 100755 --- a/arch/x86/tools/cpufeaturemasks.awk +++ b/arch/x86/tools/cpufeaturemasks.awk @@ -82,6 +82,12 @@ END { } printf " 0\t\\\n"; printf "\t) & (1U << ((x) & 31)))\n\n"; + + printf "\n#define %s_MASK_INIT\t\t\t\\", s; + printf "\n\t{\t\t\t\t\t\t\\"; + for (i =3D 0; i < ncapints; i++) + printf "\n\t\t%s_MASK%d,\t\t\t\\", s, i; + printf "\n\t}\n\n"; } =20 printf "#endif /* _ASM_X86_CPUFEATUREMASKS_H */\n"; --=20 2.53.0