From nobody Sun Feb 8 09:37:09 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B975F331A62; Mon, 26 Jan 2026 12:12:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769429559; cv=none; b=twDrnBWmtKd8Ujj6bLm5WNmtCNZ157YVv6LeXCDgN9S0JnWjgHMP4P08nr4tNYDKrqA4Qq1BFK2Xp/JV7Pwbd3Mi2Tr5fVqkL41or3wMCWdRAIaWRt0EQPp1jD4yS+O/lOQGf6EZ0Z6eJ+27c4n/zAdl9/AILbD1JLw4mPph0VI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769429559; c=relaxed/simple; bh=V27tRFOW/2e4kAzEuqU2G1Ilb5aoN4aQIZHli6QmI+c=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=fCusvHY4ARMmV5tn51Wn0b9S1YVjE8LkyYJY7mO+32odQ4ADUaaUnQAdlyxLMC0J9gFNzwjfgrYWZhCnZEIqhkTzZHbuH9j9TphAKeVFf8JAmxyKXaHggdfHk3zk2o5m25d3168pfxBtb/Hf8rNwnJRVpP1o1QKPbD0lFGia7o0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5E6B7339; Mon, 26 Jan 2026 04:12:29 -0800 (PST) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.85]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 852153F5CA; Mon, 26 Jan 2026 04:12:34 -0800 (PST) From: Robin Murphy To: brgl@kernel.org, linusw@kernel.org, heiko@sntech.de Cc: sebastian.reichel@collabora.com, m.szyprowski@samsung.com, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH] gpio/rockchip: Stop calling pinctrl for set_direction Date: Mon, 26 Jan 2026 12:12:26 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Marking the whole controller as sleeping due to the pinctrl calls in the .direction_{input,output} callbacks has the unfortunate side effect that legitimate invocations of .get and .set, which cannot themselves sleep, in atomic context now spew WARN()s from gpiolib. However, as Heiko points out, the driver doing this is a bit silly to begin with, as the pinctrl .gpio_set_direction hook doesn't even care about the direction, the hook is only used to claim the mux. And sure enough, the .gpio_request_enable hook exists to serve this very purpose, so switch to that and remove the problematic business entirely. Cc: stable@vger.kernel.org Fixes: 20cf2aed89ac ("gpio: rockchip: mark the GPIO controller as sleeping") Suggested-by: Heiko Stuebner Signed-off-by: Robin Murphy --- If I don't have to redesign bits of the GPIO subsystem itself, this much I can do :) Tested on RK3399 NanoPC-T4 with GPIOs with and without explicit pinctrl, and PROVE_LOCKING and DEBUG_ATOMIC_SLEEP stayed quiet (although I don't think this board has any shared pins) --- drivers/gpio/gpio-rockchip.c | 8 -------- drivers/pinctrl/pinctrl-rockchip.c | 9 ++++----- 2 files changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index bae2061f15fc..0fff4a699f12 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -164,12 +163,6 @@ static int rockchip_gpio_set_direction(struct gpio_chi= p *chip, unsigned long flags; u32 data =3D input ? 0 : 1; =20 - - if (input) - pinctrl_gpio_direction_input(chip, offset); - else - pinctrl_gpio_direction_output(chip, offset); - raw_spin_lock_irqsave(&bank->slock, flags); rockchip_gpio_writel_bit(bank, offset, data, bank->gpio_regs->port_ddr); raw_spin_unlock_irqrestore(&bank->slock, flags); @@ -593,7 +586,6 @@ static int rockchip_gpiolib_register(struct rockchip_pi= n_bank *bank) gc->ngpio =3D bank->nr_pins; gc->label =3D bank->name; gc->parent =3D bank->dev; - gc->can_sleep =3D true; =20 ret =3D gpiochip_add_data(gc, bank); if (ret) { diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-r= ockchip.c index e44ef262beec..2fc67aeafdb3 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -3545,10 +3545,9 @@ static int rockchip_pmx_set(struct pinctrl_dev *pctl= dev, unsigned selector, return 0; } =20 -static int rockchip_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, - struct pinctrl_gpio_range *range, - unsigned offset, - bool input) +static int rockchip_pmx_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) { struct rockchip_pinctrl *info =3D pinctrl_dev_get_drvdata(pctldev); struct rockchip_pin_bank *bank; @@ -3562,7 +3561,7 @@ static const struct pinmux_ops rockchip_pmx_ops =3D { .get_function_name =3D rockchip_pmx_get_func_name, .get_function_groups =3D rockchip_pmx_get_groups, .set_mux =3D rockchip_pmx_set, - .gpio_set_direction =3D rockchip_pmx_gpio_set_direction, + .gpio_request_enable =3D rockchip_pmx_gpio_request_enable, }; =20 /* --=20 2.39.2.101.g768bb238c484.dirty