From nobody Mon Feb 9 10:48:08 2026 Received: from mx0b-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 442CE30B515; Fri, 6 Feb 2026 16:08:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.135.77 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770394085; cv=none; b=GSMJ9VrwSMZnDcD+pVvq1cxc/FOfMSgnksZgkxfaHCXYoQ7oTfuMU4ArmEircxutl9mQlFzadzSh9PGG66LPTQbqsYDsgMlAocDvYNr0EqAsFDCt81ejk795s4zMKDnV1yXtMrNfRMvk5DALZ6ZKhePLpzfQti+3j98GmvyiyFE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770394085; c=relaxed/simple; bh=112NwewjqgbtMoj2SSFq82/xqJDx/6QVkQ5u1fXAkcY=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=I0pBvE99B29QbFe4qheaUBV+XUHjriktj6T9pFGWmaGmW6iA66swuCWcbgTYQbt/SOTQbdDAEiOTuYT2R0mMuOBsOMhe88UbqXbU5JNxesnu41qjYS/+pJeah9oD3R0bPSpqMjQCOiR+SKwtBOi64oQ25O328NzuJ4Tzb3cMpcI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com; spf=pass smtp.mailfrom=analog.com; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b=T0GRh+1e; arc=none smtp.client-ip=148.163.135.77 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=analog.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=analog.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=analog.com header.i=@analog.com header.b="T0GRh+1e" Received: from pps.filterd (m0375855.ppops.net [127.0.0.1]) by mx0b-00128a01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6169skFw898157; Fri, 6 Feb 2026 11:07:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=analog.com; h= content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=DKIM; bh=j9iZO AvdPrymJ+lBxZCmFd7tXgQrCAjgxtPn/t1x1ug=; b=T0GRh+1ekO3BiXxOdOA+J +cv3XZEBRKxrdukagKPUTQ2QPXAwJ0fRNdz2nDjBiHB5R0qX+Bbef3Vmyl0IUGnQ /58hymKZoSoDIxF5qI3ytDZ2FJ3yEQqNFwIssRc+78qyzMdhYvdmfUEwBFCHAN5W qMBbQM38KAKKZymDr9KxHw/JIuhmo247kFOfbEVjHsPmRxyn1nhho1cWksogt4Qe ZABN4C2DDhsI1YSbITosa5ak4RoJVlZ4lEoSbYeBJRTOxNsK9NV/N3CKxzldW6Hf RJ5yjjk5+Omb8LBO3/ARdCKuNP+d8ww8lDfHmM4SmAytWKx/9+tAIwquydADHj8U A== Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0b-00128a01.pphosted.com (PPS) with ESMTPS id 4c5e32h4y4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 06 Feb 2026 11:07:41 -0500 (EST) Received: from ASHBMBX9.ad.analog.com (ASHBMBX9.ad.analog.com [10.64.17.10]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 616G7ela057139 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 6 Feb 2026 11:07:40 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Fri, 6 Feb 2026 11:07:40 -0500 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.37; Fri, 6 Feb 2026 11:07:40 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.1748.37 via Frontend Transport; Fri, 6 Feb 2026 11:07:40 -0500 Received: from HYB-b1tGeUj4GP1.ad.analog.com (HYB-b1tGeUj4GP1.ad.analog.com [10.48.65.247]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 616G7MAl000370; Fri, 6 Feb 2026 11:07:33 -0500 From: Antoniu Miclaus To: Antoniu Miclaus , Lars-Peter Clausen , Michael Hennerich , "Jonathan Cameron" , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Olivier Moysan , Mark Brown , , , , Subject: [PATCH v2 1/4] spi: allow ancillary devices to share parent's chip selects Date: Fri, 6 Feb 2026 18:07:13 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: 4jPEXfSFDyf0Wbqf1ombZa4X_Xekf8NQ X-Proofpoint-ORIG-GUID: 4jPEXfSFDyf0Wbqf1ombZa4X_Xekf8NQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjA2MDExNyBTYWx0ZWRfX5Jv4fedEQvtm C7VM4WeufDMwxATjeK9hZhkzoSyMsYCayxjk3tzW3nj7NPkYbVRocPFHylDzDuEg4fnvxUNpGiD LMq2sgRpwCJSsSdkNP/76yaluY2OLAi6msPtu7fQFIU1F+mWS0WDuwssOe4pAk5idfAy5e6OaOA uksHGC6hicaTEobwi8lzjYKeqAv5uppvGcPI+OEp0++3hwmzv0utu7f+1/SAO0bayTjN/Cb2lP5 Z7Z3A8M1faTK1PfYk0QV7gSbUVD7KcjT3ssQ1ftNFr5xg7n/xqjRNPHGZKKacot7yQSEFqPHHoB BSU3eGgmISWRQR3QvzXo7+xNy6AJ+aGJuGPj3NJdj9Fp4qA/sd5o6MpkWYTszutcp3ePVFoKPA/ wwtaBycO9m6BuWh0v5ulHWBMKje+tiHc7zYnf/VJBsLpNMJiCGTnS2wQq5U0GMA6nv82LV4QvfG zW495ToqvxWpg6iOraA== X-Authority-Analysis: v=2.4 cv=NPzYOk6g c=1 sm=1 tr=0 ts=698611cd cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=gAnH3GRIAAAA:8 a=Brvx10Sw2QwnUvu3_sIA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-06_04,2026-02-05_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 spamscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 suspectscore=0 adultscore=0 malwarescore=0 impostorscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602060117 Content-Type: text/plain; charset="utf-8" When registering an ancillary SPI device, the current code flags a chip select conflict with the parent device. This happens because the ancillary device intentionally uses one of the parent's chip selects, but __spi_add_device() checks against all existing devices including the parent. Allow this by passing the parent device pointer to __spi_add_device() and skipping the conflict check when the existing device is the parent. Signed-off-by: Antoniu Miclaus Reviewed-by: David Lechner --- drivers/spi/spi.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index e25df9990f82..18ca3c7bad6b 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -641,12 +641,26 @@ static inline int spi_dev_check_cs(struct device *dev, return 0; } =20 +struct spi_dev_check_info { + struct spi_device *new_spi; + struct spi_device *parent; /* set for ancillary devices */ +}; + static int spi_dev_check(struct device *dev, void *data) { struct spi_device *spi =3D to_spi_device(dev); - struct spi_device *new_spi =3D data; + struct spi_dev_check_info *info =3D data; + struct spi_device *new_spi =3D info->new_spi; int status, idx; =20 + /* + * When registering an ancillary device, skip checking against the + * parent device since the ancillary is intentionally using one of + * the parent's chip selects. + */ + if (info->parent && spi =3D=3D info->parent) + return 0; + if (spi->controller =3D=3D new_spi->controller) { for (idx =3D 0; idx < spi->num_chipselect; idx++) { status =3D spi_dev_check_cs(dev, spi, idx, new_spi, 0); @@ -663,10 +677,11 @@ static void spi_cleanup(struct spi_device *spi) spi->controller->cleanup(spi); } =20 -static int __spi_add_device(struct spi_device *spi) +static int __spi_add_device(struct spi_device *spi, struct spi_device *par= ent) { struct spi_controller *ctlr =3D spi->controller; struct device *dev =3D ctlr->dev.parent; + struct spi_dev_check_info check_info; int status, idx; u8 cs; =20 @@ -710,7 +725,9 @@ static int __spi_add_device(struct spi_device *spi) * chipselect **BEFORE** we call setup(), else we'll trash * its configuration. */ - status =3D bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); + check_info.new_spi =3D spi; + check_info.parent =3D parent; + status =3D bus_for_each_dev(&spi_bus_type, NULL, &check_info, spi_dev_che= ck); if (status) return status; =20 @@ -772,7 +789,7 @@ int spi_add_device(struct spi_device *spi) spi_dev_set_name(spi); =20 mutex_lock(&ctlr->add_lock); - status =3D __spi_add_device(spi); + status =3D __spi_add_device(spi, NULL); mutex_unlock(&ctlr->add_lock); return status; } @@ -2580,8 +2597,8 @@ struct spi_device *spi_new_ancillary_device(struct sp= i_device *spi, =20 WARN_ON(!mutex_is_locked(&ctlr->add_lock)); =20 - /* Register the new device */ - rc =3D __spi_add_device(ancillary); + /* Register the new device, passing the parent to skip CS conflict check = */ + rc =3D __spi_add_device(ancillary, spi); if (rc) { dev_err(&spi->dev, "failed to register ancillary device\n"); goto err_out; --=20 2.43.0