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[93.35.179.236]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48527681a3esm261097785e9.4.2026.03.07.07.55.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 07 Mar 2026 07:55:15 -0800 (PST) From: Stefano Radaelli To: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Cc: pierluigi.p@variscite.com, Stefano Radaelli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Subject: [PATCH v3 04/11] arm64: dts: freescale: imx8mm-var-som: Add support for WM8904 audio codec Date: Sat, 7 Mar 2026 16:54:40 +0100 Message-ID: X-Mailer: git-send-email 2.47.3 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Stefano Radaelli From: Stefano Radaelli The VAR-SOM-MX8MM can integrate the WM8904, a high-performance ultra-low-power stereo codec optimized for portable audio applications. This patch adds the WM8904 device to the appropriate I2C bus, enables the SAI peripheral, and introduces the sound node to expose the sound card to the system. Signed-off-by: Stefano Radaelli --- v2->v3: -=20 v1->v2: -=20 .../boot/dts/freescale/imx8mm-var-som.dtsi | 100 +++++++++++++++++- 1 file changed, 97 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi b/arch/arm64= /boot/dts/freescale/imx8mm-var-som.dtsi index 24924ee1e8c7..7cedef8add32 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi @@ -14,6 +14,14 @@ memory@40000000 { reg =3D <0x0 0x40000000 0 0x80000000>; }; =20 + reg_audio_supply: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "wm8904-supply"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + reg_eth_phy: regulator-eth-phy { compatible =3D "regulator-fixed"; pinctrl-names =3D "default"; @@ -31,6 +39,34 @@ reg_phy_vddio: regulator-phy-vddio { regulator-min-microvolt =3D <1800000>; regulator-max-microvolt =3D <1800000>; }; + + sound { + compatible =3D "simple-audio-card"; + simple-audio-card,bitclock-master =3D <&codec_dai>; + simple-audio-card,format =3D "i2s"; + simple-audio-card,frame-master =3D <&codec_dai>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "wm8904-audio"; + simple-audio-card,routing =3D + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "IN1L", "Microphone Jack", + "IN1R", "Microphone Jack"; + simple-audio-card,widgets =3D + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + sound-dai =3D <&wm8904>; + }; + + simple-audio-card,cpu { + sound-dai =3D <&sai5>; + }; + }; }; =20 &A53_0 { @@ -257,18 +293,57 @@ ldo6_reg: LDO6 { =20 &i2c3 { clock-frequency =3D <400000>; - pinctrl-names =3D "default"; + pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c3>; + pinctrl-1 =3D <&pinctrl_i2c3_gpio>; + scl-gpios =3D <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; =20 - /* TODO: configure audio, as of now just put a placeholder */ wm8904: codec@1a { compatible =3D "wlf,wm8904"; reg =3D <0x1a>; - status =3D "disabled"; + #sound-dai-cells =3D <0>; + clocks =3D <&clk IMX8MM_CLK_SAI5_ROOT>; + clock-names =3D "mclk"; + AVDD-supply =3D <&ldo5_reg>; + CPVDD-supply =3D <&ldo5_reg>; + DBVDD-supply =3D <®_audio_supply>; + DCVDD-supply =3D <&ldo5_reg>; + MICVDD-supply =3D <&ldo5_reg>; + wlf,drc-cfg-names =3D "default", "peaklimiter", "tradition", + "soft", "music"; + /* + * Config registers per name, respectively: + * KNEE_IP =3D 0, KNEE_OP =3D 0, HI_COMP =3D 1, LO_COMP =3D 1 + * KNEE_IP =3D -24, KNEE_OP =3D -6, HI_COMP =3D 1/4, LO_COMP =3D 1 + * KNEE_IP =3D -42, KNEE_OP =3D -3, HI_COMP =3D 0, LO_COMP =3D 1 + * KNEE_IP =3D -45, KNEE_OP =3D -9, HI_COMP =3D 1/8, LO_COMP =3D 1 + * KNEE_IP =3D -30, KNEE_OP =3D -10.5, HI_COMP =3D 1/4, LO_COMP =3D 1 + */ + wlf,drc-cfg-regs =3D /bits/ 16 <0x01af 0x3248 0x0000 0x0000>, + /bits/ 16 <0x04af 0x324b 0x0010 0x0408>, + /bits/ 16 <0x04af 0x324b 0x0028 0x0704>, + /bits/ 16 <0x04af 0x324b 0x0018 0x078c>, + /bits/ 16 <0x04af 0x324b 0x0010 0x050e>; + /* GPIO1 =3D DMIC_CLK, don't touch others */ + wlf,gpio-cfg =3D <0x0018>, <0xffff>, <0xffff>, <0xffff>; }; }; =20 +&sai5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sai5>; + assigned-clocks =3D <&clk IMX8MM_CLK_SAI5>; + assigned-clock-parents =3D <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates =3D <1536000>; + #sound-dai-cells =3D <0>; + dmas =3D <&sdma2 8 25 0>, <&sdma2 9 25 0>; + dma-names =3D "rx", "tx"; + fsl,sai-mclk-direction-output; + status =3D "okay"; +}; + &snvs_pwrkey { status =3D "okay"; }; @@ -413,6 +488,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; =20 + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1c3 + MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1c3 + >; + }; + pinctrl_pmic: pmicirqgrp { fsl,pins =3D < MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 @@ -431,6 +513,18 @@ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0 >; }; =20 + pinctrl_sai5: sai5grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXC_SAI5_RX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins =3D < MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 --=20 2.47.3