From nobody Tue Jun 16 20:38:24 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD22E37EFFB for ; Tue, 21 Apr 2026 06:28:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776752918; cv=none; b=CdqSjdWz4cYgc1tPHj94yuoqDjaNBj4suAKp3qQIuyrrsomIuefd0mXy9XgRrH1GSyguVxwIjcPha5DYDb74opdD2agxhgx+c+sVX2NuIukUk78K9TUIwVvxmOTl+hQ0xWT+b1shGGBcleYh77VUNvjIO2KFDcElUvlTJVWAzjA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776752918; c=relaxed/simple; bh=dHS0gPZI0H1Mm3DBnxFHJRq1QTSVEk6PBiQCtoOUiRM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=lSlApUdpgZeCQyqVk+JzAI9F1qnyrRI1E2M59lB1D3w2Z893dUFrA3K5bXhBBDV9KWu7OyXhuREqth65sHfP9hOc/faTtCJ8fMNIizR5gG3qEeMZnPuojgdwWVU0SoQhpPBrYhUIfFDCmGdRZZl74wRls6Ly9klxm5LXPcjhL78= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N8sOAJN/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N8sOAJN/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 806D7C2BCB0; Tue, 21 Apr 2026 06:28:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776752918; bh=dHS0gPZI0H1Mm3DBnxFHJRq1QTSVEk6PBiQCtoOUiRM=; h=From:To:Cc:Subject:Date:From; b=N8sOAJN/m9DLUmvktUQYI5VhDyt7bWPL6cUKLY0QqBIrL4bf2hm5v2ODzNt7waL+8 V9iJniP7ewPdb6UGrS5rRj3t4dk+feOrWRnyu6Gp+bvsNn3zDLHrIQCI5HEldYTOzs cLOotQOJzgRfVMQN8VJlZMEo+VQ1RNtkhbvK4BWkNVWuwqH00L8Cl0WdaH6UTilDK1 iI6gvT4YzDpx2PtQiqg+KZaJAuf5ge7geOpNDNY1nQGlvOF5fY53EMaHfbg7KJU2vH Ry50Q+UQLUbA7ACikWMgr/9jFio3B3xn8cG5H+5nQoaHfdAC3C3NFKB6pFMqD3bLQU na9oqY+TaQ0Cg== From: "Christophe Leroy (CS GROUP)" To: Michael Ellerman , Nicholas Piggin , Madhavan Srinivasan Cc: "Christophe Leroy (CS GROUP)" , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH] powerpc/8xx: Fix interrupt mask in cpm1_gpiochip_add16() Date: Tue, 21 Apr 2026 08:26:08 +0200 Message-ID: X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1358; i=chleroy@kernel.org; h=from:subject:message-id; bh=dHS0gPZI0H1Mm3DBnxFHJRq1QTSVEk6PBiQCtoOUiRM=; b=owGbwMvMwCV2d0KB2p7V54MZT6slMWQ+l2gUfvrA0u7+nc1sGjaLFmSs0NfeNPmijkf1pIBDL fWXb+Yd6ihlYRDjYpAVU2Q5/p9714yuL6n5U3fpw8xhZQIZwsDFKQATOSTA8L+m9cWqk7qCU41W Z0xf4lZXJ3n909YND3tFjvo8truUvaedkeHMm7+MNQKsT707n3ufyHTfffLmUp63/CkrpzQe1jc tv8QOAA== X-Developer-Key: i=chleroy@kernel.org; a=openpgp; fpr=10FFE6F8B390DE17ACC2632368A92FEB01B8DD78 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Allthough fsl,cpm1-gpio-irq-mask always contains a 16 bits value, it is a standard u32 OF property as documented in Documentation/devicetree/bindings/soc/fsl/cpm_qe/gpio.txt The driver erroneously uses of_property_read_u16() leading to a mask which is always 0. Fix it by using of_property_read_u32() instead. Fixes: 726bd223105c ("powerpc/8xx: Adding support of IRQ in MPC8xx GPIO") Signed-off-by: Christophe Leroy (CS GROUP) --- arch/powerpc/platforms/8xx/cpm1.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/8xx/cpm1.c b/arch/powerpc/platforms/8xx= /cpm1.c index 7433be7d66ee..f00734f0590c 100644 --- a/arch/powerpc/platforms/8xx/cpm1.c +++ b/arch/powerpc/platforms/8xx/cpm1.c @@ -477,7 +477,7 @@ int cpm1_gpiochip_add16(struct device *dev) struct device_node *np =3D dev->of_node; struct cpm1_gpio16_chip *cpm1_gc; struct gpio_chip *gc; - u16 mask; + u32 mask; =20 cpm1_gc =3D devm_kzalloc(dev, sizeof(*cpm1_gc), GFP_KERNEL); if (!cpm1_gc) @@ -485,7 +485,7 @@ int cpm1_gpiochip_add16(struct device *dev) =20 spin_lock_init(&cpm1_gc->lock); =20 - if (!of_property_read_u16(np, "fsl,cpm1-gpio-irq-mask", &mask)) { + if (!of_property_read_u32(np, "fsl,cpm1-gpio-irq-mask", &mask)) { int i, j; =20 for (i =3D 0, j =3D 0; i < 16; i++) --=20 2.49.0