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Received: from PAXPR04MB9448.eurprd04.prod.outlook.com (2603:10a6:102:2b1::21) by AM0PR04MB6881.eurprd04.prod.outlook.com (2603:10a6:208:18b::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7982.27; Tue, 24 Sep 2024 07:38:33 +0000 Received: from PAXPR04MB9448.eurprd04.prod.outlook.com ([fe80::51ae:5f12:9744:1abc]) by PAXPR04MB9448.eurprd04.prod.outlook.com ([fe80::51ae:5f12:9744:1abc%6]) with mapi id 15.20.7982.022; Tue, 24 Sep 2024 07:38:33 +0000 From: Sandor Yu To: dmitry.baryshkov@linaro.org, andrzej.hajda@intel.com, neil.armstrong@linaro.org, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@gmail.com, airlied@gmail.com, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, vkoul@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, mripard@kernel.org Cc: kernel@pengutronix.de, linux-imx@nxp.com, Sandor.yu@nxp.com, oliver.brown@nxp.com, alexander.stein@ew.tq-group.com, sam@ravnborg.org, Rob Herring Subject: [PATCH v17 5/8] dt-bindings: phy: Add Freescale iMX8MQ DP and HDMI PHY Date: Tue, 24 Sep 2024 15:36:50 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SGBP274CA0008.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b0::20) To PAXPR04MB9448.eurprd04.prod.outlook.com (2603:10a6:102:2b1::21) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9448:EE_|AM0PR04MB6881:EE_ X-MS-Office365-Filtering-Correlation-Id: 0c6fab00-53f3-4797-b251-08dcdc6be4b2 X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|52116014|7416014|921020|38350700014; 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charset="utf-8" Add bindings for Freescale iMX8MQ DP and HDMI PHY. Signed-off-by: Sandor Yu Reviewed-by: Rob Herring --- v9->v17: *No change. .../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdm= i-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.y= aml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml new file mode 100644 index 0000000000000..c17a645e71bad --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/fsl,imx8mq-dp-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cadence HDP-TX DP/HDMI PHY for Freescale i.MX8MQ SoC + +maintainers: + - Sandor Yu + +properties: + compatible: + const: fsl,imx8mq-hdptx-phy + + reg: + maxItems: 1 + + clocks: + items: + - description: PHY reference clock. + - description: APB clock. + + clock-names: + items: + - const: ref + - const: apb + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + dp_phy: phy@32c00000 { + compatible =3D "fsl,imx8mq-hdptx-phy"; + reg =3D <0x32c00000 0x100000>; + #phy-cells =3D <0>; + clocks =3D <&hdmi_phy_27m>, <&clk IMX8MQ_CLK_DISP_APB_ROOT>; + clock-names =3D "ref", "apb"; + }; --=20 2.34.1