From nobody Wed Oct 22 15:57:35 2025 Received: from angie.orcam.me.uk (angie.orcam.me.uk [78.133.224.34]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 20F29350A2C; Tue, 21 Oct 2025 19:38:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.133.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761075506; cv=none; b=tZimd22WJkT38BQ7lK2VelheuNxVIxsTpxsiw2yq5w2H2C8OPx279kZaAtoUCGOzXJhgAOtgZXTrKxiVnZwlac2giM4ruKH/Olv0Y3e3I0cZs23fVyRMumCJMPmCvURSze4pRBYYd8WOa+axBJrHstgy7x0u6/qCHRPPRWkFzs4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761075506; c=relaxed/simple; bh=mu74hCD0N5eZ9ZNUprqkV/jotbAo65ncNwIJD/9v7D0=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=uRm1Iu+KAtDg3A6j8Z8DzuiW3eV6MIW62Tym1oe5WJUDI2xazN6x09D/AsS+hbrOT7n0aO0QJXRqDJvn8bsqV0LxCqX+B03EeunZORaU3v54QCksIvqtUXGXfp50gc053A6yn7CPXNLdIjPr1ymxqiAUC8wL9cz3ujzoMQvSm94= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=orcam.me.uk; spf=none smtp.mailfrom=orcam.me.uk; arc=none smtp.client-ip=78.133.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=orcam.me.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=orcam.me.uk Received: by angie.orcam.me.uk (Postfix, from userid 500) id 08E7A92009C; Tue, 21 Oct 2025 21:38:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 0145D92009B; Tue, 21 Oct 2025 20:38:22 +0100 (BST) Date: Tue, 21 Oct 2025 20:38:22 +0100 (BST) From: "Maciej W. Rozycki" To: Bjorn Helgaas , Thomas Bogendoerfer cc: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Bjorn Helgaas , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] MIPS: Malta: Fix keyboard resource preventing i8042 driver from registering In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (DEB 202 2017-01-01) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" MIPS Malta platform code registers the PCI southbridge legacy port I/O=20 PS/2 keyboard range as a standard resource marked as busy. It prevents=20 the i8042 driver from registering as it fails to claim the resource in=20 a call to i8042_platform_init(). Consequently PS/2 keyboard and mouse=20 devices cannot be used with this platform. Fix the issue by removing the busy marker from the standard reservation,=20 making the driver register successfully: serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 and the resource show up as expected among the legacy devices: 00000000-00ffffff : MSC PCI I/O 00000000-0000001f : dma1 00000020-00000021 : pic1 00000040-0000005f : timer 00000060-0000006f : keyboard 00000060-0000006f : i8042 00000070-00000077 : rtc0 00000080-0000008f : dma page reg 000000a0-000000a1 : pic2 000000c0-000000df : dma2 [...] If the i8042 driver has not been configured, then the standard resource=20 will remain there preventing any conflicting dynamic assignment of this=20 PCI port I/O address range. Signed-off-by: Maciej W. Rozycki Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Cc: stable@vger.kernel.org Acked-by: Thomas Bogendoerfer Reviewed-by: Ilpo J=C3=A4rvinen --- arch/mips/mti-malta/malta-setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) linux-mips-malta-setup-resource-keyboard.diff Index: linux-macro/arch/mips/mti-malta/malta-setup.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- linux-macro.orig/arch/mips/mti-malta/malta-setup.c +++ linux-macro/arch/mips/mti-malta/malta-setup.c @@ -47,7 +47,7 @@ static struct resource standard_io_resou .name =3D "keyboard", .start =3D 0x60, .end =3D 0x6f, - .flags =3D IORESOURCE_IO | IORESOURCE_BUSY + .flags =3D IORESOURCE_IO }, { .name =3D "dma page reg", From nobody Wed Oct 22 15:57:35 2025 Received: from angie.orcam.me.uk (angie.orcam.me.uk [78.133.224.34]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 93BC6350A2C; Tue, 21 Oct 2025 19:38:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.133.224.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761075512; cv=none; b=oXTDiDig7imhUb826slXtXErQ/GS20nOEMYo65Gu2XayjvXrUd5D22S2h8T84iVPAnNvvYPG0vBofljfxICK0UKELr5OaTPrs0d5lBRBndaB9ZXXQrF9BDhtB8zNQV5pT9W0798eXHS+GEKZu4vlliyylYhSMloMD3mjn2xKnrw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761075512; c=relaxed/simple; bh=6O/9qaWfEjlTYlM+TIrDzQlfkmfnsByO+S4xXrLWKFk=; h=Date:From:To:cc:Subject:In-Reply-To:Message-ID:References: MIME-Version:Content-Type; b=iQILQCyBWPu3lBtDpo9XeUNA4KDq8ms54y3JL1kvu7LCzjlIrsby3qmavQDLBUJf6cAfZlz6BxbDUxhKlPZEKnrmoYBfheol+5H9afNylQfkdNh8xD6y1DqPhUZNCeFeEqVaR8UnyhvR0m6r0dWri9FKHgO+j0TxQKVnDPWYC4Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=orcam.me.uk; spf=none smtp.mailfrom=orcam.me.uk; arc=none smtp.client-ip=78.133.224.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=orcam.me.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=orcam.me.uk Received: by angie.orcam.me.uk (Postfix, from userid 500) id 9F5E092009C; Tue, 21 Oct 2025 21:38:29 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id 9B03592009B; Tue, 21 Oct 2025 20:38:29 +0100 (BST) Date: Tue, 21 Oct 2025 20:38:29 +0100 (BST) From: "Maciej W. Rozycki" To: Bjorn Helgaas , Thomas Bogendoerfer cc: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Bjorn Helgaas , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] MIPS: Malta: Fix PCI southbridge legacy resource reservations In-Reply-To: Message-ID: References: User-Agent: Alpine 2.21 (DEB 202 2017-01-01) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Covering the PCI southbridge legacy port I/O range with a northbridge=20 resource reservation prevents MIPS Malta platform code from claiming its=20 standard legacy resources. This is because request_resource() calls=20 cause a clash with the previous reservation and consequently fail. Change to using insert_resource() so as to prevent the clash, switching=20 the legacy reservations from: 00000000-00ffffff : MSC PCI I/O 00000020-00000021 : pic1 00000070-00000077 : rtc0 000000a0-000000a1 : pic2 [...] to: 00000000-00ffffff : MSC PCI I/O 00000000-0000001f : dma1 00000020-00000021 : pic1 00000040-0000005f : timer 00000060-0000006f : keyboard 00000070-00000077 : rtc0 00000080-0000008f : dma page reg 000000a0-000000a1 : pic2 000000c0-000000df : dma2 [...] Signed-off-by: Maciej W. Rozycki Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()") Cc: stable@vger.kernel.org # v6.18+ Acked-by: Thomas Bogendoerfer Reviewed-by: Ilpo J=C3=A4rvinen --- arch/mips/mti-malta/malta-setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) linux-mips-malta-setup-insert-resource.diff Index: linux-macro/arch/mips/mti-malta/malta-setup.c =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- linux-macro.orig/arch/mips/mti-malta/malta-setup.c +++ linux-macro/arch/mips/mti-malta/malta-setup.c @@ -213,7 +213,7 @@ void __init plat_mem_setup(void) =20 /* Request I/O space for devices used on the Malta board. */ for (i =3D 0; i < ARRAY_SIZE(standard_io_resources); i++) - request_resource(&ioport_resource, standard_io_resources+i); + insert_resource(&ioport_resource, standard_io_resources + i); =20 /* * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.