From nobody Mon Feb 9 03:46:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C34E2FA3742 for ; Sun, 30 Oct 2022 06:25:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230058AbiJ3GZr (ORCPT ); Sun, 30 Oct 2022 02:25:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229887AbiJ3GYJ (ORCPT ); Sun, 30 Oct 2022 02:24:09 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 170F610A; Sat, 29 Oct 2022 23:24:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667111048; x=1698647048; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NRy7ZqKX91pWNXtRhcY8rjR1ap8KYHXHj+9Nb/db+28=; b=kQ0dttyudbN8Ld5PhggJCy1rtRbVqqDVsRB2xeUXpqyxIgoZNTOsbbdc bnC0iRsvqA77cCWKyxokXKubLB7P738Cg/yC7spRjx0KblNTNaAMuTN8m EnWujYbK2Epp/U6mXj6n7Ag2dJO7F+u1ym+uUQlqx9LbTgikdN4rdXqfk JlTlQV4qpKePYna2M4LxalAdwe7YWyseec+ENeZdKjEby0BeYxW7oC9BF oJjxI7/Vlp1hTU+fp/HPmy3kalMeUpUsWPiGFrg8lXn1LUwvZ8iEu1409 IS2AUhV5JJ39X1ua6nVKQ8gzC/KridXPyp5KVILGC0ra5z7oLelaxN4kt w==; X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="395037144" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="395037144" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2022 23:24:02 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10515"; a="878392948" X-IronPort-AV: E=Sophos;i="5.95,225,1661842800"; d="scan'208";a="878392948" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Oct 2022 23:24:02 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack Subject: [PATCH v10 032/108] KVM: x86/mmu: Make sync_page not use hard-coded 0 as the initial SPTE value Date: Sat, 29 Oct 2022 23:22:33 -0700 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata FNAME(sync_page) in arch/x86/kvm/mmu/paging_tmpl.h assumes that the initial shadow page table entry (SPTE) is zero. Remove the assumption by using SHADOW_NONPRESENT_VALUE that will be updated from 0 to non-zero value. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/mmu/paging_tmpl.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h index 5ab5f94dcb6f..6db3f2b5563a 100644 --- a/arch/x86/kvm/mmu/paging_tmpl.h +++ b/arch/x86/kvm/mmu/paging_tmpl.h @@ -1036,7 +1036,8 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, st= ruct kvm_mmu_page *sp) gpa_t pte_gpa; gfn_t gfn; =20 - if (!sp->spt[i]) + /* spt[i] has initial value of shadow page table allocation */ + if (sp->spt[i] =3D=3D SHADOW_NONPRESENT_VALUE) continue; =20 pte_gpa =3D first_pte_gpa + i * sizeof(pt_element_t); --=20 2.25.1