From nobody Mon Feb 9 06:48:55 2026 Received: from mta-65-227.siemens.flowmailer.net (mta-65-227.siemens.flowmailer.net [185.136.65.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 098AE36B11 for ; Tue, 13 Aug 2024 06:05:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.65.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723529107; cv=none; b=fLG38its2eKWLB2n8q32qXwcOB3B/v54So+Ke7F2dZBNeIvrfChhBXx9jidWQ9Yf45WvJ4u09ezcdku/fUoR2jf3x87PBpcc666KRnh+llKnOu3k1zs7rNYQ4+TCNT4eZF9ykU3zCTvgxVcHHWlz13kNrKmZNCKnWwWLkRjZ4/s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723529107; c=relaxed/simple; bh=EyCKSez3LbFuR+m2ozHngTTkoAokq4OOqdOZvp9c6zk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bc+ZCIVKPGgRL1eiooQmv2iyV2ErwKyBcxr2qhVQU04+4Ks43i8zLg6qnLsZRdS8Nc7gbYwjB80vwgb0/8GfiWc0Ul3EkjNlpEScI31xtyHBBfkrl6QvlZ5E/++M3VsOjrq8aeBAM2H/TPupSutRMuVRCj9+QBcAEswYRpu+rcc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b=EuPhEBsf; arc=none smtp.client-ip=185.136.65.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b="EuPhEBsf" Received: by mta-65-227.siemens.flowmailer.net with ESMTPSA id 202408130605023910af7e817cdc2b02 for ; Tue, 13 Aug 2024 08:05:02 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=jan.kiszka@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=hZYakEfcZ+N1KAVTTOd/kQD4JofxMtxQELqh4JnQ7ho=; b=EuPhEBsfRgw5TI6JVKL1Z+6Z/cJEsjDjOr+V+tyWhmwa051CMRmWe6vESrQ7G+CoKg8jFi TsiTQ7DT3LpMzNILuvY6EY65gVOyWGa8TLFXjmSLwcig8bOTTnFG2+0CevNUrN4cEQTlVztN VbzHK55A6COv3gffDSfknqmqAVPjKiWk2vzMg/vfxp7if88/wECxzCLOJ9R4qZrkuM1pKaK+ AtQq7hmCPUV/6kPlZA1dgHTua24JNA0egn0jiGXzIXR4OGuy5klgU6N6ZMfuxInVUkv2ydJO bRsTAokiQlH1eFjd2xpDuVzcAasVSAQ0bx4+2ABspAwC3h1rQQRoCk0Q==; From: Jan Kiszka To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bao Cheng Su , Diogo Ivo Subject: [PATCH v3 2/3] dt-bindings: soc: ti: am645-system-controller: add child nodes used by main domain Date: Tue, 13 Aug 2024 08:04:59 +0200 Message-ID: In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-294854:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Jan Kiszka Expand bindings to cover both the MCU and the main usage of the AM654 system controller. Signed-off-by: Jan Kiszka --- .../soc/ti/ti,am654-system-controller.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/ti/ti,am654-system-contr= oller.yaml b/Documentation/devicetree/bindings/soc/ti/ti,am654-system-contr= oller.yaml index e79803e586ca..5a689ec3c5c9 100644 --- a/Documentation/devicetree/bindings/soc/ti/ti,am654-system-controller.y= aml +++ b/Documentation/devicetree/bindings/soc/ti/ti,am654-system-controller.y= aml @@ -29,11 +29,36 @@ properties: =20 ranges: true =20 + mux-controller: + type: object + ref: /schemas/mux/reg-mux.yaml# + description: + This is the SERDES lane control mux. + patternProperties: "^phy@[0-9a-f]+$": type: object $ref: /schemas/phy/ti,phy-gmii-sel.yaml# =20 + "^clock@[0-9a-f]+$": + type: object + $ref: /schemas/soc/ti/ti,am654-serdes-ctrl.yaml# + + "^dss-oldi-io-ctrl@[0-9a-f]+$": + type: object + $ref: /schemas/mfd/syscon.yaml# + properties: + compatible: + items: + - const: ti,am654-dss-oldi-io-ctrl + - const: syscon + + "^clock-controller@[0-9a-f]+$": + type: object + $ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml# + description: + Clock provider for TI EHRPWM nodes. + required: - compatible - reg --=20 2.43.0