From nobody Tue Apr 7 14:38:06 2026 Received: from mail-dl1-f44.google.com (mail-dl1-f44.google.com [74.125.82.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 769733F2110 for ; Thu, 12 Mar 2026 17:13:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.82.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773335621; cv=none; b=Se+zi9Qza0CJ+p8v5bXGoSIxJ4cds60TKouKeGQAvydtCXXkhaUIiUlWQfWrUgg8ItAMSgeavmjfnujBG96v7HofOpnhXAcr25bYXfxdwJZ3ciB74kg3MePQMY/HV7ReM10WyaYNTfVXYCXrqbTYZA4PmGnrPscX2JQlYFWqOuc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773335621; c=relaxed/simple; bh=HzyYpLWYdwjltSy6DaeuRCXQcwAKcINf1pQHnVARD1g=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=pzS0V9RzP/8V3/lk2OLCCJOdpXbOSw90+Xi+jbHwXOpF7x8auMu/5BaaZyvBGe6J8JCgayFyZc2ZjD7EjefmdjjxEvhrlfAzQg/uj4EbRw2Hs/dKrEK05LXxhoTB2i1P1vtwG/0uwxLLF9gmS0VmwJsUk4nIt+hsyrbezEnqV9U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wbinvd.org; spf=pass smtp.mailfrom=wbinvd.org; dkim=pass (2048-bit key) header.d=wbinvd.org header.i=@wbinvd.org header.b=V/jMaRhM; arc=none smtp.client-ip=74.125.82.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=wbinvd.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=wbinvd.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=wbinvd.org header.i=@wbinvd.org header.b="V/jMaRhM" Received: by mail-dl1-f44.google.com with SMTP id a92af1059eb24-12732e6a123so128462c88.1 for ; Thu, 12 Mar 2026 10:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=wbinvd.org; s=wbinvd; t=1773335617; x=1773940417; darn=vger.kernel.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=P2G1AlBOtI0pVNQJ415mQN+VxqBlOoCSVpFjY0Duwoo=; b=V/jMaRhMd5KeE8emF3dOw0EzDYGLKsgSiEjA8jsFhVYa2w0cqwWZuX+8RSC0ZLExsz 1jQpSddVw2cQfOAvmBcqFKMJsRwQ6IFPyss3U64gT/+K73Bd97vNaIT0cZN3C7bdpjAg rY28xvgQAS4uaJa7++kb/r+LIFlTFx69bzGFstJT+ch2dU1rMp+RmkRDhQu9sLLrlP+/ FeeJXEqUaz5/rPWWSZS0srbtF+9jjeEYcR/e4Kj0XOGDVss6WDTe2uVrjVJ2JCKWHZPA 2H+lnK2kzJkUcm8S07SqUie70n0wRzr4lgObmcWrlFAqkxdWMxllEze32TyMVydzCvQ8 7XHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1773335617; x=1773940417; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-gg:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P2G1AlBOtI0pVNQJ415mQN+VxqBlOoCSVpFjY0Duwoo=; b=oBcn8FvdozkPSb15U3Qou8SbObrhzVl0v/dCKP5t5BKqL09VjrQQsxKmLHS198sj8n p2vSVWamqs0DZyoeI8xyTBZfKL8NT/mA/OvqiK0e/Sc2UClYPFHb7/98YoS7D+sB8juY Y7HhTw+CuufVuRS07Mnryr0yL/+5+q+B+JMcKKphjXBgNc5IAKJXWIsJ/oiVOn3iNKmV UHMQHnSUr8te7hDe3j3jeduDl3VHZVuUTUauI5flUUb7oqmS1wIl75yJq5tzhh0ooSYn 2UgPRbDSxjPEiCs8zwaLtnt+Cfe3FuAF3TwPpsm+vDSzDKYvKh+ZNPeyfDanRo1CTMPE +O3g== X-Gm-Message-State: AOJu0YxWgwCjSc9cyltwUg1EXiTb8tVKDZkDu71zjvFz9MeKKFYx2UEE drsp5v/srCitfSWVditfPDIfeFJBApZ1v8lHvCWD6JMWQa8xklIOJg1a+CzW8do7NCuChW0/q80 vv0S3 X-Gm-Gg: ATEYQzybWzcBQ4DqgnPglwIs9Nm5h3JoA6ttheqW3sXtThTF/LdY1ghnen8f/m83VTz C4ZRHExJ7N717I+UglZ2IPMbz+G11Q6ubsw5dw+8cbEgeKf2z8IRyBbyayiBVbDJzNjpbtz91Ph Sq7vpy8wllfuAcx5HYomQ0kvNZiTVm7w/yctxSoIDvLvCxTUAjnwK1nrbzOs+j5SKtRudonMXv+ kKMszTw3Ti3tfxVa1atWMBRpnjW751owOi93rCULwhO+FSxVMVaxwWWE9kHiZn6ItaARFY1O+ec r+0iykkC6njKeunELWrmsDtpnDeSNahMpxmld+XZAcPNC4veLFBjEjOqnDt/UezhIfq/La8bMUT yVooTD4CdQc9h6Sey51JdIs6qxMY7aXb/nudnVxjAv++aeYVubelygz2Dl3SuklkO/yzJ2BAP+S UAhBttMDVLmfzWwyYF99tlxZg9 X-Received: by 2002:a05:7022:4397:b0:127:345c:439c with SMTP id a92af1059eb24-128f3e29d9dmr154759c88.45.1773335617192; Thu, 12 Mar 2026 10:13:37 -0700 (PDT) Received: from mozart.vkv.me ([2001:5a8:468b:d015:b160:d8b0:a73a:3f1]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-128e7ce52aasm9466780c88.15.2026.03.12.10.13.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Mar 2026 10:13:36 -0700 (PDT) Date: Thu, 12 Mar 2026 10:13:34 -0700 From: Calvin Owens To: linux-kernel@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, Charlene Liu , Ovidiu Bunea , Alex Hung , Dan Wheeler , Alex Deucher , Harry Wentland , Leo Li , Rodrigo Siqueira , Christian Koenig , David Airlie , Simona Vetter , llvm@lists.linux.dev Subject: [PATCH v2] drm/amd/display: Fix uninitialized variable use which breaks full LTO Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit e1b385726f7f ("drm/amd/display: Add additional checks for PSP footer size") introduced a use of an uninitialized stack variable in dm_dmub_sw_init() (region_params.bss_data_size). Interestingly, this seems to cause no issue on normal kernels. But when full LTO is enabled, it causes the compiler to "optimize" out huge swaths of amdgpu initialization code, and the driver is unusable: amdgpu 0000:03:00.0: [drm] Loading DMUB firmware via PSP: version=3D0x0= 7002F00 amdgpu 0000:03:00.0: sw_init of IP block failed 5 amdgpu 0000:03:00.0: amdgpu_device_ip_init failed amdgpu 0000:03:00.0: Fatal error during GPU init It surprises me that neither gcc nor clang emit a warning about this: I only found it by bisecting the LTO breakage. Fix by using the bss_data_size field from fw_meta_info_params, as was presumably intended. Fixes: e1b385726f7f ("drm/amd/display: Add additional checks for PSP footer= size") Signed-off-by: Calvin Owens Reviewed-by: Harry Wentland Reviewed-by: Nathan Chancellor --- Changes in v2: * Use fw_meta_info_params.bss_data_size instead of repeating the load from the payload header field [Nathan] drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gp= u/drm/amd/display/amdgpu_dm/amdgpu_dm.c index b3d6f2cd8ab6..0d1c772ef713 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -2553,9 +2553,9 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) fw_meta_info_params.bss_data_size =3D le32_to_cpu(hdr->bss_data_bytes); fw_meta_info_params.fw_inst_const =3D adev->dm.dmub_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes) + PSP_HEADER_BYTES_256; - fw_meta_info_params.fw_bss_data =3D region_params.bss_data_size ? adev->d= m.dmub_fw->data + + fw_meta_info_params.fw_bss_data =3D fw_meta_info_params.bss_data_size ? a= dev->dm.dmub_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes) + le32_to_cpu(hdr->inst_const_bytes) : NULL; fw_meta_info_params.custom_psp_footer_size =3D 0; =20 --=20 2.47.3