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Wed, 7 Aug 2024 12:00:19 -0700 From: Nicolin Chen To: , , CC: , , , , , Subject: [PATCH v3 2/4] iommu/dma: Support MSIs through nested domains Date: Wed, 7 Aug 2024 12:00:05 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE0:EE_|CH3PR12MB8306:EE_ X-MS-Office365-Filtering-Correlation-Id: e9349ec6-1396-48ea-69dc-08dcb7133a68 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?eWivJcjjzqjmdN2BhNKT7xdKOKrZcLS8UDM3dduUOU2gc4PBheNWSAJUavuF?= =?us-ascii?Q?Adz/l/JTVtg8vehbJfooawNMKXkVynwWnd1zkuqdt5OYiaghKZifopmAPBp0?= =?us-ascii?Q?mpEavj8xlklHV6wIOJ9AkEF/ccgO0F4Qt8zFYKb6juQp6lA7kxABwyKXaKrl?= =?us-ascii?Q?YTecb8pP2ULJwygdZs752DQRiUgjofhHXdUZjPBMmzrxJR/SX84XM+ip8KPO?= =?us-ascii?Q?b7etUeWm0AiYq27lMlbhJf1MylpMUfInLTvKe90rGTwm/bPmGtY9QGqPHOcR?= =?us-ascii?Q?mjRVnQWNHG6tcMcUskYW0wyIZBXwgVC7D12hWDTsmq/MrKdL5zkK7PIIUOrP?= =?us-ascii?Q?diIe1lgcUXHz/555ElzbLirS1qyYTDoy4aJsYDOJ0cQ97HriV4MtMerCuprL?= =?us-ascii?Q?LVAZw9SlVndGTxjRkrc4OsstDghoaNefb8icJMWbeai73jWTK6hqdNm5N1/3?= =?us-ascii?Q?vF66fNvh1fj2Ng8m+OkKr13HF7xP1xH5VO5qvFc6SjEtvcdDs9yJVu9JdKD5?= =?us-ascii?Q?iILLRjErWG1wCkggqacYUixtIhxmDRIvyJlBVF0B3f2K2kl1xPIpdWiY+kj/?= =?us-ascii?Q?O8rNvC+hl1LWrj7KMrw0HJujjdTWYRPCZLPFE4uD8iIDaToxvMJzB/NMLprP?= =?us-ascii?Q?ez1U322RaJFlZt3TzPbFMJlJDITgrXzGpnX+kNSuknU9K2Hh37C/g5/YzeXT?= =?us-ascii?Q?cTowGf5RV0Uffx8V09dC6+h/PJQzbbEctHfkRZFF28zgWKwMzPovjhv/b1VO?= =?us-ascii?Q?ju4OHffMSK+17HWujO8n4IGJd1piXE7A/lDRgH/bugGNCRwlxIqcYUhV/92B?= =?us-ascii?Q?wC6OwuH8wl7wAEI8kSuOvwJNIZi9tYDKV+XwToGhMRZwkYzYN4OqgNQ/yBgZ?= =?us-ascii?Q?MGfsygBH1X9svcgdFclp+tGyyc3U1aS5wDyZrCTEX96m4ubgp3ukFP/MwfIe?= =?us-ascii?Q?x9HhfIPi9lZzpqxwY2+9EWd4f9m5Zj0x7s2/iXN0dG4zJmFHKeSbpUmKvJMU?= =?us-ascii?Q?t8fvUrygYNGKreRt0JHCOZ6sIyGZcdHOI7T1TaDSYS0QompC0UKWUrAQBS+I?= =?us-ascii?Q?OKXViR9SbxrJnshK0tKB7fnTMXVMLBMvlxMqZ+Mnsq3XFHyz3EL1GxxMJdYe?= =?us-ascii?Q?5A6Jk+U2ex1vtoilDtpC9QtvdmfGQHN8KgFjHwYuxB8uGlOYfhcVLWLzGvUV?= =?us-ascii?Q?RNIY6M9UKtMGblX0mdnkFamPIhod8d+OMbJCFoH+YKj7OztnVX7S6eDLU70m?= =?us-ascii?Q?fsVh9hs/1l8nRZ+sdKecJu1wydVebzpLT1ob3GrTbucB15Cc4VB18YgKiFBN?= =?us-ascii?Q?Lacxr9qT5KULe6qi3jG35tciG2Ki1IzU6uYq5923De9HDXrZGgNi/RanXrS2?= =?us-ascii?Q?Y+nS01Ae2RsPX+VGvu/INfv6E8dMXkFvp9m6LqQcRTf+v/ZopNxE9AyHEwTY?= =?us-ascii?Q?wdFpoq82WuYGL7+xcbNpWEXBakCDf3q+?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Aug 2024 19:00:39.1482 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e9349ec6-1396-48ea-69dc-08dcb7133a68 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8306 Content-Type: text/plain; charset="utf-8" From: Robin Murphy Currently, iommu-dma is the only place outside of IOMMUFD and drivers which might need to be aware of the stage 2 domain encapsulated within a nested domain. This would be still the RMR solution where we're using host-managed MSIs with an identity mapping at stage 1, where it is the underlying stage 2 domain which owns an MSI cookie and holds the corresponding dynamic mappings. Hook up the new op to resolve what we need from a nested domain. Signed-off-by: Robin Murphy Signed-off-by: Nicolin Chen --- drivers/iommu/dma-iommu.c | 18 ++++++++++++++++-- include/linux/iommu.h | 4 ++++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 7b1dfa0665df..5b21be04e04a 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -1799,6 +1799,20 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_= page(struct device *dev, return NULL; } =20 +/* + * Nested domains may not have an MSI cookie or accept mappings, but they = may + * be related to a domain which does, so we let them tell us what they nee= d. + */ +static struct iommu_domain *iommu_dma_get_msi_mapping_domain(struct device= *dev) +{ + struct iommu_domain *domain =3D iommu_get_domain_for_dev(dev); + + if (domain && domain->type =3D=3D IOMMU_DOMAIN_NESTED && + domain->ops && domain->ops->get_msi_mapping_domain) + domain =3D domain->ops->get_msi_mapping_domain(domain); + return domain; +} + /** * iommu_dma_prepare_msi() - Map the MSI page in the IOMMU domain * @desc: MSI descriptor, will store the MSI page @@ -1809,7 +1823,7 @@ static struct iommu_dma_msi_page *iommu_dma_get_msi_p= age(struct device *dev, int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr) { struct device *dev =3D msi_desc_to_dev(desc); - struct iommu_domain *domain =3D iommu_get_domain_for_dev(dev); + struct iommu_domain *domain =3D iommu_dma_get_msi_mapping_domain(dev); struct iommu_dma_msi_page *msi_page; static DEFINE_MUTEX(msi_prepare_lock); /* see below */ =20 @@ -1842,7 +1856,7 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys= _addr_t msi_addr) void iommu_dma_compose_msi_msg(struct msi_desc *desc, struct msi_msg *msg) { struct device *dev =3D msi_desc_to_dev(desc); - const struct iommu_domain *domain =3D iommu_get_domain_for_dev(dev); + const struct iommu_domain *domain =3D iommu_dma_get_msi_mapping_domain(de= v); const struct iommu_dma_msi_page *msi_page; =20 msi_page =3D msi_desc_get_iommu_cookie(desc); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index b0323290cb6c..20a40fd6c4ba 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -684,6 +684,8 @@ struct iommu_ops { * specific mechanisms. * @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*) * @free: Release the domain after use. + * @get_msi_mapping_domain: Return the related iommu_domain that should ho= ld the + * MSI cookie and accept mapping(s). */ struct iommu_domain_ops { int (*attach_dev)(struct iommu_domain *domain, struct device *dev); @@ -713,6 +715,8 @@ struct iommu_domain_ops { unsigned long quirks); =20 void (*free)(struct iommu_domain *domain); + struct iommu_domain * + (*get_msi_mapping_domain)(struct iommu_domain *domain); }; =20 /** --=20 2.43.0