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Thu, 07 Sep 2023 05:23:50 -0700 (PDT) Received: from ubuntu.myguest.virtualbox.org ([223.178.252.251]) by smtp.gmail.com with ESMTPSA id jl1-20020a170903134100b001c32fd9e412sm8060207plb.58.2023.09.07.05.23.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Sep 2023 05:23:49 -0700 (PDT) Date: Thu, 7 Sep 2023 17:53:44 +0530 From: Pavan Bobba To: Forest Bond , Michael Straube , Philipp Hortmann Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2] staging: vt6655: array names updated as per kernel coding guidelines Message-ID: MIME-Version: 1.0 Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Below array names updated as per coding guidelines: 1.byVT3253B0_AGC4_RFMD2959 2.byVT3253B0_AIROHA2230 3.byVT3253B0_UW2451 4.byVT3253B0_AGC Conversions performed: a.type encoding info dropped from names b.names replaced by snakecase Issue found by checkpatch Signed-off-by: Pavan Bobba --- v1 -> v2: 1.subject name modified to more meaningful detail 2.name of the tool added in body of explanation,=20 which found this issue =20 drivers/staging/vt6655/baseband.c | 32 +++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/bas= eband.c index 696d4dd03aa2..55224918794b 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -761,7 +761,7 @@ static const unsigned char vt3253b0_rfmd[CB_VT3253B0_IN= IT_FOR_RFMD][2] =3D { #define CB_VT3253B0_AGC_FOR_RFMD2959 195 /* For RFMD2959 */ static -unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = =3D { +unsigned char vt3253b0_agc4_rfmd2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] =3D { {0xF0, 0x00}, {0xF1, 0x3E}, {0xF0, 0x80}, @@ -962,7 +962,7 @@ unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_= FOR_RFMD2959][2] =3D { #define CB_VT3253B0_INIT_FOR_AIROHA2230 256 /* For AIROHA */ static -unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = =3D { +unsigned char vt3253b0_airoha2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] =3D { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, @@ -1223,7 +1223,7 @@ unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_= FOR_AIROHA2230][2] =3D { =20 #define CB_VT3253B0_INIT_FOR_UW2451 256 /* For UW2451 */ -static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] =3D= { +static unsigned char vt3253b0_uw2451[CB_VT3253B0_INIT_FOR_UW2451][2] =3D { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, @@ -1484,7 +1484,7 @@ static unsigned char byVT3253B0_UW2451[CB_VT3253B0_IN= IT_FOR_UW2451][2] =3D { =20 #define CB_VT3253B0_AGC 193 /* For AIROHA */ -static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] =3D { +static unsigned char vt3253b0_agc[CB_VT3253B0_AGC][2] =3D { {0xF0, 0x00}, {0xF1, 0x00}, {0xF0, 0x80}, @@ -2010,8 +2010,8 @@ bool bb_vt3253_init(struct vnt_private *priv) =20 for (ii =3D 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AGC4_RFMD2959[ii][0], - byVT3253B0_AGC4_RFMD2959[ii][1]); + vt3253b0_agc4_rfmd2959[ii][0], + vt3253b0_agc4_rfmd2959[ii][1]); =20 iowrite32(0x23, iobase + MAC_REG_ITRTMSET); vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0)); @@ -2027,12 +2027,12 @@ bool bb_vt3253_init(struct vnt_private *priv) } else if ((by_rf_type =3D=3D RF_AIROHA) || (by_rf_type =3D=3D RF_AL2230S= )) { for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AIROHA2230[ii][0], - byVT3253B0_AIROHA2230[ii][1]); + vt3253b0_airoha2230[ii][0], + vt3253b0_airoha2230[ii][1]); =20 for (ii =3D 0; ii < CB_VT3253B0_AGC; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], vt3253b0_agc[ii][1]); =20 priv->abyBBVGA[0] =3D 0x1C; priv->abyBBVGA[1] =3D 0x10; @@ -2045,13 +2045,13 @@ bool bb_vt3253_init(struct vnt_private *priv) } else if (by_rf_type =3D=3D RF_UW2451) { for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_UW2451[ii][0], - byVT3253B0_UW2451[ii][1]); + vt3253b0_uw2451[ii][0], + vt3253b0_uw2451[ii][1]); =20 for (ii =3D 0; ii < CB_VT3253B0_AGC; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], - byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], + vt3253b0_agc[ii][1]); =20 iowrite8(0x23, iobase + MAC_REG_ITRTMSET); vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0)); @@ -2067,12 +2067,12 @@ bool bb_vt3253_init(struct vnt_private *priv) } else if (by_rf_type =3D=3D RF_VT3226) { for (ii =3D 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AIROHA2230[ii][0], - byVT3253B0_AIROHA2230[ii][1]); + vt3253b0_airoha2230[ii][0], + vt3253b0_airoha2230[ii][1]); =20 for (ii =3D 0; ii < CB_VT3253B0_AGC; ii++) result &=3D bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], vt3253b0_agc[ii][1]); =20 priv->abyBBVGA[0] =3D 0x1C; priv->abyBBVGA[1] =3D 0x10; --=20 2.34.1