From nobody Fri Sep 12 08:55:19 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 205701DE2B7 for ; Mon, 10 Mar 2025 19:57:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741636659; cv=none; b=HpEa3wiOh2PLgzIcvn4cjZzJBeKQTyTfenhio/Rv97HLP5hE2wScEGUqz926exElwR1VGRZBCiGBbsTTQFRM9kySAOAaOk8O51gj/yWXV6egN0V7jWIwbDLPT9Rj2yF2YAjh1Kx7hotJZ3Be8UjWW5+nzqSKmaJh6ykj7ATCGt0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741636659; c=relaxed/simple; bh=gvxzhoJfSX0lwiy5Xoch2jD4n6RdeAyr35M+Es7fqts=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition; b=E/M5FPJjMZEJu/UITXeBG8JQ7hQ/6c3PWFTknMfhi2cnReOTmHMnixDgBmnGH+RmAxcEnGy5JptEkYGOrs2P8UMwGhAnuVbWAFGiIJAY5wkUyr4J6DJkxOO68fByOz7ux0aE8Zh3jQZfdl6TLZrAEZnwhSg8k4/P5cBktX8QCIU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OSA8pTSf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OSA8pTSf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6F07AC4CEED; Mon, 10 Mar 2025 19:57:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1741636658; bh=gvxzhoJfSX0lwiy5Xoch2jD4n6RdeAyr35M+Es7fqts=; h=Date:From:To:Cc:Subject:From; b=OSA8pTSflVERMP0kWMfBAYITBNBh/UdSdee3xypC7tKwUmeIk5pk+65uK0qrG7QUr /8PCoiMRn6tW4E1vZknGEj1vLcKa8/ubouzdQMsTqGizf+c9jOkxV9uE3HH40F3UCO HH+4esb6SFr0x4mpTUH2wC5vptqda5gj8LBwAObu+KHUDRAWVV+Ehwcit9cCadpDgD DKgTaCyBJQ37MXunPgpgR7cKSg7onPgu9WuTWalUlWvJO+s2oxjbJ2bfJdg4nvTrs9 pf83mQ8KbPy+u/Mgw8xE2y98LKOTEdEsYB077H0JqSTGwq6DqZkg1yLoxQCCN+tSgA /kA0cv84LDH3A== Date: Mon, 10 Mar 2025 20:57:34 +0100 From: Ingo Molnar To: Linus Torvalds Cc: linux-kernel@vger.kernel.org, Thomas Gleixner , Borislav Petkov , Dave Hansen , Peter Zijlstra , Andrew Morton , "H. Peter Anvin" , x86@kernel.org Subject: [GIT PULL] x86 fixes Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Linus, Please pull the latest x86/urgent Git tree from: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-202= 5-03-10 # HEAD: e3e89178a9f4a80092578af3ff3c8478f9187d59 x86/microcode/AMD: Fix = out-of-bounds on systems with CPU-less NUMA nodes Two x86 fixes: - Fix out-of-bounds access on CPU-less AMD NUMA systems by the microcode code. - Make the kernel SGX CPU init code less passive-aggressive about non-working SGX features, instead of silently keeping the driver disabled, this is something people are running into. This doesn't affect functionality, it's a sysadmin QoL fix. Thanks, Ingo ------------------> Florent Revest (1): x86/microcode/AMD: Fix out-of-bounds on systems with CPU-less NUMA no= des Vladis Dronov (1): x86/sgx: Warn explicitly if X86_FEATURE_SGX_LC is not enabled arch/x86/kernel/cpu/microcode/amd.c | 2 +- arch/x86/kernel/cpu/sgx/driver.c | 10 +++++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index c69b1bc45483..138689b8e1d8 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -1074,7 +1074,7 @@ static enum ucode_state load_microcode_amd(u8 family,= const u8 *data, size_t siz if (ret !=3D UCODE_OK) return ret; =20 - for_each_node(nid) { + for_each_node_with_cpus(nid) { cpu =3D cpumask_first(cpumask_of_node(nid)); c =3D &cpu_data(cpu); =20 diff --git a/arch/x86/kernel/cpu/sgx/driver.c b/arch/x86/kernel/cpu/sgx/dri= ver.c index 22b65a5f5ec6..7f8d1e11dbee 100644 --- a/arch/x86/kernel/cpu/sgx/driver.c +++ b/arch/x86/kernel/cpu/sgx/driver.c @@ -150,13 +150,15 @@ int __init sgx_drv_init(void) u64 xfrm_mask; int ret; =20 - if (!cpu_feature_enabled(X86_FEATURE_SGX_LC)) + if (!cpu_feature_enabled(X86_FEATURE_SGX_LC)) { + pr_info("SGX disabled: SGX launch control CPU feature is not available, = /dev/sgx_enclave disabled.\n"); return -ENODEV; + } =20 cpuid_count(SGX_CPUID, 0, &eax, &ebx, &ecx, &edx); =20 if (!(eax & 1)) { - pr_err("SGX disabled: SGX1 instruction support not available.\n"); + pr_info("SGX disabled: SGX1 instruction support not available, /dev/sgx_= enclave disabled.\n"); return -ENODEV; } =20 @@ -173,8 +175,10 @@ int __init sgx_drv_init(void) } =20 ret =3D misc_register(&sgx_dev_enclave); - if (ret) + if (ret) { + pr_info("SGX disabled: Unable to register the /dev/sgx_enclave driver (%= d).\n", ret); return ret; + } =20 return 0; }