From nobody Tue Apr 16 19:04:46 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A754AC433FE for ; Mon, 23 May 2022 22:16:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230060AbiEWWQ6 (ORCPT ); Mon, 23 May 2022 18:16:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229522AbiEWWQ5 (ORCPT ); Mon, 23 May 2022 18:16:57 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B313978929; Mon, 23 May 2022 15:16:56 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id s14so14283397plk.8; Mon, 23 May 2022 15:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:cc:subject:message-id:mime-version:content-disposition; bh=pJTRgXjYxPKGivC1ddsBnyqDyotE4GS4vzjjb/S5WBE=; b=ESCC6/40VtCzAGtorsLZn0r0V2dBdWiAOt/cG6gTdpQvsDw+mGlgVg7Rk53aHsoQQp 0+uIQkSr3+LV3ofNC3mJgx8gX9WwjMSSnmnZddXeQKgw56PdhYP6Dpkq7qNvcqOfJqdv T7SdjCVb57q7FlX/b0P0C7c5IJDFGC2tczw4YqAlFOIc7KvyWtLLtVdSccSr234CejTZ /zPS5dQ3UeU2+8yW1jlkkiuqf4goS0Lz/gAX8rZ5QdmW7/pF94+serdUK5wna9OzJ/gb /RRupefhXyaSG4Ep9gxcObKqnFHrT/5dS5XIwIukTLs3fzer6b5uHSKFz2pWYneFUqUa Wp8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:mime-version :content-disposition; bh=pJTRgXjYxPKGivC1ddsBnyqDyotE4GS4vzjjb/S5WBE=; b=eDTwiql2C2rmUmBwa0s7bqfoMku8ACch4yFs5Sp1AUhLan/UmGLxAFP/9OuGrcs8GH qcvqvhlZymf91fnMKyVmUUlB6Vzy3E7DgXOuKHwWmDM/ORA4QPTTdtgJEdZhM97iSs+X DvdDCh5D5erYYpSZRhBS9HaKiNHo6yZF2AXVaoqNXZCC3MOJdZKr1Y3Zbql8cL73R1WL PSVOJC2YLrl2pJ1boNZtEo7MpftX6VPKxTqyYaN8MaoVtZL21UVY2cZpTrVllAC9bT2D rSAFmZlgalH3/oIcmDi+7XzNBgm4pFcgnjH1faevvJu1Vv0h7p/ciCFw/YNYStoGmzDT EoNQ== X-Gm-Message-State: AOAM5306L2Xzbx2nvymB0JSwbcYqi6V/Th2xZGiRdQh8cixuQI8r/G2b 04ucGWPm4DkTDwkAL6nXPhyTrhHyUeo= X-Google-Smtp-Source: ABdhPJzOKCF/I42KUqWTL8cfnDA/0/qAdvt/GNLcSeZ9wgnwBO24anbaidWzuyLvAGG0ZvkiJfSv4A== X-Received: by 2002:a17:90a:aa8c:b0:1df:359a:1452 with SMTP id l12-20020a17090aaa8c00b001df359a1452mr1170029pjq.75.1653344213190; Mon, 23 May 2022 15:16:53 -0700 (PDT) Received: from google.com ([2620:15c:202:201:ce25:f34f:c90d:61fa]) by smtp.gmail.com with ESMTPSA id ck18-20020a17090afe1200b001cb6527ca39sm214063pjb.0.2022.05.23.15.16.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 May 2022 15:16:52 -0700 (PDT) Date: Mon, 23 May 2022 15:16:49 -0700 From: Dmitry Torokhov To: linux-input@vger.kernel.org Cc: Mattijs Korpershoek , AngeloGioacchino Del Regno , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] Input: mtk-pmic-keys - use single update when configuring long press behavior Message-ID: MIME-Version: 1.0 Content-Disposition: inline Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Instead of doing 3 read-modify-write operations when configuring behavior of long-press, consolidate everything into one. Signed-off-by: Dmitry Torokhov Reviewed-by: Mattijs Korpershoek Tested-by: Mattijs Korpershoek # on mt8183-pump= kin --- drivers/input/keyboard/mtk-pmic-keys.c | 71 ++++++++++---------------- 1 file changed, 28 insertions(+), 43 deletions(-) diff --git a/drivers/input/keyboard/mtk-pmic-keys.c b/drivers/input/keyboar= d/mtk-pmic-keys.c index c31ab4368388..d2f0db245ff6 100644 --- a/drivers/input/keyboard/mtk-pmic-keys.c +++ b/drivers/input/keyboard/mtk-pmic-keys.c @@ -18,17 +18,11 @@ #include #include =20 -#define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1 -#define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6 -#define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1 -#define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5 -#define MTK_PMIC_RST_DU_MASK 0x3 -#define MTK_PMIC_RST_DU_SHIFT 8 - -#define MTK_PMIC_PWRKEY_RST \ - (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT) -#define MTK_PMIC_HOMEKEY_RST \ - (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT) +#define MTK_PMIC_RST_DU_MASK GENMASK(9, 8) +#define MTK_PMIC_RST_DU_SHIFT 8 +#define MTK_PMIC_RST_KEY_MASK GENMASK(6, 5) +#define MTK_PMIC_PWRKEY_RST BIT(6) +#define MTK_PMIC_HOMEKEY_RST BIT(5) =20 #define MTK_PMIC_PWRKEY_INDEX 0 #define MTK_PMIC_HOMEKEY_INDEX 1 @@ -108,53 +102,44 @@ enum mtk_pmic_keys_lp_mode { }; =20 static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, - u32 pmic_rst_reg) + u32 pmic_rst_reg) { - int ret; u32 long_press_mode, long_press_debounce; + u32 value, mask; + int error; =20 - ret =3D of_property_read_u32(keys->dev->of_node, - "power-off-time-sec", &long_press_debounce); - if (ret) + error =3D of_property_read_u32(keys->dev->of_node, "power-off-time-sec", + &long_press_debounce); + if (error) long_press_debounce =3D 0; =20 - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT, - long_press_debounce << MTK_PMIC_RST_DU_SHIFT); + mask =3D MTK_PMIC_RST_DU_MASK; + value =3D long_press_debounce << MTK_PMIC_RST_DU_SHIFT; =20 - ret =3D of_property_read_u32(keys->dev->of_node, - "mediatek,long-press-mode", &long_press_mode); - if (ret) + error =3D of_property_read_u32(keys->dev->of_node, + "mediatek,long-press-mode", + &long_press_mode); + if (error) long_press_mode =3D LP_DISABLE; =20 switch (long_press_mode) { - case LP_ONEKEY: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - MTK_PMIC_PWRKEY_RST); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - 0); - break; case LP_TWOKEY: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - MTK_PMIC_PWRKEY_RST); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - MTK_PMIC_HOMEKEY_RST); - break; + value |=3D MTK_PMIC_HOMEKEY_RST; + fallthrough; + + case LP_ONEKEY: + value |=3D MTK_PMIC_PWRKEY_RST; + fallthrough; + case LP_DISABLE: - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_PWRKEY_RST, - 0); - regmap_update_bits(keys->regmap, pmic_rst_reg, - MTK_PMIC_HOMEKEY_RST, - 0); + mask |=3D MTK_PMIC_RST_KEY_MASK; break; + default: break; } + + regmap_update_bits(keys->regmap, pmic_rst_reg, mask, value); } =20 static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) --=20 2.36.1.124.g0e6072fb45-goog --=20 Dmitry