From nobody Tue Feb 10 05:10:12 2026 Received: from out28-49.mail.aliyun.com (out28-49.mail.aliyun.com [115.124.28.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 05C7043CEE4 for ; Tue, 20 Jan 2026 14:00:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.124.28.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768917627; cv=none; b=F1KUFzObWZhJI0SdWyB5JejtBvNa1e65EqByI2z0BRWk7waFXfBfL0jhKGPgJ6TOJ3wuYOvWWtAjlxXLmpS8fAFY5aqSl+G8i0fTamP6oNl3jv7UAazeAtK9LgFF5Sbzy+mNykfU1Rnbpr8lvg1j7HhxMG3ckW8veGxmE15T7a8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768917627; c=relaxed/simple; bh=qV7sFD7d2CwKszwpDUJ+ikOh03YHTFWwVwq9ObTPQu4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NprBOBjXnlQd0eGZymEH5wfsFrOI5HGJB489H/AJmHifhUuY5oFI65fUQAtfNqd8BWr3tar+VwAQm542SuVzOtrW2cBkemDd6KAJm4OCljxTuC8DDFU6E2TEGHasBB3p4cmG9XuO5DEODvIEpwfrUjXzznpyoO/lNfuZR/NwoUg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=antgroup.com; spf=pass smtp.mailfrom=antgroup.com; dkim=pass (1024-bit key) header.d=antgroup.com header.i=@antgroup.com header.b=iI73HzZz; arc=none smtp.client-ip=115.124.28.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=antgroup.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=antgroup.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=antgroup.com header.i=@antgroup.com header.b="iI73HzZz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=antgroup.com; s=default; t=1768917617; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=sTkVCVZTjPf1c3AyREStwj7y7AWARz4AUrAqG2zGhTA=; b=iI73HzZz6NkLWL+pGAJNG06MeC4gmiN9lrMeRu56/KVaKcBv0dE1X44cIj73yzlTEZCIUYru9YOPnmLmgSvzPIIPaSxfZBq4EAnr5julMT9/fbJ7ptxnejgHBFV6C9oGJ/wdK4dVi5DNBATA36sHhtdXKfuGfMJa8fkIY77yTHU= Received: from localhost(mailfrom:houwenlong.hwl@antgroup.com fp:SMTPD_---.gBJ4V-6_1768916682 cluster:ay29) by smtp.aliyun-inc.com; Tue, 20 Jan 2026 21:44:42 +0800 From: Hou Wenlong To: linux-kernel@vger.kernel.org Cc: Hou Wenlong , Rik van Riel , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" Subject: [PATCH v2 3/4] x86/mm: Correct the actual size of ASID range Date: Tue, 20 Jan 2026 21:44:29 +0800 Message-Id: <9feb4672b89ba928fe16cb43eb9602dd9392040f.1768900340.git.houwenlong.hwl@antgroup.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As noted in the comment, 'MAX_ASID_AVAILABLE' represents the maximum valid ASID, i.e., the valid ASID range is '[0, MAX_ASID_AVAILABLE]'. Therefore, the actual size of the ASID range should be 'MAX_ASID_AVAILABLE + 1', as it is zero-based. However, global ASID allocation uses this value as the size of the bitmap, which results in the maximum ASID being excluded from global ASID allocation. To address this issue, redefine the 'MAX_ASID_AVAILABLE' as the size of ASID range. Reviewed-by: Rik van Riel Signed-off-by: Hou Wenlong --- arch/x86/mm/tlb.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index a1e217a382d1..a7dbf784efd9 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c @@ -104,18 +104,17 @@ #define CR3_AVAIL_PCID_BITS (X86_CR3_PCID_BITS - PTI_CONSUMED_PCID_BITS) =20 /* - * ASIDs are zero-based: 0->MAX_AVAIL_ASID are valid. -1 below to account - * for them being zero-based. Another -1 is because PCID 0 is reserved for - * use by non-PCID-aware users. + * ASIDs are zero-based: 0->MAX_ASID_AVAILABLE-1 are valid. -1 is because + * PCID 0 is reserved for use by non-PCID-aware users. */ -#define MAX_ASID_AVAILABLE ((1 << CR3_AVAIL_PCID_BITS) - 2) +#define MAX_ASID_AVAILABLE ((1 << CR3_AVAIL_PCID_BITS) - 1) =20 /* * Given @asid, compute kPCID */ static inline u16 kern_pcid(u16 asid) { - VM_WARN_ON_ONCE(asid > MAX_ASID_AVAILABLE); + VM_WARN_ON_ONCE(asid >=3D MAX_ASID_AVAILABLE); =20 #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION /* --=20 2.31.1