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charset="utf-8" From: Chen Wang Sophgo SG2042 contains a PWM controller, which has 4 channels and can generate PWM waveforms output. Signed-off-by: Chen Wang Reviewed-by: Krzysztof Kozlowski --- .../bindings/pwm/sophgo,sg2042-pwm.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm= .yaml diff --git a/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml b= /Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml new file mode 100644 index 000000000000..5dea41fa4c44 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/sophgo,sg2042-pwm.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/sophgo,sg2042-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 PWM controller + +maintainers: + - Chen Wang + +description: + This controller contains 4 channels which can generate PWM waveforms. + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: sophgo,sg2042-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb + + resets: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + +unevaluatedProperties: false + +examples: + - | + #include + + pwm@7f006000 { + compatible =3D "sophgo,sg2042-pwm"; + reg =3D <0x7f006000 0x1000>; + #pwm-cells =3D <2>; + clocks =3D <&clock 67>; + clock-names =3D "apb"; + resets =3D <&rstgen RST_PWM>; + }; --=20 2.34.1