From nobody Thu Apr 2 17:15:13 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9B2838A9DF for ; Tue, 10 Feb 2026 22:13:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770761621; cv=none; b=cp1OYQ16tAgHHOxCKH/Nv3grWd1PeLMNWOzC7Znesl798wAGFGzL/HyPbiHecQnX8bz3NrsTxqYGGKxXKWHn8kUZIPQm7nXQxei+9eNZiMSwEEc0QDKnD2VRfayA20dojntY8tiCBqJdHEUX3dDwaOFY8DHV5enksdsNKDZ2MyE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770761621; c=relaxed/simple; bh=nZHFDOb9VWAdLlbvPBVHD2UPMHAPV9s16xdLaYp6e4A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DMuVgmYu5/gUN6ygUrdnPsqtnb6Zyjo72hARgcoipYKLsv/hvQ0Vk0cDnV60bYoAJF4eHFsZycGcfY0sP5DDoIBOYI0NmlRWoTBRPfUCDII8KBKrAPA4KcFZnvS5fKu+WqeW6LlhqHwOslT1k/xY6Yl18mqHPwSlN/PrpAkr6dw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dB+RxgXV; arc=none smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dB+RxgXV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770761619; x=1802297619; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nZHFDOb9VWAdLlbvPBVHD2UPMHAPV9s16xdLaYp6e4A=; b=dB+RxgXVGuzBBXF95swyQl8T270h1ABo9VtzHcMGGZwhxznbuCJ5Hdmn /gzCrhZVBti+lmlg0aBc8s82QbyV6eLhQDbGyke61ZSt1Cb6NWAy4NnaA RwWo4d66cQ4JZSonKj4KUo0oPXNQayyKlPKzs+5Sz+E+rxSoh2aAa3Uht Cjeh+oVFo4edxLnXZgWGfv90197RlTryXT8GiQByqvnDrEyE5cVbkFtQ1 cnHY1qjkpElXdt7kBWaFfXzujG/Gu0QNuJLElaOQimQYmYHP7HzdlL1vE izdb5/eTsBd7bHEsIe5ki9NXpwzg0fEtsQ4mnEAt0Ap2xwXbrYf2ZPCxA Q==; X-CSE-ConnectionGUID: HsPNimK2QeSODCud0dW5Hw== X-CSE-MsgGUID: ujHoP/TPRw2ZV+OyFfB0cQ== X-IronPort-AV: E=McAfee;i="6800,10657,11697"; a="82631547" X-IronPort-AV: E=Sophos;i="6.21,283,1763452800"; d="scan'208";a="82631547" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2026 14:13:39 -0800 X-CSE-ConnectionGUID: NHqepHf5TX26sK7KhXnhcA== X-CSE-MsgGUID: 0nNW0XZzQSypqvmedbXkAQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,283,1763452800"; d="scan'208";a="216374017" Received: from b04f130c83f2.jf.intel.com ([10.165.154.98]) by fmviesa004.fm.intel.com with ESMTP; 10 Feb 2026 14:13:37 -0800 From: Tim Chen To: Peter Zijlstra , Ingo Molnar , K Prateek Nayak , "Gautham R . Shenoy" , Vincent Guittot Cc: Chen Yu , Juri Lelli , Dietmar Eggemann , Steven Rostedt , Ben Segall , Mel Gorman , Valentin Schneider , Madadi Vineeth Reddy , Hillf Danton , Shrikanth Hegde , Jianyong Wu , Yangyu Chen , Tingyin Duan , Vern Hao , Vern Hao , Len Brown , Tim Chen , Aubrey Li , Zhao Liu , Chen Yu , Adam Li , Aaron Lu , Tim Chen , Josh Don , Gavin Guo , Qais Yousef , Libo Chen , linux-kernel@vger.kernel.org Subject: [PATCH v3 16/21] sched/cache: Avoid cache-aware scheduling for memory-heavy processes Date: Tue, 10 Feb 2026 14:18:56 -0800 Message-Id: <9f2c28aa9d981ee17ce7d2db0d4b883954b1e71c.1770760558.git.tim.c.chen@linux.intel.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen Yu Prateek and Tingyin reported that memory-intensive workloads (such as stream) can saturate memory bandwidth and caches on the preferred LLC when sched_cache aggregates too many threads. To mitigate this, estimate a process's memory footprint by comparing its RSS (anonymous and shared pages) to the size of the LLC. If RSS exceeds the LLC size, skip cache-aware scheduling. Note that RSS is only an approximation of the memory footprint. By default, the comparison is strict, but a later patch will allow users to provide a hint to adjust this threshold. According to the test from Adam, some systems do not have shared L3 but with shared L2 as clusters. In this case, the L2 becomes the LLC[1]. Link[1]: https://lore.kernel.org/all/3cb6ebc7-a2fd-42b3-8739-b00e28a09cb6@o= s.amperecomputing.com/ Suggested-by: K Prateek Nayak Co-developed-by: Tim Chen Signed-off-by: Tim Chen Signed-off-by: Chen Yu --- Notes: v2->v3: Fix overflow issue in exceed_llc_capacity() by changing the type of llc from int to u64. (Jianyong Wu, Yangyu Chen) include/linux/cacheinfo.h | 21 ++++++++++------- kernel/sched/fair.c | 48 +++++++++++++++++++++++++++++++++++---- 2 files changed, 56 insertions(+), 13 deletions(-) diff --git a/include/linux/cacheinfo.h b/include/linux/cacheinfo.h index c8f4f0a0b874..82d0d59ca0e1 100644 --- a/include/linux/cacheinfo.h +++ b/include/linux/cacheinfo.h @@ -113,18 +113,11 @@ int acpi_get_cache_info(unsigned int cpu, =20 const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_= leaf); =20 -/* - * Get the cacheinfo structure for the cache associated with @cpu at - * level @level. - * cpuhp lock must be held. - */ -static inline struct cacheinfo *get_cpu_cacheinfo_level(int cpu, int level) +static inline struct cacheinfo *_get_cpu_cacheinfo_level(int cpu, int leve= l) { struct cpu_cacheinfo *ci =3D get_cpu_cacheinfo(cpu); int i; =20 - lockdep_assert_cpus_held(); - for (i =3D 0; i < ci->num_leaves; i++) { if (ci->info_list[i].level =3D=3D level) { if (ci->info_list[i].attributes & CACHE_ID) @@ -136,6 +129,18 @@ static inline struct cacheinfo *get_cpu_cacheinfo_leve= l(int cpu, int level) return NULL; } =20 +/* + * Get the cacheinfo structure for the cache associated with @cpu at + * level @level. + * cpuhp lock must be held. + */ +static inline struct cacheinfo *get_cpu_cacheinfo_level(int cpu, int level) +{ + lockdep_assert_cpus_held(); + + return _get_cpu_cacheinfo_level(cpu, level); +} + /* * Get the id of the cache associated with @cpu at level @level. * cpuhp lock must be held. diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 86b6b08e7e1e..ee4982af2bdd 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -1223,6 +1223,37 @@ static inline bool valid_llc_buf(struct sched_domain= *sd, return valid_llc_id(id); } =20 +static bool exceed_llc_capacity(struct mm_struct *mm, int cpu) +{ + struct cacheinfo *ci; + u64 rss, llc; + + /* + * get_cpu_cacheinfo_level() can not be used + * because it requires the cpu_hotplug_lock + * to be held. Use _get_cpu_cacheinfo_level() + * directly because the 'cpu' can not be + * offlined at the moment. + */ + ci =3D _get_cpu_cacheinfo_level(cpu, 3); + if (!ci) { + /* + * On system without L3 but with shared L2, + * L2 becomes the LLC. + */ + ci =3D _get_cpu_cacheinfo_level(cpu, 2); + if (!ci) + return true; + } + + llc =3D ci->size; + + rss =3D get_mm_counter(mm, MM_ANONPAGES) + + get_mm_counter(mm, MM_SHMEMPAGES); + + return (llc <=3D (rss * PAGE_SIZE)); +} + static bool exceed_llc_nr(struct mm_struct *mm, int cpu) { int smt_nr =3D 1; @@ -1431,7 +1462,8 @@ void account_mm_sched(struct rq *rq, struct task_stru= ct *p, s64 delta_exec) if (time_after(epoch, READ_ONCE(mm->sc_stat.epoch) + EPOCH_LLC_AFFINITY_TIMEOUT) || get_nr_threads(p) <=3D 1 || - exceed_llc_nr(mm, cpu_of(rq))) { + exceed_llc_nr(mm, cpu_of(rq)) || + exceed_llc_capacity(mm, cpu_of(rq))) { if (mm->sc_stat.cpu !=3D -1) mm->sc_stat.cpu =3D -1; } @@ -1496,7 +1528,7 @@ static void task_cache_work(struct callback_head *wor= k) struct mm_struct *mm =3D p->mm; unsigned long m_a_occ =3D 0; unsigned long curr_m_a_occ =3D 0; - int cpu, m_a_cpu =3D -1, nr_running =3D 0; + int cpu, m_a_cpu =3D -1, nr_running =3D 0, curr_cpu; cpumask_var_t cpus; =20 WARN_ON_ONCE(work !=3D &p->cache_work); @@ -1506,7 +1538,9 @@ static void task_cache_work(struct callback_head *wor= k) if (p->flags & PF_EXITING) return; =20 - if (get_nr_threads(p) <=3D 1) { + curr_cpu =3D task_cpu(p); + if (get_nr_threads(p) <=3D 1 || + exceed_llc_capacity(mm, curr_cpu)) { if (mm->sc_stat.cpu !=3D -1) mm->sc_stat.cpu =3D -1; =20 @@ -10034,8 +10068,12 @@ static enum llc_mig can_migrate_llc_task(int src_c= pu, int dst_cpu, if (cpu < 0 || cpus_share_cache(src_cpu, dst_cpu)) return mig_unrestricted; =20 - /* skip cache aware load balance for single/too many threads */ - if (get_nr_threads(p) <=3D 1 || exceed_llc_nr(mm, dst_cpu)) { + /* + * Skip cache aware load balance for single/too many threads + * or large memory RSS. + */ + if (get_nr_threads(p) <=3D 1 || exceed_llc_nr(mm, dst_cpu) || + exceed_llc_capacity(mm, dst_cpu)) { if (mm->sc_stat.cpu !=3D -1) mm->sc_stat.cpu =3D -1; return mig_unrestricted; --=20 2.32.0