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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF0000150B.mail.protection.outlook.com (10.167.242.43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8114.16 via Frontend Transport; Tue, 29 Oct 2024 23:23:48 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 29 Oct 2024 18:23:41 -0500 From: Babu Moger To: , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v9 11/26] x86/resctrl: Introduce mbm_total_cfg and mbm_local_cfg in struct rdt_hw_mon_domain Date: Tue, 29 Oct 2024 18:21:43 -0500 Message-ID: <9df47857dabab2c2a21b98c77322b430c8d9dce1.1730244116.git.babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|CH3PR12MB7545:EE_ X-MS-Office365-Filtering-Correlation-Id: e2ac636d-4ac6-4975-b0a1-08dcf870be12 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|36860700013|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2024 23:23:48.7908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e2ac636d-4ac6-4975-b0a1-08dcf870be12 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7545 Content-Type: text/plain; charset="utf-8" If the BMEC (Bandwidth Monitoring Event Configuration) feature is supported, the bandwidth events can be configured to track specific events. The event configuration is domain specific. ABMC (Assignable Bandwidth Monitoring Counters) feature needs event configuration information to assign a hardware counter to an RMID. Event configurations are not stored in resctrl but instead always read from or written to hardware directly when prompted by user space. Read the event configuration from the hardware during the domain initialization. Save the configuration value in struct rdt_hw_mon_domain, so it can be used for counter assignment. Signed-off-by: Babu Moger Reviewed-by: Reinette Chatre --- v9: Added Reviewed-by tag. No other changes. v8: Renamed resctrl_mbm_evt_config_init() to arch_mbm_evt_config_init() Minor commit message update. v7: Fixed initializing INVALID_CONFIG_VALUE to mbm_local_cfg in case of err= or. v6: Renamed resctrl_arch_mbm_evt_config -> resctrl_mbm_evt_config_init Initialized value to INVALID_CONFIG_VALUE if it is not configurable. Minor commit message update. v5: Exported mon_event_config_index_get. Renamed arch_domain_mbm_evt_config to resctrl_arch_mbm_evt_config. v4: Read the configuration information from the hardware to initialize. Added few commit messages. Fixed the tab spaces. v3: Minor changes related to rebase in mbm_config_write_domain. v2: No changes. --- arch/x86/kernel/cpu/resctrl/core.c | 2 ++ arch/x86/kernel/cpu/resctrl/internal.h | 9 +++++++++ arch/x86/kernel/cpu/resctrl/monitor.c | 26 ++++++++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 4 +--- 4 files changed, 38 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 02ccb4d2955d..11cba9f35945 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -632,6 +632,8 @@ static void domain_add_cpu_mon(int cpu, struct rdt_reso= urce *r) =20 arch_mon_domain_online(r, d); =20 + arch_mbm_evt_config_init(hw_dom); + if (arch_domain_mbm_alloc(r->mon.num_rmid, hw_dom)) { mon_domain_free(hw_dom); return; diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index 8ab59d59c15a..add8e84b483e 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -56,6 +56,9 @@ /* Max event bits supported */ #define MAX_EVT_CONFIG_BITS GENMASK(6, 0) =20 +#define INVALID_CONFIG_VALUE U32_MAX +#define INVALID_CONFIG_INDEX UINT_MAX + /* Setting bit 0 in L3_QOS_EXT_CFG enables the ABMC feature. */ #define ABMC_ENABLE_BIT 0 =20 @@ -401,6 +404,8 @@ struct rdt_hw_ctrl_domain { * @d_resctrl: Properties exposed to the resctrl file system * @arch_mbm_total: arch private state for MBM total bandwidth * @arch_mbm_local: arch private state for MBM local bandwidth + * @mbm_total_cfg: MBM total bandwidth configuration + * @mbm_local_cfg: MBM local bandwidth configuration * * Members of this structure are accessed via helpers that provide abstrac= tion. */ @@ -408,6 +413,8 @@ struct rdt_hw_mon_domain { struct rdt_mon_domain d_resctrl; struct arch_mbm_state *arch_mbm_total; struct arch_mbm_state *arch_mbm_local; + u32 mbm_total_cfg; + u32 mbm_local_cfg; }; =20 static inline struct rdt_hw_ctrl_domain *resctrl_to_arch_ctrl_dom(struct r= dt_ctrl_domain *r) @@ -656,6 +663,8 @@ void __init resctrl_file_fflags_init(const char *config, unsigned long fflags); int mbm_cntr_alloc(struct rdt_resource *r); void mbm_cntr_free(struct rdt_resource *r, u32 cntr_id); +void arch_mbm_evt_config_init(struct rdt_hw_mon_domain *hw_dom); +unsigned int mon_event_config_index_get(u32 evtid); void rdt_staged_configs_clear(void); bool closid_allocated(unsigned int closid); int resctrl_find_cleanest_closid(void); diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index 185ac210d46e..3996f7528b66 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1282,6 +1282,32 @@ int __init rdt_get_mon_l3_config(struct rdt_resource= *r) return 0; } =20 +void arch_mbm_evt_config_init(struct rdt_hw_mon_domain *hw_dom) +{ + unsigned int index; + u64 msrval; + + /* + * Read the configuration registers QOS_EVT_CFG_n, where is + * the BMEC event number (EvtID). + */ + if (mbm_total_event.configurable) { + index =3D mon_event_config_index_get(QOS_L3_MBM_TOTAL_EVENT_ID); + rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval); + hw_dom->mbm_total_cfg =3D msrval & MAX_EVT_CONFIG_BITS; + } else { + hw_dom->mbm_total_cfg =3D INVALID_CONFIG_VALUE; + } + + if (mbm_local_event.configurable) { + index =3D mon_event_config_index_get(QOS_L3_MBM_LOCAL_EVENT_ID); + rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval); + hw_dom->mbm_local_cfg =3D msrval & MAX_EVT_CONFIG_BITS; + } else { + hw_dom->mbm_local_cfg =3D INVALID_CONFIG_VALUE; + } +} + void __exit rdt_put_mon_l3_config(struct rdt_resource *r) { dom_data_exit(r); diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index a4b92476f501..811b477f7710 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1601,8 +1601,6 @@ struct mon_config_info { u32 mon_config; }; =20 -#define INVALID_CONFIG_INDEX UINT_MAX - /** * mon_event_config_index_get - get the hardware index for the * configurable event @@ -1612,7 +1610,7 @@ struct mon_config_info { * 1 for evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID * INVALID_CONFIG_INDEX for invalid evtid */ -static inline unsigned int mon_event_config_index_get(u32 evtid) +unsigned int mon_event_config_index_get(u32 evtid) { switch (evtid) { case QOS_L3_MBM_TOTAL_EVENT_ID: --=20 2.34.1