From nobody Thu Oct 2 09:19:06 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 924532FE56D; Thu, 18 Sep 2025 21:16:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758230199; cv=none; b=riSUpgGqgFNXe9tGawztCpC2OZAtGDBP14nfNcSi9tlBDltn132IheRYoNh+Y76HI/U5yXZ66UH2Lb5pBJMlhpqn0onFoTCu9iK8inp37XSgnrm6eMFXq4VYFjDDYm9hK1DB6LGY0uFfMI9tAdfaRLcPS0wRn07wp6ayvni0q1U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758230199; c=relaxed/simple; bh=hZmKwcigFn/Avgkau1VnG/mv5eV+/qvPhkwd2AcWV2c=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=CRloXp0Sf5H03cAvsRiuva4TCKlz2TIXslzWP3O22FNID5LSmTvl0hqsMhuyOarE0K2L+PTHsUdw5ZMNQBgU2bbdd3ilEh5Yj+w6KJA8lx7wecGWGvCn+EXb6zT4oJ5t72Zz35cLzNOLRSSsUXq3QMLktlIucPgNGPgz+6wOGyk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=HQ9nuHgd; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="HQ9nuHgd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1758230198; x=1789766198; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hZmKwcigFn/Avgkau1VnG/mv5eV+/qvPhkwd2AcWV2c=; b=HQ9nuHgddwUpuKFGkqt6O0RgAkh/4+aFYlD3MB6240Jab9uKK3EeU9Kp 1LsuNcPl4+xiOUndIheHs33zb+9Z5a04yBr5f6ANl+4e5KEeeCTrjaOKe Y1r1gNCS9b8wUWtSNp07EIyJIbEAadrSQENybBR0Z8rN6SqKcFQ718z2E cMPmhfaeKLNqJs/ZD+QPQYY5MiLVvdH7deLXbH18wY4i6jp6KwSas3whJ lE3jE0LjrfMlDbkcW1nEESC0xNOi21DQq6iClgJPA/C526dCq5Elve+Fx Qp9DHPOr6tP1D4H0nTPn5m9/1GGTG0HOQLGMdQpzYQn1se3DGr2OaPGkf Q==; X-CSE-ConnectionGUID: 31sRM3ybQuOqhqj3gb2ViA== X-CSE-MsgGUID: yinyVvRuSa2Q83S8uk8Ugw== X-IronPort-AV: E=Sophos;i="6.18,276,1751266800"; d="scan'208";a="278071392" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 18 Sep 2025 14:16:26 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Thu, 18 Sep 2025 14:15:53 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Thu, 18 Sep 2025 14:15:53 -0700 From: To: , , , , CC: , , , Subject: [PATCH v4 17/31] clk: at91: clk-h32mx: add support for parent_hw Date: Thu, 18 Sep 2025 14:15:59 -0700 Message-ID: <9d37104c581548a995e20a86f3501bee10b6acce.1758226719.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Add support for parent_hw in h32mx clock driver. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-h32mx were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Signed-off-by: Ryan Wanner --- drivers/clk/at91/clk-h32mx.c | 11 +++++++---- drivers/clk/at91/dt-compat.c | 2 +- drivers/clk/at91/pmc.h | 2 +- drivers/clk/at91/sama5d2.c | 2 +- drivers/clk/at91/sama5d4.c | 2 +- 5 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c index 1e6c12eeda10..4b709f9bd831 100644 --- a/drivers/clk/at91/clk-h32mx.c +++ b/drivers/clk/at91/clk-h32mx.c @@ -83,10 +83,10 @@ static const struct clk_ops h32mx_ops =3D { =20 struct clk_hw * __init at91_clk_register_h32mx(struct regmap *regmap, const char *name, - const char *parent_name) + const char *parent_name, struct clk_parent_data *parent_data) { struct clk_sama5d4_h32mx *h32mxclk; - struct clk_init_data init; + struct clk_init_data init =3D {}; int ret; =20 h32mxclk =3D kzalloc(sizeof(*h32mxclk), GFP_KERNEL); @@ -95,8 +95,11 @@ at91_clk_register_h32mx(struct regmap *regmap, const cha= r *name, =20 init.name =3D name; init.ops =3D &h32mx_ops; - init.parent_names =3D parent_name ? &parent_name : NULL; - init.num_parents =3D parent_name ? 1 : 0; + if (parent_data) + init.parent_data =3D (const struct clk_parent_data *)parent_data; + else + init.parent_names =3D &parent_name; + init.num_parents =3D 1; init.flags =3D CLK_SET_RATE_GATE; =20 h32mxclk->hw.init =3D &init; diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c index 3285e3110b58..ccdeba3a1130 100644 --- a/drivers/clk/at91/dt-compat.c +++ b/drivers/clk/at91/dt-compat.c @@ -201,7 +201,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct de= vice_node *np) =20 parent_name =3D of_clk_get_parent_name(np, 0); =20 - hw =3D at91_clk_register_h32mx(regmap, name, parent_name); + hw =3D at91_clk_register_h32mx(regmap, name, parent_name, NULL); if (IS_ERR(hw)) return; =20 diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index db067177e6ef..64faaa8123c9 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -180,7 +180,7 @@ at91_clk_register_generated(struct regmap *regmap, spin= lock_t *lock, =20 struct clk_hw * __init at91_clk_register_h32mx(struct regmap *regmap, const char *name, - const char *parent_name); + const char *parent_name, struct clk_parent_data *parent_data); =20 struct clk_hw * __init at91_clk_i2s_mux_register(struct regmap *regmap, const char *name, diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c index 7904f2122ed7..8c7ff0108b41 100644 --- a/drivers/clk/at91/sama5d2.c +++ b/drivers/clk/at91/sama5d2.c @@ -276,7 +276,7 @@ static void __init sama5d2_pmc_setup(struct device_node= *np) =20 sama5d2_pmc->chws[PMC_MCK] =3D hw; =20 - hw =3D at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div"); + hw =3D at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL); if (IS_ERR(hw)) goto err_free; =20 diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c index 7cda8032653e..04c848cd7001 100644 --- a/drivers/clk/at91/sama5d4.c +++ b/drivers/clk/at91/sama5d4.c @@ -214,7 +214,7 @@ static void __init sama5d4_pmc_setup(struct device_node= *np) =20 sama5d4_pmc->chws[PMC_MCK] =3D hw; =20 - hw =3D at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div"); + hw =3D at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL); if (IS_ERR(hw)) goto err_free; =20 --=20 2.43.0