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Tue, 27 Aug 2024 10:01:47 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , Subject: [PATCH v2 14/19] iommufd/selftest: Add VIOMMU coverage for IOMMU_HWPT_INVALIDATE ioctl Date: Tue, 27 Aug 2024 09:59:51 -0700 Message-ID: <9c79e722a0bae7d266d0dfebf19f9586f4f725e9.1724776335.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B4:EE_|DS0PR12MB8563:EE_ X-MS-Office365-Filtering-Correlation-Id: 2224753e-51a6-48a1-772d-08dcc6b9f779 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?bZ1FUvynkK2cRLOwaCDiFtppi6w6nBpGm1qCfoI/bJ4Xb4uIibX+g0Lml5M0?= =?us-ascii?Q?j0NUnhyaN8F3UbiNtrJlZ2utAkChhWnprN64zBI1rGkltclUlzHcSdMk3afg?= =?us-ascii?Q?+E5QtsOMsuI6PvyGNAhHa72M3sVl3tT0DfSbxOhvsrnWH3MZBWRuxRKyEagN?= =?us-ascii?Q?+OvZ1knMERQ8dXa8IzhRh7Jdla3Z8GZgAGgWx+D2sp5uszSvAZj+IVxtVSC2?= =?us-ascii?Q?56uDSn+gzZL0AviN+chDlU0F5JP5T5fRjWae8U862/obSWYYvnFZIEHHw3l5?= =?us-ascii?Q?IQi6b0dy7YyKhvEljdQ66GS3NIqkVdmCr8xQPMKv0vBI+JIIkTVJ5UC47MoL?= =?us-ascii?Q?eevQ1WklvSjGYdyhiimQwPNvbjNUrxfK/WK7SebqpZTLxOyJH6wM7EajYcPV?= =?us-ascii?Q?f9yBLtQjoYosHG4NmCYHZO4LL1DBgyWqIrxDRPNXHg1RFQHzEw4NOTjecAAu?= =?us-ascii?Q?PsrSisI+9fSgg5cjN4/lSMUIR458E3FcKpIbqMHzopBvceoU9sn5b4RfaUjU?= =?us-ascii?Q?QnNesyMNdVrThEp15tCi3DKtF8K6xxQwP8TywxvjUKY1+ZH1Shi6uWq6it+X?= =?us-ascii?Q?eVeZFvWowHSx+/JSv98sVEQNu46CFVuBzokqIvfJeQ8slM7ell+BNYDjrUp3?= =?us-ascii?Q?m0wikdW07rk9GL4oYMUWr6dNmIhhnA5/rTCtZibm3Ow04YJQUp7YO3VSaZLL?= =?us-ascii?Q?+31XeJ0bnZYCHQz+Xv0hj0X6Wqho56/GLwChTXzPOvqU7tDu8gm7nGI9mlCv?= =?us-ascii?Q?AKo0b0EJeXy/oQSPd7C6iOIc/7eMIxqaeZnFkyNPq9P7nlVq3N3vSrvx8pcp?= =?us-ascii?Q?3l79s3VJ8utA9nY+suwc7apHKS1RYoSWLzyOEWSbrudMRUeKKs1n4DTKuGkj?= =?us-ascii?Q?gqP0pMi4xnqiNH9FQmuEO0A5TpUEGMJfTf9Q4VyiYkMAySud5Rvcsby1wj7P?= =?us-ascii?Q?6XTCNEVub2pA45t3mJ1+6X8exm5AYyPfX+jUlfD6LvxxGuE7wpDNG/RMQA8H?= =?us-ascii?Q?cpvRYePXgRk3pkQHNmJ8nHLUcdUyD/+guJ+LOoM26uhKgovRJNbK9MSfaQMX?= =?us-ascii?Q?x7PkxQPl3fwS89lgBhP2jfkPXjFKvHP21YiU8ghwmsOD1GbSgVoq5EyzPwZM?= =?us-ascii?Q?jJXzaG2PIZRKByMy+5A6N4S4DlqJqvgn9DpsPcW0tk4p5NirPHUtlpyNeh30?= =?us-ascii?Q?tEsoi4a/MFxKSGhvk+JVPsVSLEngAqV57iV9UltVagqZQvPRC3Rnprmf5/AP?= =?us-ascii?Q?eVLn4xiB4D57jca8ULbreTWT07Xa3Awp3iUzsXLexeEiAXY2wIqfbpmk0lk3?= =?us-ascii?Q?Xg+7dtslzAlH75slVd+kVqucT2qwdgdsw7VT1n+eZ20Yx/RG4rvDCpC9gzjJ?= =?us-ascii?Q?PC85GFPb5pqIzLM8nBvpm5rgxpneoZViyvfQiSWcqWuNgwlOkzEw5tvvxy1o?= =?us-ascii?Q?5ViSRPqccTUM48GliqW4KSSsaCRkFan9?= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(7416014)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2024 17:02:00.1543 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2224753e-51a6-48a1-772d-08dcc6b9f779 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B4.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8563 Content-Type: text/plain; charset="utf-8" Add a viommu_cache test function to cover VIOMMU invalidations using the updated IOMMU_VIOMMU_INVALIDATE ioctl, with similar postive and negative cases to the existing iotlb ones. Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd.c | 190 ++++++++++++++++++ tools/testing/selftests/iommu/iommufd_utils.h | 32 +++ 2 files changed, 222 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index 1b45445dbd53..6f1014cc208b 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -614,6 +614,196 @@ TEST_F(iommufd_ioas, viommu_default) } } =20 +TEST_F(iommufd_ioas, viommu_dev_cache) +{ + struct iommu_viommu_invalidate_selftest inv_reqs[2] =3D {}; + struct iommu_hwpt_selftest data =3D { + .iotlb =3D IOMMU_TEST_IOTLB_DEFAULT, + }; + uint32_t nested_hwpt_id =3D 0, hwpt_id =3D 0; + uint32_t dev_id =3D self->device_id; + uint32_t viommu_id =3D 0; + uint32_t num_inv; + + if (dev_id) { + test_cmd_hwpt_alloc(dev_id, self->ioas_id, + IOMMU_HWPT_ALLOC_NEST_PARENT, &hwpt_id); + test_cmd_viommu_alloc(dev_id, hwpt_id, + IOMMU_VIOMMU_TYPE_DEFAULT, &viommu_id); + test_cmd_hwpt_alloc_nested(self->device_id, viommu_id, 0, + &nested_hwpt_id, + IOMMU_HWPT_DATA_SELFTEST, &data, + sizeof(data)); + test_cmd_mock_domain_replace(self->stdev_id, nested_hwpt_id); + test_cmd_viommu_set_vdev_id(viommu_id, dev_id, 0x99); + + test_cmd_dev_check_cache_all(dev_id, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Check data_type by passing zero-length array */ + num_inv =3D 0; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: Invalid data_type */ + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST_INVALID, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: structure size sanity */ + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs) + 1, &num_inv); + assert(!num_inv); + + num_inv =3D 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + 1, &num_inv); + assert(!num_inv); + + /* Negative test: invalid flag is passed */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0xffffffff; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EOPNOTSUPP, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid data_uptr when array is not empty */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EINVAL, viommu_id, NULL, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid entry_len when array is not empty */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + 0, &num_inv); + assert(!num_inv); + + /* Negative test: invalid cache_id */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D MOCK_DEV_CACHE_ID_MAX + 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* Negative test: invalid vdev_id */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x9; + inv_reqs[0].cache_id =3D 0; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(!num_inv); + + /* + * Invalidate the 1st cache entry but fail the 2nd request + * due to invalid flags configuration in the 2nd request. + */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 0; + inv_reqs[1].flags =3D 0xffffffff; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D 1; + test_err_viommu_invalidate(EOPNOTSUPP, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* + * Invalidate the 1st cache entry but fail the 2nd request + * due to invalid cache_id configuration in the 2nd request. + */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 0; + inv_reqs[1].flags =3D 0; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D MOCK_DEV_CACHE_ID_MAX + 1; + test_err_viommu_invalidate(EINVAL, viommu_id, inv_reqs, + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Invalidate the 2nd cache entry and verify */ + num_inv =3D 1; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 1; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache(dev_id, 0, 0); + test_cmd_dev_check_cache(dev_id, 1, 0); + test_cmd_dev_check_cache(dev_id, 2, + IOMMU_TEST_DEV_CACHE_DEFAULT); + test_cmd_dev_check_cache(dev_id, 3, + IOMMU_TEST_DEV_CACHE_DEFAULT); + + /* Invalidate the 3rd and 4th cache entries and verify */ + num_inv =3D 2; + inv_reqs[0].flags =3D 0; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].cache_id =3D 2; + inv_reqs[1].flags =3D 0; + inv_reqs[1].vdev_id =3D 0x99; + inv_reqs[1].cache_id =3D 3; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 2); + test_cmd_dev_check_cache_all(dev_id, 0); + + /* Invalidate all cache entries for nested_dev_id[1] and verify */ + num_inv =3D 1; + inv_reqs[0].vdev_id =3D 0x99; + inv_reqs[0].flags =3D IOMMU_TEST_INVALIDATE_FLAG_ALL; + test_cmd_viommu_invalidate(viommu_id, inv_reqs, + sizeof(*inv_reqs), &num_inv); + assert(num_inv =3D=3D 1); + test_cmd_dev_check_cache_all(dev_id, 0); + + test_cmd_mock_domain_replace(self->stdev_id, hwpt_id); + test_ioctl_destroy(nested_hwpt_id); + test_cmd_mock_domain_replace(self->stdev_id, self->ioas_id); + test_ioctl_destroy(viommu_id); + test_ioctl_destroy(hwpt_id); + } +} + TEST_F(iommufd_ioas, hwpt_attach) { /* Create a device attached directly to a hwpt */ diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index d697a7aa55c9..0a81827b903f 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -289,6 +289,38 @@ static int _test_cmd_hwpt_invalidate(int fd, __u32 hwp= t_id, void *reqs, data_type, lreq, nreqs)); \ }) =20 +static int _test_cmd_viommu_invalidate(int fd, __u32 viommu_id, void *reqs, + uint32_t data_type, uint32_t lreq, + uint32_t *nreqs) +{ + struct iommu_hwpt_invalidate cmd =3D { + .size =3D sizeof(cmd), + .hwpt_id =3D viommu_id, + .data_type =3D data_type, + .data_uptr =3D (uint64_t)reqs, + .entry_len =3D lreq, + .entry_num =3D *nreqs, + }; + int rc =3D ioctl(fd, IOMMU_HWPT_INVALIDATE, &cmd); + *nreqs =3D cmd.entry_num; + return rc; +} + +#define test_cmd_viommu_invalidate(viommu, reqs, lreq, nreqs) = \ + ({ \ + ASSERT_EQ(0, \ + _test_cmd_viommu_invalidate(self->fd, viommu, reqs, \ + IOMMU_VIOMMU_INVALIDATE_DATA_SELFTEST, \ + lreq, nreqs)); \ + }) +#define test_err_viommu_invalidate(_errno, viommu_id, reqs, data_type, lre= q, \ + nreqs) \ + ({ \ + EXPECT_ERRNO(_errno, _test_cmd_viommu_invalidate( \ + self->fd, viommu_id, reqs, \ + data_type, lreq, nreqs)); \ + }) + static int _test_cmd_access_replace_ioas(int fd, __u32 access_id, unsigned int ioas_id) { --=20 2.43.0