From nobody Sat Sep 21 04:43:19 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBBFAC678D4 for ; Wed, 1 Mar 2023 19:54:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229871AbjCATyg (ORCPT ); Wed, 1 Mar 2023 14:54:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229847AbjCATyZ (ORCPT ); Wed, 1 Mar 2023 14:54:25 -0500 Received: from fudo.makrotopia.org (fudo.makrotopia.org [IPv6:2a07:2ec0:3002::71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E11664ECD2; Wed, 1 Mar 2023 11:54:14 -0800 (PST) Received: from local by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1pXSWj-0007I4-0n; Wed, 01 Mar 2023 20:54:13 +0100 Date: Wed, 1 Mar 2023 19:54:09 +0000 From: Daniel Golle To: devicetree@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Russell King , Heiner Kallweit , Lorenzo Bianconi , Mark Lee , John Crispin , Felix Fietkau , AngeloGioacchino Del Regno , Matthias Brugger , DENG Qingfang , Landen Chao , Sean Wang , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" , Vladimir Oltean , Florian Fainelli , Andrew Lunn Cc: Jianhui Zhao , =?iso-8859-1?Q?Bj=F8rn?= Mork Subject: [RFC PATCH v11 03/12] dt-bindings: arm: mediatek: sgmiisys: Convert to DT schema Message-ID: <91f38e6e1814294b6884d5c7fd71885dd2aa3f6c.1677699407.git.daniel@makrotopia.org> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Convert mediatek,sgmiiisys bindings to DT schema format. Add maintainer Matthias Brugger, no maintainers were listed in the original documentation. As this node is also referenced by the Ethernet controller and used as SGMII PCS add this fact to the description. Move the file to Documentation/devicetree/bindings/pcs/ which seems more appropriate given that the great majority of registers are related to SGMII PCS functionality and only one register represents clock bits. Reviewed-by: Rob Herring Signed-off-by: Daniel Golle --- .../arm/mediatek/mediatek,sgmiisys.txt | 27 ---------- .../bindings/net/pcs/mediatek,sgmiisys.yaml | 49 +++++++++++++++++++ 2 files changed, 49 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek= ,sgmiisys.txt create mode 100644 Documentation/devicetree/bindings/net/pcs/mediatek,sgmi= isys.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiis= ys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.t= xt deleted file mode 100644 index d2c24c2775141..0000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt +++ /dev/null @@ -1,27 +0,0 @@ -MediaTek SGMIISYS controller -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D - -The MediaTek SGMIISYS controller provides various clocks to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt7622-sgmiisys", "syscon" - - "mediatek,mt7629-sgmiisys", "syscon" - - "mediatek,mt7981-sgmiisys_0", "syscon" - - "mediatek,mt7981-sgmiisys_1", "syscon" - - "mediatek,mt7986-sgmiisys_0", "syscon" - - "mediatek,mt7986-sgmiisys_1", "syscon" -- #clock-cells: Must be 1 - -The SGMIISYS controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -sgmiisys: sgmiisys@1b128000 { - compatible =3D "mediatek,mt7622-sgmiisys", "syscon"; - reg =3D <0 0x1b128000 0 0x1000>; - #clock-cells =3D <1>; -}; diff --git a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.ya= ml b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml new file mode 100644 index 0000000000000..7ce597011a321 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SGMIISYS Controller + +maintainers: + - Matthias Brugger + +description: + The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks + to the ethernet subsystem to which it is attached. + +properties: + compatible: + items: + - enum: + - mediatek,mt7622-sgmiisys + - mediatek,mt7629-sgmiisys + - mediatek,mt7986-sgmiisys_0 + - mediatek,mt7986-sgmiisys_1 + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + sgmiisys: syscon@1b128000 { + compatible =3D "mediatek,mt7622-sgmiisys", "syscon"; + reg =3D <0 0x1b128000 0 0x1000>; + #clock-cells =3D <1>; + }; + }; --=20 2.39.2