From nobody Thu Feb 12 19:05:42 2026 Received: from pegase1.c-s.fr (pegase1.c-s.fr [93.17.236.30]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B248353398 for ; Mon, 10 Jun 2024 05:55:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=93.17.236.30 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717998947; cv=none; b=K22y3UQzHhqQhNu2BCkDbnkC6bPdQhE7aGhmUI2uGl42VXvxJ+IvSdOsnsp2WMdK2KdQiuJp45rP+lysQLENM/9G1QQdNsZQjM/DmtNg7VrS0Q0bvbxXEmj61JkidYunGrLwZ6GOHZcw4lgZWsP1lEBKgJVcI3uAc2fzclXivKU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717998947; c=relaxed/simple; bh=foRpSg705p76Fv1R91+1LawwFjSx303hjdxd+UuPeuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qFcDUZOFnT/9qjauiKlo9DegS71Dk2HQ76XtKxLIle/nBnEV+duxLssmM5CvRqxzjhaDpYM1Qf+Za3HtKJ/b0Un/Ky8qsWH/vUZ8Gl00qJgtv7BqXzhUNp5TjO4BL0/Ry4P5o0xpQGLB5m0wpFhR1MPNz5v4HGWPjFgO1gydfZY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=csgroup.eu; spf=pass smtp.mailfrom=csgroup.eu; arc=none smtp.client-ip=93.17.236.30 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=csgroup.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=csgroup.eu Received: from localhost (mailhub3.si.c-s.fr [192.168.12.233]) by localhost (Postfix) with ESMTP id 4VyLcV5l6pz9v5M; Mon, 10 Jun 2024 07:55:06 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OKW8MYdeHxSn; Mon, 10 Jun 2024 07:55:06 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 4VyLcL3j1jz9v5V; Mon, 10 Jun 2024 07:54:58 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 7A5DF8B76E; Mon, 10 Jun 2024 07:54:58 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id 9EUCK44BVqG4; Mon, 10 Jun 2024 07:54:58 +0200 (CEST) Received: from PO20335.idsi0.si.c-s.fr (unknown [172.25.230.108]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 545CC8B764; Mon, 10 Jun 2024 07:54:58 +0200 (CEST) From: Christophe Leroy To: Andrew Morton , Jason Gunthorpe , Peter Xu , Oscar Salvador , Michael Ellerman , Nicholas Piggin Cc: Christophe Leroy , linux-kernel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v5 09/18] powerpc/8xx: Simplify struct mmu_psize_def Date: Mon, 10 Jun 2024 07:54:54 +0200 Message-ID: <8fcfbcbc342bfa3a37a0e177f78977a0c75fbf19.1717955559.git.christophe.leroy@csgroup.eu> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717998887; l=1334; i=christophe.leroy@csgroup.eu; s=20211009; h=from:subject:message-id; bh=foRpSg705p76Fv1R91+1LawwFjSx303hjdxd+UuPeuU=; b=wy+VDf0MwAoqwjikAO8h6BJVA4WbjisChcDuA8u9LwyZy+nBzig99JIgE1x3uKyrAsDjehOa3 CWesK7dk5zQA9kVKV7OFyxSbJXBe6RjsSg916jG8UyiPU+w9dcbtQMj X-Developer-Key: i=christophe.leroy@csgroup.eu; a=ed25519; pk=HIzTzUj91asvincQGOFx6+ZF5AoUuP9GdOtQChs7Mm0= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On 8xx, only the shift field is used in struct mmu_psize_def Remove other fields and related macros. Signed-off-by: Christophe Leroy Reviewed-by: Oscar Salvador --- arch/powerpc/include/asm/nohash/32/mmu-8xx.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/include/asm/nohash/32/mmu-8xx.h b/arch/powerpc/in= clude/asm/nohash/32/mmu-8xx.h index 141d82e249a8..a756a1e59c54 100644 --- a/arch/powerpc/include/asm/nohash/32/mmu-8xx.h +++ b/arch/powerpc/include/asm/nohash/32/mmu-8xx.h @@ -189,19 +189,14 @@ typedef struct { =20 #define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff80000) =20 -/* Page size definitions, common between 32 and 64-bit +/* + * Page size definitions for 8xx * * shift : is the "PAGE_SHIFT" value for that page size - * penc : is the pte encoding mask * */ struct mmu_psize_def { unsigned int shift; /* number of bits */ - unsigned int enc; /* PTE encoding */ - unsigned int ind; /* Corresponding indirect page size shift */ - unsigned int flags; -#define MMU_PAGE_SIZE_DIRECT 0x1 /* Supported as a direct size */ -#define MMU_PAGE_SIZE_INDIRECT 0x2 /* Supported as an indirect size */ }; =20 extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; --=20 2.44.0