From nobody Wed Dec 17 19:40:56 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D36872E8B9A; Fri, 3 Oct 2025 10:08:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759486099; cv=none; b=qbjJ6KcRqBjz8HJvk0/prC2+/IVY/xOG0PQ/mr7yyFyx1eruBXTIK+9TgvEIlpFedqsB1PIuqr/ZBU0719q8vbKmb/VxlXIxbV99KkkiL+7P7obmQcp+Q7RdF+WKQN4PYXwH6hp634qU+qROPB4sXu7CDEbGXEzxfIysxXocy/4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1759486099; c=relaxed/simple; bh=kIDAaVBm4hCKZdHyLuxZHTfdOtMs0twtoGrJpSIf6DY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hhfHSIOxt/4VazeydcP2XPXPj5gYodWCixgJZHq9m9znxpoivuqwAZmqLhVhx5A25usB+acr2TlExrXyS9QH4o6CIVzgF2SQQM0Id4AK37gSX14domDMJK1GDCixxUBWyXH+FBlPP/mDOR3WwfizQwQxv84LRAkde/7LkUE1XIQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0F85FC4CEF5; Fri, 3 Oct 2025 10:08:15 +0000 (UTC) From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Samuel Holland , Marc Zyngier , Saravana Kannan , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/RFC 2/2] riscv: dts: renesas: r9a07g043f: Move interrupt-parent to top node Date: Fri, 3 Oct 2025 12:07:49 +0200 Message-ID: <8e7c7881800827467f1687432751addb822bb85b.1759485668.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the "interrupt-parent =3D <&plic>" property from the soc node to the top node, for consistency with arch/arm64/boot/dts/renesas/r9a07g043u.dtsi. Signed-off-by: Geert Uytterhoeven --- arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/= dts/renesas/r9a07g043f.dtsi index a8bcb26f42700644..571de3cafa8214e4 100644 --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi @@ -12,6 +12,8 @@ #include =20 / { + interrupt-parent =3D <&plic>; + cpus { #address-cells =3D <1>; #size-cells =3D <0>; @@ -52,7 +54,6 @@ &pinctrl { =20 &soc { dma-noncoherent; - interrupt-parent =3D <&plic>; =20 irqc: interrupt-controller@110a0000 { compatible =3D "renesas,r9a07g043f-irqc"; --=20 2.43.0