From nobody Wed Feb 11 04:18:10 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3E172E7BCC for ; Tue, 10 Feb 2026 16:20:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770740457; cv=none; b=dpy9NvbzF361kje+iSmRaC/AlCoqTCiRqN1gI76eOzfQvpVZhW7ovVaGqmgGp2tlES19kBDX6OVi9TpKqtsh5JoOSY+fUCXd0uLLhQC1QUbv/G6JKB0Zk40IVK0zb6yGcCfCHDJHkkSE+eR+M07fcnM++PLKRfx4KYWbM6DqjCY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770740457; c=relaxed/simple; bh=GekdfEwCd5uOzEzfvSaFv/oWuoutn4ypf4LitS15BrA=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=bNNaW/MIMr579jJTra91TgDVY7dRM2hEQlMX8wmxw37pqmS/hgFkcCeCl8VyWwk+LWLj+LH6jEQDMcghzdwFwmk5v1TozmYQC43p0nrYd0ynXlFrHQLqidF6fEk+9VFHAPSYS8etkXnX/IQkDqj9EX8cvAyFB+8RvSAxKJE1vSE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=izdaravX; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="izdaravX" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 33C60C116C6; Tue, 10 Feb 2026 16:20:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1770740457; bh=GekdfEwCd5uOzEzfvSaFv/oWuoutn4ypf4LitS15BrA=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=izdaravXxP5CCghNWwFyhzpPV5rXPA0tcfhZ3k2WVikSMYAxCGnK+1g5hEyyeUYsz ksL2j97hOgZ7ezmOY4a7BNNi08oU6d6dtJYSf4hyZ0r9dmMMkU8baryg1bKhJSHVhC nIp4naDPS2eLwpj7MoSWkPD0td3LOoMY+qWulkMerqPkdQDnrG12Xn5EB7Mxxqc8LN bTnqX8l8X1MZtkkE0zZ16qdechcKkxiBJcXc6MLQMMY0Glthnae1gfPB6EnQg7tHWQ Z/XWgJyAyRgwZI+jmwhhOWruG2+a3ds3LfjBg6SonSzEn2QzaVMW78Gs520rRud8NB 8pD4n5zpwIoaA== From: Thomas Gleixner To: Shinichiro Kawasaki , Linus Torvalds Cc: LKML , Ihor Solodrai , Shrikanth Hegde , Peter Zijlstra , Mathieu Desnoyers , Michael Jeanson , Andrey Ryabinin , Alexander Potapenko , "kasan-dev@googlegroups.com" Subject: [PATCH] sched/mmcid: Don't assume CID is CPU owned on mode switch In-Reply-To: References: <20260201192234.380608594@kernel.org> <20260201192835.032221009@kernel.org> <873438c1zc.ffs@tglx> <87wm0kafk2.ffs@tglx> Date: Tue, 10 Feb 2026 17:20:51 +0100 Message-ID: <87tsvoa7to.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Shinichiro reported a KASAN UAF, which is actually an out of bounds access in the MMCID management code. CPU0 CPU1 T1 runs in userspace T0: fork(T4) -> Switch to per CPU CID mode fixup() set MM_CID_TRANSIT on T1/CPU1 T4 exit() T3 exit() T2 exit() T1 exit() switch to per task mode ---> Out of bounds access. As T1 has not scheduled after T0 set the TRANSIT bit, it exits with the TRANSIT bit set. sched_mm_cid_remove_user() clears the TRANSIT bit in the task and drops the CID, but it does not touch the per CPU storage. That's functionally correct because a CID is only owned by the CPU when the ONCPU bit is set, which is mutually exclusive with the TRANSIT flag. Now sched_mm_cid_exit() assumes that the CID is CPU owned because the prior mode was per CPU. It invokes mm_drop_cid_on_cpu() which clears the not set ONCPU bit and then invokes clear_bit() with an insanely large bit number because TRANSIT is set (bit 29). Prevent that by actually validating that the CID is CPU owned in mm_drop_cid_on_cpu(). Fixes: 007d84287c74 ("sched/mmcid: Drop per CPU CID immediately when switch= ing to per task mode") Reported-by: Shinichiro Kawasaki Signed-off-by: Thomas Gleixner Tested-by: Shinichiro Kawasaki Cc: stable@vger.kernel.org Closes: https://lore.kernel.org/aYsZrixn9b6s_2zL@shinmob Reviewed-by: Mathieu Desnoyers --- Linus, can you please take that directly? --- kernel/sched/core.c | 7 +++---- kernel/sched/sched.h | 6 ++++-- 2 files changed, 7 insertions(+), 6 deletions(-) --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -10729,10 +10729,9 @@ void sched_mm_cid_exit(struct task_struc return; /* * Mode change. The task has the CID unset - * already. The CPU CID is still valid and - * does not have MM_CID_TRANSIT set as the - * mode change has just taken effect under - * mm::mm_cid::lock. Drop it. + * already and dealt with an eventually set + * TRANSIT bit. If the CID is owned by the CPU + * then drop it. */ mm_drop_cid_on_cpu(mm, this_cpu_ptr(mm->mm_cid.pcpu)); } --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -3762,8 +3762,10 @@ static __always_inline void mm_unset_cid static __always_inline void mm_drop_cid_on_cpu(struct mm_struct *mm, struc= t mm_cid_pcpu *pcp) { /* Clear the ONCPU bit, but do not set UNSET in the per CPU storage */ - pcp->cid =3D cpu_cid_to_cid(pcp->cid); - mm_drop_cid(mm, pcp->cid); + if (cid_on_cpu(pcp->cid)) { + pcp->cid =3D cpu_cid_to_cid(pcp->cid); + mm_drop_cid(mm, pcp->cid); + } } =20 static inline unsigned int __mm_get_cid(struct mm_struct *mm, unsigned int= max_cids)