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[79.37.15.246]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8037a5c4dfsm18931166b.14.2025.12.18.11.06.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Dec 2025 11:06:42 -0800 (PST) From: Andrea della Porta To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Andrea della Porta , Bjorn Helgaas , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, iivanov@suse.de, svarbanov@suse.de, mbrugger@suse.com, Phil Elwell Subject: [PATCH 3/4] arm64: dts: broadcom: bcm2712: fix RP1 endpoint PCI topology Date: Thu, 18 Dec 2025 20:09:08 +0100 Message-ID: <827b12ba48bb47bc77a0f5e5617aea961c8bc6b5.1766077285.git.andrea.porta@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The node describing the RP1 endpoint currently uses a specific name ('rp1_nexus') that does not correctly reflect the PCI topology. Update the DT with the correct topology and use generic node names. Additionally, since the driver dropped overlay support in favor of a fully described DT, rename '...-ovl-rp1.dts' to '...-base.dtsi' for inclusion in the board DTB, as it is no longer compiled as a standalone DTB. Signed-off-by: Andrea della Porta --- The DTC compiler produces the following warning: WARNING: DT compatible string vendor "pci1de4" appears un-documented -- che= ck ./Documentation/devicetree/bindings/vendor-prefixes.yaml #91: FILE: arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts:31: compatible =3D "pci1de4,1"; I'm not sure wheter I should add that compatible to vendor-prefixes.yaml or change the compatible to something already recognized as a vendor, such as 'raspberrypi,pci1de4,1'. I'd prefer the former to be consistent to what would be filled by enabling CONFIG_PCI_DYNAMIC_OF_NODES. Any hint will be really appreciated. --- arch/arm64/boot/dts/broadcom/Makefile | 1 - ...-ovl-rp1.dts =3D> bcm2712-rpi-5-b-base.dtsi} | 0 .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 39 ++++++++++++------- 3 files changed, 26 insertions(+), 14 deletions(-) rename arch/arm64/boot/dts/broadcom/{bcm2712-rpi-5-b-ovl-rp1.dts =3D> bcm2= 712-rpi-5-b-base.dtsi} (100%) diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/br= oadcom/Makefile index 83d45afc6588e..d43901404c955 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -7,7 +7,6 @@ dtb-$(CONFIG_ARCH_BCM2835) +=3D bcm2711-rpi-400.dtb \ bcm2711-rpi-4-b.dtb \ bcm2711-rpi-cm4-io.dtb \ bcm2712-rpi-5-b.dtb \ - bcm2712-rpi-5-b-ovl-rp1.dtb \ bcm2712-d-rpi-5-b.dtb \ bcm2837-rpi-2-b.dtb \ bcm2837-rpi-3-a-plus.dtb \ diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arc= h/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi similarity index 100% rename from arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts rename to arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-base.dtsi diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/= boot/dts/broadcom/bcm2712-rpi-5-b.dts index 3e0319fdb93f7..2856082814462 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -1,22 +1,16 @@ // SPDX-License-Identifier: (GPL-2.0 OR MIT) /* - * bcm2712-rpi-5-b-ovl-rp1.dts is the overlay-ready DT which will make - * the RP1 driver to load the RP1 dtb overlay at runtime, while - * bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it - * already contains RP1 node, so no overlay is loaded nor needed). - * This file is intended to host the override nodes for the RP1 peripheral= s, - * e.g. to declare the phy of the ethernet interface or the custom pin set= up - * for several RP1 peripherals. - * This in turn is due to the fact that there's no current generic - * infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) t= hat - * are not yet defined in the DT since they are loaded at runtime via over= lay. + * As a loose attempt to separate RP1 customizations from SoC peripherals + * definitioni, this file is intended to host the override nodes for the R= P1 + * peripherals, e.g. to declare the phy of the ethernet interface or custom + * pin setup. * All other nodes that do not have anything to do with RP1 should be added - * to the included bcm2712-rpi-5-b-ovl-rp1.dts instead. + * to the included bcm2712-rpi-5-b-base.dtsi instead. */ =20 /dts-v1/; =20 -#include "bcm2712-rpi-5-b-ovl-rp1.dts" +#include "bcm2712-rpi-5-b-base.dtsi" =20 / { aliases { @@ -25,7 +19,26 @@ aliases { }; =20 &pcie2 { - #include "rp1-nexus.dtsi" + pci@0,0 { + reg =3D <0x0 0x0 0x0 0x0 0x0>; + ranges; + bus-range =3D <0 1>; + device_type =3D "pci"; + #address-cells =3D <3>; + #size-cells =3D <2>; + + dev@0,0 { + compatible =3D "pci1de4,1"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + ranges =3D <0x1 0x0 0x0 0x82010000 0x0 0x0 0x0 0x400000>; + interrupt-controller; + #interrupt-cells =3D <2>; + #address-cells =3D <3>; + #size-cells =3D <2>; + + #include "rp1-common.dtsi" + }; + }; }; =20 &rp1_eth { --=20 2.35.3