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Tue, 01 Apr 2025 23:10:08 -0700 (PDT) Received: from mva-rohm ([2a10:a5c0:800d:dd00:8fdf:935a:2c85:d703]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-30dd2b59686sm19681961fa.97.2025.04.01.23.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 23:10:07 -0700 (PDT) Date: Wed, 2 Apr 2025 09:10:04 +0300 From: Matti Vaittinen To: Matti Vaittinen , Matti Vaittinen Cc: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matti Vaittinen , Nuno Sa , David Lechner , Javier Carrasco , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] iio: adc: ti-adc128s052: Support ROHM BD79104 Message-ID: <7b7c8c8ae79224c5aa74ed084858d90df6bbad81.1743573284.git.mazziesaccount@gmail.com> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ujxrzJXipQIJqS6A" Content-Disposition: inline In-Reply-To: --ujxrzJXipQIJqS6A Content-Disposition: inline Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The ROHM BD79104 ADC has identical SPI communication logic as the ti-adc128s052. Eg, SPI transfer should be 16 clk cycles, conversion is started when the CS is pulled low, and channel selection is done by writing the channel ID after two zero bits. Data is contained in big-endian format in the last 12 bits. The BD79104 has two input voltage pins. Data sheet uses terms "vdd" and "iovdd". The "vdd" is used also as an analog reference voltage. Hence the driver expects finding these from the device-tree, instead of having the "vref" only as TI's driver. NOTE: The TI's data sheet[1] does show that the TI's IC does actually have two voltage inputs as well. Pins are called Va (analog reference) and Vd (digital supply pin) - but I keep the existing driver behaviour for the TI's IC "as is", because I have no HW to test changes, and because I have no real need to touch it. NOTE II: The BD79104 requires SPI MODE 3. NOTE III: I used evaluation board "BD79104FV-EVK-001" made by ROHM. With this board I had to drop the SPI speed below the 20M which is mentioned in the data-sheet [2]. This, however, may be a limitation of the EVK board, not the component itself. Signed-off-by: Matti Vaittinen Datasheet: https://www.ti.com/lit/ds/symlink/adc128s052.pdf # [1] Datasheet: https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_co= nverter/dac/bd79104fv-la-e.pdf # [2] --- Revision history: v1 =3D> v2: - Use Datasheet tags in commit message. --- drivers/iio/adc/Kconfig | 2 +- drivers/iio/adc/ti-adc128s052.c | 40 +++++++++++++++++++++++++++++---- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 859c77f40f1d..045cd696a57d 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -1486,7 +1486,7 @@ config TI_ADC128S052 depends on SPI help If you say yes here you get support for Texas Instruments ADC128S052, - ADC122S021 and ADC124S021 chips. + ADC122S021, ADC124S021 and ROHM Semiconductor BD79104 chips. =20 This driver can also be built as a module. If so, the module will be called ti-adc128s052. diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s05= 2.c index a15b75fc067e..0f93c6266527 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -21,6 +21,9 @@ struct adc128_configuration { const struct iio_chan_spec *channels; u8 num_channels; + const char *refname; + int num_other_regulators; + const char * const (*other_regulators)[]; }; =20 struct adc128 { @@ -125,10 +128,28 @@ static const struct iio_chan_spec adc124s021_channels= [] =3D { ADC128_VOLTAGE_CHANNEL(3), }; =20 +static const char * const bd79104_regulators[] =3D { "iovdd" }; + static const struct adc128_configuration adc128_config[] =3D { - { adc128s052_channels, ARRAY_SIZE(adc128s052_channels) }, - { adc122s021_channels, ARRAY_SIZE(adc122s021_channels) }, - { adc124s021_channels, ARRAY_SIZE(adc124s021_channels) }, + { + .channels =3D adc128s052_channels, + .num_channels =3D ARRAY_SIZE(adc128s052_channels), + .refname =3D "vref", + }, { + .channels =3D adc122s021_channels, + .num_channels =3D ARRAY_SIZE(adc122s021_channels), + .refname =3D "vref", + }, { + .channels =3D adc124s021_channels, + .num_channels =3D ARRAY_SIZE(adc124s021_channels), + .refname =3D "vref", + }, { + .channels =3D adc128s052_channels, + .num_channels =3D ARRAY_SIZE(adc128s052_channels), + .refname =3D "vdd", + .other_regulators =3D &bd79104_regulators, + .num_other_regulators =3D 1, + }, }; =20 static const struct iio_info adc128_info =3D { @@ -163,7 +184,7 @@ static int adc128_probe(struct spi_device *spi) indio_dev->channels =3D config->channels; indio_dev->num_channels =3D config->num_channels; =20 - adc->reg =3D devm_regulator_get(&spi->dev, "vref"); + adc->reg =3D devm_regulator_get(&spi->dev, config->refname); if (IS_ERR(adc->reg)) return PTR_ERR(adc->reg); =20 @@ -175,6 +196,15 @@ static int adc128_probe(struct spi_device *spi) if (ret) return ret; =20 + if (config->num_other_regulators) { + ret =3D devm_regulator_bulk_get_enable(&spi->dev, + config->num_other_regulators, + *config->other_regulators); + if (ret) + return dev_err_probe(&spi->dev, ret, + "Failed to enable regulators\n"); + } + ret =3D devm_mutex_init(&spi->dev, &adc->lock); if (ret) return ret; @@ -190,6 +220,7 @@ static const struct of_device_id adc128_of_match[] =3D { { .compatible =3D "ti,adc124s021", .data =3D &adc128_config[2] }, { .compatible =3D "ti,adc124s051", .data =3D &adc128_config[2] }, { .compatible =3D "ti,adc124s101", .data =3D &adc128_config[2] }, + { .compatible =3D "rohm,bd79104", .data =3D &adc128_config[3] }, { } }; MODULE_DEVICE_TABLE(of, adc128_of_match); @@ -202,6 +233,7 @@ static const struct spi_device_id adc128_id[] =3D { { "adc124s021", (kernel_ulong_t)&adc128_config[2] }, { "adc124s051", (kernel_ulong_t)&adc128_config[2] }, { "adc124s101", (kernel_ulong_t)&adc128_config[2] }, + { "bd79104", (kernel_ulong_t)&adc128_config[3] }, { } }; MODULE_DEVICE_TABLE(spi, adc128_id); --=20 2.49.0 --ujxrzJXipQIJqS6A Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEIx+f8wZb28fLKEhTeFA3/03aocUFAmfs1LsACgkQeFA3/03a ocVq4AgAqQTz7P4kCrzrGGYbd1dsVTAWePIJaBceOInf4eD/Om0KWASk6/z7S3il eWYA1+OZyI5OoTFq5dqiPOUDLmWpVJUa6a5C2675wgujZcm6iONh2IB+TRY5CCZV 6J414ehFguVZJDICTS+zSaqGTVwmOP1PLFhTR9uheOpQ7TvM5b4MPuVTHEA9LrKw +KqPfmS0esANvMixRG6lekpFStu3VrUyScN2hPz+Whw1udEcBsO5JMpRqhVAdvdi aJhSf59wrzYhokHxoKqQnhmvfhZy1wthJ2SNGtsgd4ZX/R0wpBlpRzjq+WknE6TH AhQDKqodQniIGAPSQ/a5J9Z9SpD2/A== =geDB -----END PGP SIGNATURE----- --ujxrzJXipQIJqS6A--