From nobody Tue Feb 10 03:16:13 2026 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25F53347BD1 for ; Wed, 4 Feb 2026 19:20:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.22 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770232837; cv=none; b=pMYTBsGgLwztRBEs+9FztNd7+aL6e/A6bpXdUo+AEkauG09lSRzVw4Tot0GpniRcPL1qRfI7oGUx/SrAddNONU71QfGLAoWxDssWahqRZNZQY4tQE9eIp4b3DvELPOLVjhIbfR6HDdg2Prd4hdFR43lTlvFrnfHxKL9I2vD3uPc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770232837; c=relaxed/simple; bh=rz7p9jc3KEAU2CN3A3kTwST1nAH3niP9Qkjh2cBt8hs=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YDInFHG55+lRHkACJncZh6ghtdnCu+0tDGJk+/+lx5z0vEAm1k0KC4RbY8pqtM2XLTpm2xghTS0dyA9Xa4oRMgMyxW1uuz5GDjcsR78xll5yCxQ6IPlGMqHgSQzPuU89ekT4UmrjQ73B0JKWpqlSCV4HkkTxgLMpRL3JMgAzaGU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=GSF6RJV4; arc=none smtp.client-ip=185.70.43.22 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="GSF6RJV4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1770232835; x=1770492035; bh=/GycTFJ6YqEM59YZ69bixAdyxP3vleuMSrnAsUVSYsk=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=GSF6RJV4wxm1eHXV4YRkyGzCPjvjZ/7DWz7/FmuYXxp6taP7q7EsTeM4mRVcEXXHu haOXK49nSY/HeQ9gs4bwUK9Au7+XkGnrqQkegXTKNFOi170ZO8o3J3guYla+5uLPNB qpNjPkHaU0WxZJ5wvV4Gm1XzotgmdtWNi5+jTJ5eG7AguM6p24aFv2wLnM0wy5c2Dn N0k1gqManwmbnNScsnkgRMvl7ZxRJC2WWzpCbnXAw+1IpI5v3p+YLdL0i9+qcTKtl0 qB9pgg4BpSVWPe9kFOB42rrOKWRE7jf3DeLp2UeohUok+m7YeZkahVTyz0KT6a9EnS 9iQnhRXdiRLUg== Date: Wed, 04 Feb 2026 19:20:30 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , Andrey Konovalov , linux-kernel@vger.kernel.org Subject: [PATCH v10 11/13] x86: Increase minimal SLAB alignment for KASAN Message-ID: <7a192ce5ebfe605a6f168e5d5d780c93748f916a.1770232424.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 9fc5095365e43333c6c2887b6183f647234a671e Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman 8 byte minimal SLAB alignment interferes with KASAN's granularity of 16 bytes. It causes a lot of out-of-bounds errors for unaligned 8 byte allocations. Compared to a kernel with KASAN disabled, the memory footprint increases because all kmalloc-8 allocations now are realized as kmalloc-16, which has twice the object size. But more meaningfully, when compared to a kernel with generic KASAN enabled, there is no difference. Because of redzones in generic KASAN, kmalloc-8' and kmalloc-16' object size is the same (48 bytes). So changing the minimal SLAB alignment of the tag-based mode doesn't have any negative impact when compared to the other software KASAN mode. Adjust x86 minimal SLAB alignment to match KASAN granularity size. Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Andrey Konovalov --- Changelog v9: - Rename patch title so it fits the tip standards. Changelog v6: - Add Andrey's Reviewed-by tag. Changelog v4: - Extend the patch message with some more context and impact information. Changelog v3: - Fix typo in patch message 4 -> 16. - Change define location to arch/x86/include/asm/cache.c. arch/x86/include/asm/cache.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 69404eae9983..3232583b5487 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -21,4 +21,8 @@ #endif #endif =20 +#ifdef CONFIG_KASAN_SW_TAGS +#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) +#endif + #endif /* _ASM_X86_CACHE_H */ --=20 2.53.0