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Tue, 02 Sep 2025 02:48:00 -0700 (PDT) Date: Tue, 2 Sep 2025 12:47:57 +0300 From: Dan Carpenter To: Chester Lin Cc: Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-s32@linaro.org Subject: [PATCH v3 3/3] arm64: dts: s32g: Add device tree information for the OCOTP driver Message-ID: <7877e1958fa92df92b2b5229365c86493c620c8c.1756800543.git.dan.carpenter@linaro.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the device tree information for the S32G On Chip One-Time Programmable Controller (OCOTP) chip. Signed-off-by: Dan Carpenter --- v3: Add the device tree entry in the correct location based on the 0x400a4000 address. v2: change "ocotp: ocotp@400a4000 {" to "ocotp: nvmem@400a4000 {" --- arch/arm64/boot/dts/freescale/s32g2.dtsi | 7 +++++++ arch/arm64/boot/dts/freescale/s32g3.dtsi | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts= /freescale/s32g2.dtsi index 6a7cc7b33754..d6a9f61394d3 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -355,6 +355,13 @@ serdes_presence: serdes-presence@100 { }; }; =20 + ocotp: nvmem@400a4000 { + compatible =3D "nxp,s32g2-ocotp"; + reg =3D <0x400a4000 0x400>; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + edma0: dma-controller@40144000 { compatible =3D "nxp,s32g2-edma"; reg =3D <0x40144000 0x24000>, diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts= /freescale/s32g3.dtsi index 61ee08f0cfdc..f0e2a2907431 100644 --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi @@ -408,6 +408,13 @@ serdes_presence: serdes-presence@100 { }; }; =20 + ocotp: nvmem@400a4000 { + compatible =3D "nxp,s32g3-ocotp", "nxp,s32g2-ocotp"; + reg =3D <0x400a4000 0x400>; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + edma0: dma-controller@40144000 { compatible =3D "nxp,s32g3-edma", "nxp,s32g2-edma"; reg =3D <0x40144000 0x24000>, --=20 2.47.2