From nobody Tue Oct 7 11:39:36 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8F8930112B; Thu, 10 Jul 2025 20:07:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752178077; cv=none; b=CvYf51B2dHF6qeRW2CnUnLHqtPHylSel1X9X4H8IavqUliIFVR9b6vhwjsss26mf7Lcaa0jVLrebyeLQsGcnul2N4fYqaDcENCYa52MXr4sp7tzhRY3VOtS0VDksltfWblGav/JAsikkGPPjVZcn7IQURagRyH5bBZBEDdGi74w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752178077; c=relaxed/simple; bh=7pL9u4xzm4pz98MJzK0Ccu4wK9OxgIThKihZZfhmvag=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ihg1gHtQ5iKVu8jMxsbcEAmRzi2oDSB5fibI39RRprMZ55uBaj0YynojnEf1fL5+ImFngmFQ1Vn+jEzIP1RzExXIJsUlm4o+IDk8goiynYFLnE/cMOKxfYBzdn+mWnSxIeu/gAV4mB8FAV5eZBlY3HRIAUdqo1nQHLjZpHL7tEI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=ST8BxVZ6; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="ST8BxVZ6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1752178076; x=1783714076; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7pL9u4xzm4pz98MJzK0Ccu4wK9OxgIThKihZZfhmvag=; b=ST8BxVZ6NP0mfea8wVBOyFpNhbNZHCM77zAKXosBOTn4qGtOZVR+ESAh bu5O3vp6umZWmhPYvUYHipDNx85DhGsmmPHU9db8RT+QjnFDsKaRdqeZ7 J0dwkpxvvAbqLnCQtALXXG8DgPVgafWAtWppJoi8LjA1jxo1weMJ6FwV5 eQNlhb7oWHBFmOzty63sZmlsdIRvh/za90w3GcAcaIbaGg6pDS26fautZ Syz7Ai8hIWSJTj3Ks4la2jIph1dlVKuk0sI7i1gzH6I0+B2Je2fE5lw9R 5Ta3CjkCaLs4K33rHaQtURjFDwln1cphFn52zR1SSsO7db7pSlXkUvFIw w==; X-CSE-ConnectionGUID: qOQSLemoQZOGUxBCHa7nXg== X-CSE-MsgGUID: jSLWo98YRvWcpPgq6np0eg== X-IronPort-AV: E=Sophos;i="6.16,301,1744095600"; d="scan'208";a="275215686" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 10 Jul 2025 13:07:40 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Thu, 10 Jul 2025 13:07:34 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Thu, 10 Jul 2025 13:07:34 -0700 From: To: , , , , CC: , , , , Subject: [PATCH v3 28/32] clk: at91: at91sam9260: switch to parent_hw and parent_data Date: Thu, 10 Jul 2025 13:07:21 -0700 Message-ID: <77dc4ee8366f568bbb1b1a4f5fc74df82ede9f4a.1752176711.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Switch AT91SAM92600 clocks to use parent_hw and parent_data. Having parent_hw instead of parent names improves to clock registration speed and re-parenting. Signed-off-by: Claudiu Beznea Signed-off-by: Ryan Wanner --- drivers/clk/at91/at91sam9260.c | 136 +++++++++++++++++---------------- 1 file changed, 70 insertions(+), 66 deletions(-) diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c index 55350331b07e..827ae743b657 100644 --- a/drivers/clk/at91/at91sam9260.c +++ b/drivers/clk/at91/at91sam9260.c @@ -9,7 +9,7 @@ =20 struct sck { char *n; - char *p; + struct clk_hw *parent_hw; u8 id; }; =20 @@ -24,7 +24,7 @@ struct at91sam926x_data { const struct clk_pll_layout *pllb_layout; const struct clk_pll_characteristics *pllb_characteristics; const struct clk_master_characteristics *mck_characteristics; - const struct sck *sck; + struct sck *sck; const struct pck *pck; u8 num_sck; u8 num_pck; @@ -72,11 +72,11 @@ static const struct clk_pll_characteristics sam9260_pll= b_characteristics =3D { .out =3D sam9260_pllb_out, }; =20 -static const struct sck at91sam9260_systemck[] =3D { - { .n =3D "uhpck", .p =3D "usbck", .id =3D 6 }, - { .n =3D "udpck", .p =3D "usbck", .id =3D 7 }, - { .n =3D "pck0", .p =3D "prog0", .id =3D 8 }, - { .n =3D "pck1", .p =3D "prog1", .id =3D 9 }, +static struct sck at91sam9260_systemck[] =3D { + { .n =3D "uhpck", .id =3D 6 }, + { .n =3D "udpck", .id =3D 7 }, + { .n =3D "pck0", .id =3D 8 }, + { .n =3D "pck1", .id =3D 9 }, }; =20 static const struct pck at91sam9260_periphck[] =3D { @@ -213,15 +213,15 @@ static const struct clk_pll_characteristics sam9261_p= llb_characteristics =3D { .out =3D sam9261_pllb_out, }; =20 -static const struct sck at91sam9261_systemck[] =3D { - { .n =3D "uhpck", .p =3D "usbck", .id =3D 6 }, - { .n =3D "udpck", .p =3D "usbck", .id =3D 7 }, - { .n =3D "pck0", .p =3D "prog0", .id =3D 8 }, - { .n =3D "pck1", .p =3D "prog1", .id =3D 9 }, - { .n =3D "pck2", .p =3D "prog2", .id =3D 10 }, - { .n =3D "pck3", .p =3D "prog3", .id =3D 11 }, - { .n =3D "hclk0", .p =3D "masterck_div", .id =3D 16 }, - { .n =3D "hclk1", .p =3D "masterck_div", .id =3D 17 }, +static struct sck at91sam9261_systemck[] =3D { + { .n =3D "uhpck", .id =3D 6 }, + { .n =3D "udpck", .id =3D 7 }, + { .n =3D "pck0", .id =3D 8 }, + { .n =3D "pck1", .id =3D 9 }, + { .n =3D "pck2", .id =3D 10 }, + { .n =3D "pck3", .id =3D 11 }, + { .n =3D "hclk0", .id =3D 16 }, + { .n =3D "hclk1", .id =3D 17 }, }; =20 static const struct pck at91sam9261_periphck[] =3D { @@ -277,13 +277,13 @@ static const struct clk_pll_characteristics sam9263_p= ll_characteristics =3D { .out =3D sam9260_plla_out, }; =20 -static const struct sck at91sam9263_systemck[] =3D { - { .n =3D "uhpck", .p =3D "usbck", .id =3D 6 }, - { .n =3D "udpck", .p =3D "usbck", .id =3D 7 }, - { .n =3D "pck0", .p =3D "prog0", .id =3D 8 }, - { .n =3D "pck1", .p =3D "prog1", .id =3D 9 }, - { .n =3D "pck2", .p =3D "prog2", .id =3D 10 }, - { .n =3D "pck3", .p =3D "prog3", .id =3D 11 }, +static struct sck at91sam9263_systemck[] =3D { + { .n =3D "uhpck", .id =3D 6 }, + { .n =3D "udpck", .id =3D 7 }, + { .n =3D "pck0", .id =3D 8 }, + { .n =3D "pck1", .id =3D 9 }, + { .n =3D "pck2", .id =3D 10 }, + { .n =3D "pck3", .id =3D 11 }, }; =20 static const struct pck at91sam9263_periphck[] =3D { @@ -329,26 +329,15 @@ static struct at91sam926x_data at91sam9263_data =3D { static void __init at91sam926x_pmc_setup(struct device_node *np, struct at91sam926x_data *data) { - const char *slowxtal_name, *mainxtal_name; + const char *slow_clk_name =3D "slowck", *main_xtal_name =3D "main_xtal"; + u8 slow_clk_index =3D 0, main_xtal_index =3D 1; + struct clk_parent_data parent_data[4]; struct pmc_data *at91sam9260_pmc; u32 usb_div[] =3D { 1, 2, 4, 0 }; - const char *parent_names[6]; - const char *slck_name; + struct clk_hw *usbck_hw, *hw; struct regmap *regmap; - struct clk_hw *hw; - int i; bool bypass; - - i =3D of_property_match_string(np, "clock-names", "slow_xtal"); - if (i < 0) - return; - - slowxtal_name =3D of_clk_get_parent_name(np, i); - - i =3D of_property_match_string(np, "clock-names", "main_xtal"); - if (i < 0) - return; - mainxtal_name =3D of_clk_get_parent_name(np, i); + int i; =20 regmap =3D device_node_to_regmap(np); if (IS_ERR(regmap)) @@ -363,12 +352,13 @@ static void __init at91sam926x_pmc_setup(struct devic= e_node *np, =20 bypass =3D of_property_read_bool(np, "atmel,osc-bypass"); =20 - hw =3D at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, + hw =3D at91_clk_register_main_osc(regmap, "main_osc", NULL, + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index), bypass); if (IS_ERR(hw)) goto err_free; =20 - hw =3D at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL); + hw =3D at91_clk_register_rm9200_main(regmap, "mainck", NULL, &AT91_CLK_PD= _HW(hw)); if (IS_ERR(hw)) goto err_free; =20 @@ -382,20 +372,17 @@ static void __init at91sam926x_pmc_setup(struct devic= e_node *np, if (IS_ERR(hw)) goto err_free; =20 - parent_names[0] =3D "slow_rc_osc"; - parent_names[1] =3D "slow_xtal"; - hw =3D at91_clk_register_sam9260_slow(regmap, "slck", - parent_names, NULL, 2); + parent_data[0] =3D AT91_CLK_PD_HW(hw); + parent_data[1] =3D AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + hw =3D at91_clk_register_sam9260_slow(regmap, "slck", NULL, parent_data,= 2); if (IS_ERR(hw)) goto err_free; =20 at91sam9260_pmc->chws[PMC_SLOW] =3D hw; - slck_name =3D "slck"; - } else { - slck_name =3D slowxtal_name; } =20 - hw =3D at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0, + hw =3D at91_clk_register_pll(regmap, "pllack", NULL, + &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]), 0, data->plla_layout, data->plla_characteristics); if (IS_ERR(hw)) @@ -403,7 +390,8 @@ static void __init at91sam926x_pmc_setup(struct device_= node *np, =20 at91sam9260_pmc->chws[PMC_PLLACK] =3D hw; =20 - hw =3D at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1, + hw =3D at91_clk_register_pll(regmap, "pllbck", NULL, + &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]), 1, data->pllb_layout, data->pllb_characteristics); if (IS_ERR(hw)) @@ -411,12 +399,12 @@ static void __init at91sam926x_pmc_setup(struct devic= e_node *np, =20 at91sam9260_pmc->chws[PMC_PLLBCK] =3D hw; =20 - parent_names[0] =3D slck_name; - parent_names[1] =3D "mainck"; - parent_names[2] =3D "pllack"; - parent_names[3] =3D "pllbck"; + parent_data[0] =3D AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]); + parent_data[2] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]); + parent_data[3] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]); hw =3D at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, NULL, + NULL, parent_data, &at91rm9200_master_layout, data->mck_characteristics, &at91sam9260_mck_lock); @@ -424,7 +412,7 @@ static void __init at91sam926x_pmc_setup(struct device_= node *np, goto err_free; =20 hw =3D at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", NULL, + NULL, &AT91_CLK_PD_HW(hw), &at91rm9200_master_layout, data->mck_characteristics, &at91sam9260_mck_lock, @@ -434,21 +422,23 @@ static void __init at91sam926x_pmc_setup(struct devic= e_node *np, =20 at91sam9260_pmc->chws[PMC_MCK] =3D hw; =20 - hw =3D at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_d= iv); - if (IS_ERR(hw)) + usbck_hw =3D at91rm9200_clk_register_usb(regmap, "usbck", NULL, + &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLBCK]), + usb_div); + if (IS_ERR(usbck_hw)) goto err_free; =20 - parent_names[0] =3D slck_name; - parent_names[1] =3D "mainck"; - parent_names[2] =3D "pllack"; - parent_names[3] =3D "pllbck"; + parent_data[0] =3D AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]); + parent_data[2] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]); + parent_data[3] =3D AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLBCK]); for (i =3D 0; i < data->num_progck; i++) { char name[6]; =20 snprintf(name, sizeof(name), "prog%d", i); =20 hw =3D at91_clk_register_programmable(regmap, name, - parent_names, NULL, 4, i, + NULL, parent_data, 4, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) @@ -457,9 +447,22 @@ static void __init at91sam926x_pmc_setup(struct device= _node *np, at91sam9260_pmc->pchws[i] =3D hw; } =20 + /* Set systemck parent hws. */ + data->sck[0].parent_hw =3D usbck_hw; + data->sck[1].parent_hw =3D usbck_hw; + data->sck[2].parent_hw =3D at91sam9260_pmc->pchws[0]; + data->sck[3].parent_hw =3D at91sam9260_pmc->pchws[1]; + if (data->num_sck =3D=3D 6) { + data->sck[4].parent_hw =3D at91sam9260_pmc->pchws[2]; + data->sck[5].parent_hw =3D at91sam9260_pmc->pchws[3]; + } + if (data->num_sck =3D=3D 8) { + data->sck[6].parent_hw =3D at91sam9260_pmc->chws[PMC_MCK]; + data->sck[7].parent_hw =3D at91sam9260_pmc->chws[PMC_MCK]; + } for (i =3D 0; i < data->num_sck; i++) { - hw =3D at91_clk_register_system(regmap, data->sck[i].n, - data->sck[i].p, NULL, + hw =3D at91_clk_register_system(regmap, data->sck[i].n, NULL, + &AT91_CLK_PD_HW(data->sck[i].parent_hw), data->sck[i].id, 0); if (IS_ERR(hw)) goto err_free; @@ -470,7 +473,8 @@ static void __init at91sam926x_pmc_setup(struct device_= node *np, for (i =3D 0; i < data->num_pck; i++) { hw =3D at91_clk_register_peripheral(regmap, data->pck[i].n, - "masterck_div", NULL, + NULL, + &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MCK]), data->pck[i].id); if (IS_ERR(hw)) goto err_free; --=20 2.43.0