From nobody Mon Feb 9 09:08:27 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD669C001DF for ; Tue, 25 Jul 2023 22:24:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232575AbjGYWYX (ORCPT ); Tue, 25 Jul 2023 18:24:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40178 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232372AbjGYWWA (ORCPT ); Tue, 25 Jul 2023 18:22:00 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1080C4C20; Tue, 25 Jul 2023 15:17:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690323458; x=1721859458; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yffpgCm1vzGyx4bV+WRMVxatCK4JGCBdo5kYG+oAprc=; b=YYhgVvGLzSnmO43G9wlNQ4CI/4BxYlMTHyGDOre781JHaUOygeaSTp/K xiU0B8pzhwuB5p13pGHi0rracTxXg0uphpQjzRZDJ+6AeSVF7jrsMKZ4S zlqF9Fvx5nuNUej0rmR+L9LcK6FnFO0JbBoXuvueMvKRPazMxeb2m1ZJW 2cCMB4WJbxCwdPedbovs+fJM/vB9KdCdQT4m/KakEEXMkwIkRZBgldzFs Ek4bUqMukjfT1fofSWm6kifLvEa4kt4wQ4TEoVGPaeDr41sLwmXYE7xG0 KqE5hU9meOdhYpBWHB8q2+utpbQWKuPYr/sEFj/rhnX1CsE42W2MI7aeN g==; X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="367882650" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="367882650" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:15:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="840001861" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="840001861" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:15:58 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com, Sean Christopherson Subject: [PATCH v15 082/115] KVM: x86: Split core of hypercall emulation to helper function Date: Tue, 25 Jul 2023 15:14:33 -0700 Message-Id: <74e951ee3015699c76c66210d6152ebdbb0ad48c.1690322424.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Sean Christopherson By necessity, TDX will use a different register ABI for hypercalls. Break out the core functionality so that it may be reused for TDX. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata --- arch/x86/include/asm/kvm_host.h | 4 +++ arch/x86/kvm/x86.c | 54 ++++++++++++++++++++------------- 2 files changed, 37 insertions(+), 21 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 8bd2d7df15f9..c58ceded3437 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -2118,6 +2118,10 @@ static inline void kvm_clear_apicv_inhibit(struct kv= m *kvm, kvm_set_or_clear_apicv_inhibit(kvm, reason, false); } =20 +unsigned long __kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long= nr, + unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + int op_64_bit); int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); =20 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_= code, diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c7d34b04ccdf..747cc86c60dc 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -9838,26 +9838,15 @@ static int complete_hypercall_exit(struct kvm_vcpu = *vcpu) return kvm_skip_emulated_instruction(vcpu); } =20 -int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) +unsigned long __kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long= nr, + unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, + int op_64_bit) { - unsigned long nr, a0, a1, a2, a3, ret; - int op_64_bit; - - if (kvm_xen_hypercall_enabled(vcpu->kvm)) - return kvm_xen_hypercall(vcpu); - - if (kvm_hv_hypercall_enabled(vcpu)) - return kvm_hv_hypercall(vcpu); - - nr =3D kvm_rax_read(vcpu); - a0 =3D kvm_rbx_read(vcpu); - a1 =3D kvm_rcx_read(vcpu); - a2 =3D kvm_rdx_read(vcpu); - a3 =3D kvm_rsi_read(vcpu); + unsigned long ret; =20 trace_kvm_hypercall(nr, a0, a1, a2, a3); =20 - op_64_bit =3D is_64_bit_hypercall(vcpu); if (!op_64_bit) { nr &=3D 0xFFFFFFFF; a0 &=3D 0xFFFFFFFF; @@ -9866,11 +9855,6 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) a3 &=3D 0xFFFFFFFF; } =20 - if (static_call(kvm_x86_get_cpl)(vcpu) !=3D 0) { - ret =3D -KVM_EPERM; - goto out; - } - ret =3D -KVM_ENOSYS; =20 switch (nr) { @@ -9933,6 +9917,34 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) ret =3D -KVM_ENOSYS; break; } + return ret; +} +EXPORT_SYMBOL_GPL(__kvm_emulate_hypercall); + +int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) +{ + unsigned long nr, a0, a1, a2, a3, ret; + int op_64_bit; + + if (kvm_xen_hypercall_enabled(vcpu->kvm)) + return kvm_xen_hypercall(vcpu); + + if (kvm_hv_hypercall_enabled(vcpu)) + return kvm_hv_hypercall(vcpu); + + nr =3D kvm_rax_read(vcpu); + a0 =3D kvm_rbx_read(vcpu); + a1 =3D kvm_rcx_read(vcpu); + a2 =3D kvm_rdx_read(vcpu); + a3 =3D kvm_rsi_read(vcpu); + op_64_bit =3D is_64_bit_hypercall(vcpu); + + if (static_call(kvm_x86_get_cpl)(vcpu) !=3D 0) { + ret =3D -KVM_EPERM; + goto out; + } + + ret =3D __kvm_emulate_hypercall(vcpu, nr, a0, a1, a2, a3, op_64_bit); out: if (!op_64_bit) ret =3D (u32)ret; --=20 2.25.1