From nobody Mon Feb 9 03:52:02 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3C33C0015E for ; Tue, 25 Jul 2023 22:22:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232301AbjGYWV7 (ORCPT ); Tue, 25 Jul 2023 18:21:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232540AbjGYWUG (ORCPT ); Tue, 25 Jul 2023 18:20:06 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C781749E5; Tue, 25 Jul 2023 15:17:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690323433; x=1721859433; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BKB85qgfkyW6H3ZX55etTyd0dqN/2ACXGcD32PGXBas=; b=FeXT+nqw/GnHWRy/UMSfzPYXRfrn+lJf2Bi30mYLTLngUMKFsONGkdcE y71NSYES/QUkOCg1sJKw1b5LiExuXnKTsaEtjlU5rd71HCf6Ya7Ufvqfo 8CicQU+X4fM10CjzZH+u42tuLAPski51mfZAXhTD7tNJDzXZeHVGFxGSG ZeXhL3x/nd6XztTuh88RvYufPm2BxMNFbSa23gi5Kz3Kd0g565mpV0jfc 8sjitonDbnlVhBkVFUVocZFKjNoN3BDHIZd6qq6pqJLFsVI2IodoQdSWy TO0sT8zrQZeh43iTVorfdZrQARpmHvAMYmqX2SfivPK7aySD50+8I+oQm w==; X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="367882605" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="367882605" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:15:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10782"; a="840001830" X-IronPort-AV: E=Sophos;i="6.01,231,1684825200"; d="scan'208";a="840001830" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jul 2023 15:15:55 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack , Kai Huang , Zhi Wang , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com Subject: [PATCH v15 075/115] KVM: x86: Assume timer IRQ was injected if APIC state is proteced Date: Tue, 25 Jul 2023 15:14:26 -0700 Message-Id: <74b1fb68ef26552d542c10f3c8eb1ba4f4926afb.1690322424.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Sean Christopherson If APIC state is protected, i.e. the vCPU is a TDX guest, assume a timer IRQ was injected when deciding whether or not to busy wait in the "timer advanced" path. The "real" vIRR is not readable/writable, so trying to query for a pending timer IRQ will return garbage. Note, TDX can scour the PIR if it wants to be more precise and skip the "wait" call entirely. Signed-off-by: Sean Christopherson Signed-off-by: Isaku Yamahata --- arch/x86/kvm/lapic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index d74d5eedd262..d2d1a9531c96 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1745,8 +1745,17 @@ static void apic_update_lvtt(struct kvm_lapic *apic) static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic =3D vcpu->arch.apic; - u32 reg =3D kvm_lapic_get_reg(apic, APIC_LVTT); + u32 reg; =20 + /* + * Assume a timer IRQ was "injected" if the APIC is protected. KVM's + * copy of the vIRR is bogus, it's the responsibility of the caller to + * precisely check whether or not a timer IRQ is pending. + */ + if (apic->guest_apic_protected) + return true; + + reg =3D kvm_lapic_get_reg(apic, APIC_LVTT); if (kvm_apic_hw_enabled(apic)) { int vec =3D reg & APIC_VECTOR_MASK; void *bitmap =3D apic->regs + APIC_ISR; --=20 2.25.1