From nobody Fri Apr 10 02:38:43 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0C02351C12; Wed, 4 Mar 2026 17:11:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772644293; cv=none; b=P4h3GTSVxzo/wrW9mHN6hXDX9C+IfaVj3+9D3tIe2+Hvwr7hQIOqRKEQTuHbGQ0r+8oDI6qnAGutpBtvrz29DvGnOfo6qEEu4qygXtoEW4BqCWFW5S1qSivOMYiU7taIQgTYTiCQ1IW+5UFtwQfCZk+RtJPuo/JU455GpgWM/DY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772644293; c=relaxed/simple; bh=4v9ZIgt4c8sy4y5B1IiuieDPxid5OMMV1NCvCeCqak4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j/FIUkuq/uYcWbgvJiT4ee2d2FFZpb8Z7L3IdX1YAEryVTSLFnvw97g6z6pETdsaYiC2hPy6ZvAKc0YjW+CJ2O80BcnwTIE8mntmQjvr8EF9S5cuIDqOwniIik+aGO9ya/w0NrHZvZ7rDiItGaVV4IwPYCduyd85ma4cSpGsnHk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DB1DC19425; Wed, 4 Mar 2026 17:11:28 +0000 (UTC) From: Geert Uytterhoeven To: Marc Zyngier , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Peter Griffin , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Tudor Ambarus , Alim Akhtar , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Dinh Nguyen , Bjorn Andersson , Konrad Dybcio , Thierry Reding Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, imx@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH 4/7] arm64: dts: freescale: imx: Drop CPU masks from GICv3 PPI interrupts Date: Wed, 4 Mar 2026 18:11:01 +0100 Message-ID: <74a3a79eea1af7d6373ce705118f697cfaa35d76.1772643434.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unlike older GIC variants, the GICv3 DT bindings do not support specifying a CPU mask in PPI interrupt specifiers. Drop the masks. Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++------ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 11 +++++------ arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++------ arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 3 +-- arch/arm64/boot/dts/freescale/imx91_93_common.dtsi | 10 +++++----- arch/arm64/boot/dts/freescale/imx94.dtsi | 10 +++++----- arch/arm64/boot/dts/freescale/imx95.dtsi | 10 +++++----- arch/arm64/boot/dts/freescale/imx952.dtsi | 10 +++++----- 8 files changed, 36 insertions(+), 40 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mm.dtsi index 9f49c0b386d31051..3331b12b9294f339 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -220,16 +220,15 @@ psci { =20 pmu { compatible =3D "arm,cortex-a53-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , /* Physical Secure */ - , /* Phy= sical Non-Secure */ - , /* Vir= tual */ - ; /* Hyp= ervisor */ + interrupts =3D , /* Physical Secure */ + , /* Physical Non-Secure */ + , /* Virtual */ + ; /* Hypervisor */ clock-frequency =3D <8000000>; arm,no-tick-in-suspend; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mn.dtsi index 3199bc0966b03905..79b169b07c4fc95d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -215,8 +215,7 @@ clk_ext4: clock-ext4 { =20 pmu { compatible =3D "arm,cortex-a53-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 psci { @@ -258,10 +257,10 @@ map0 { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <8000000>; arm,no-tick-in-suspend; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mp.dtsi index 9b2b3a9bf9e80ca8..90d7bb8f5619e50d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -310,8 +310,7 @@ dsp_reserved: dsp@92400000 { =20 pmu { compatible =3D "arm,cortex-a53-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 psci { @@ -397,10 +396,10 @@ map0 { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <8000000>; arm,no-tick-in-suspend; }; diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/d= ts/freescale/imx8ulp.dtsi index 9b5d987665129e0c..1de3ad60c6aa7791 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -86,8 +86,7 @@ gic: interrupt-controller@2d400000 { pmu { compatible =3D "arm,cortex-a35-pmu"; interrupt-parent =3D <&gic>; - interrupts =3D ; + interrupts =3D ; interrupt-affinity =3D <&A35_0>, <&A35_1>; }; =20 diff --git a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi b/arch/arm6= 4/boot/dts/freescale/imx91_93_common.dtsi index 7958cef353766a43..aa7aaf134a2fc41d 100644 --- a/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx91_93_common.dtsi @@ -69,7 +69,7 @@ clk_ext1: clock-ext1 { =20 pmu { compatible =3D "arm,cortex-a55-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 psci { @@ -79,10 +79,10 @@ psci { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx94.dtsi b/arch/arm64/boot/dts= /freescale/imx94.dtsi index d2f31c8caf6eb781..4793dee2537c40d0 100644 --- a/arch/arm64/boot/dts/freescale/imx94.dtsi +++ b/arch/arm64/boot/dts/freescale/imx94.dtsi @@ -120,7 +120,7 @@ mqs2: mqs2 { =20 pmu { compatible =3D "arm,cortex-a55-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 psci { @@ -130,10 +130,10 @@ psci { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <24000000>; interrupt-parent =3D <&gic>; arm,no-tick-in-suspend; diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts= /freescale/imx95.dtsi index 55e2da094c889fc7..cc563ffa8af5229c 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -393,7 +393,7 @@ scmi_misc: protocol@84 { =20 pmu { compatible =3D "arm,cortex-a55-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 thermal_zones: thermal-zones { @@ -470,10 +470,10 @@ psci { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; diff --git a/arch/arm64/boot/dts/freescale/imx952.dtsi b/arch/arm64/boot/dt= s/freescale/imx952.dtsi index 91fe4916ac04d1d6..3d1dc9a8d18093bf 100644 --- a/arch/arm64/boot/dts/freescale/imx952.dtsi +++ b/arch/arm64/boot/dts/freescale/imx952.dtsi @@ -285,7 +285,7 @@ its: msi-controller@48040000 { =20 pmu { compatible =3D "arm,cortex-a55-pmu"; - interrupts =3D ; + interrupts =3D ; }; =20 psci { @@ -295,10 +295,10 @@ psci { =20 timer { compatible =3D "arm,armv8-timer"; - interrupts =3D , - , - , - ; + interrupts =3D , + , + , + ; clock-frequency =3D <24000000>; arm,no-tick-in-suspend; interrupt-parent =3D <&gic>; --=20 2.43.0